re PR middle-end/54149 (write introduction incorrect wrt the C11 memory model)
PR middle-end/54149 * tree-ssa-loop-im.c (execute_sm_if_changed_flag_set): Only set flag for writes. From-SVN: r191179
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@ -1,3 +1,9 @@
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2012-09-11 Aldy Hernandez <aldyh@redhat.com>
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PR middle-end/54149
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* tree-ssa-loop-im.c (execute_sm_if_changed_flag_set): Only set
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flag for writes.
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2012-09-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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PR tree-optimization/55492
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54
gcc/testsuite/gcc.dg/simulate-thread/speculative-store-4.c
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54
gcc/testsuite/gcc.dg/simulate-thread/speculative-store-4.c
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/* { dg-do link } */
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/* { dg-options "--param allow-store-data-races=0" } */
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/* { dg-final { simulate-thread } } */
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#include <stdio.h>
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#include <stdlib.h>
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#include "simulate-thread.h"
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/* PR 54139 */
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/* Test that speculative stores do not happen for --param
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allow-store-data-races=0. */
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int g_13=1, insns=1;
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__attribute__((noinline))
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void simulate_thread_main()
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{
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int l_245;
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/* Since g_13 is unilaterally set positive above, there should be
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no store to g_13 below. */
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for (l_245 = 0; l_245 <= 1; l_245 += 1)
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for (; g_13 <= 0; g_13 = 1)
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;
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}
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int main()
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{
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simulate_thread_main ();
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simulate_thread_done ();
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return 0;
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}
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void simulate_thread_other_threads ()
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{
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++g_13;
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++insns;
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}
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int simulate_thread_step_verify ()
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{
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return 0;
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}
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int simulate_thread_final_verify ()
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{
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if (g_13 != insns)
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{
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printf("FAIL: g_13 was incorrectly cached\n");
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return 1;
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}
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return 0;
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}
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@ -2113,9 +2113,14 @@ execute_sm_if_changed_flag_set (struct loop *loop, mem_ref_p ref)
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gimple_stmt_iterator gsi;
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gimple stmt;
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gsi = gsi_for_stmt (loc->stmt);
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stmt = gimple_build_assign (flag, boolean_true_node);
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gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING);
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/* Only set the flag for writes. */
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if (is_gimple_assign (loc->stmt)
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&& gimple_assign_lhs_ptr (loc->stmt) == loc->ref)
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{
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gsi = gsi_for_stmt (loc->stmt);
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stmt = gimple_build_assign (flag, boolean_true_node);
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gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING);
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}
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}
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VEC_free (mem_ref_loc_p, heap, locs);
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return flag;
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