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arm.c: Remove extraneous whitespace. 

* config/arm/arm.c: Remove extraneous whitespace.  Remove comment describing
  the deleted arm_gen_rotated_half_load function.

From-SVN: r105169
This commit is contained in:
Nick Clifton 2005-10-10 07:57:21 +00:00 committed by Nick Clifton
parent a5f5c6be7f
commit e0b923193a
2 changed files with 57 additions and 61 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2005-10-10 Nick Clifton <nickc@redhat.com>
* config/arm/arm.c: Remove extraneous whitespace. Remove comment
describing the deleted arm_gen_rotated_half_load function.
2005-10-09 Kaz Kojima <kkojima@gcc.gnu.org>
* config/sh/sh.c (emit_fpu_switch): Set TREE_PUBLIC for

113
gcc/config/arm/arm.c
View File

@ -481,7 +481,7 @@ int arm_arch_xscale = 0;
/* Nonzero if tuning for XScale */
int arm_tune_xscale = 0;
/* Nonzero if we want to tune for stores that access the write-buffer.
/* Nonzero if we want to tune for stores that access the write-buffer.
This typically means an ARM6 or ARM7 with MMU or MPU. */
int arm_tune_wbuf = 0;
@ -867,7 +867,7 @@ arm_override_options (void)
options. */
if (i == ARM_OPT_SET_ARCH)
target_arch_cpu = sel->core;
if (i != ARM_OPT_SET_TUNE)
{
/* If we have been given an architecture and a processor
@ -1514,7 +1514,7 @@ int
const_ok_for_arm (HOST_WIDE_INT i)
{
int lowbit;
/* For machines with >32 bit HOST_WIDE_INT, the bits above bit 31 must
be all zero, or all one. */
if ((i & ~(unsigned HOST_WIDE_INT) 0xffffffff) != 0
@ -1524,7 +1524,7 @@ const_ok_for_arm (HOST_WIDE_INT i)
return FALSE;
i &= (unsigned HOST_WIDE_INT) 0xffffffff;
/* Fast return for 0 and small values. We must do this for zero, since
the code below can't handle that one case. */
if ((i & ~(unsigned HOST_WIDE_INT) 0xff) == 0)
@ -1766,10 +1766,10 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond,
gen_rtx_SET (VOIDmode, target, source));
return 1;
}
/* We don't know how to handle other cases yet. */
gcc_assert (remainder == 0xffffffff);
if (generate)
emit_constant_insn (cond,
gen_rtx_SET (VOIDmode, target,
@ -1913,7 +1913,7 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond,
temp1 = 0x80000000 >> (topshift - 1);
temp2 = ARM_SIGN_EXTEND (temp1 - remainder);
if (const_ok_for_arm (temp2))
{
if (generate)
@ -2416,11 +2416,11 @@ arm_function_value(tree type, tree func ATTRIBUTE_UNUSED)
mode = mode_for_size (size * BITS_PER_UNIT, MODE_INT, 0);
}
}
return LIBCALL_VALUE(mode);
}
/* Determine the amount of memory needed to store the possible return
/* Determine the amount of memory needed to store the possible return
registers of an untyped call. */
int
arm_apply_result_size (void)
@ -2870,10 +2870,10 @@ arm_handle_isr_attribute (tree *node, tree name, tree args, int flags,
attribute. */
static tree
arm_handle_notshared_attribute (tree *node,
tree name ATTRIBUTE_UNUSED,
tree args ATTRIBUTE_UNUSED,
int flags ATTRIBUTE_UNUSED,
arm_handle_notshared_attribute (tree *node,
tree name ATTRIBUTE_UNUSED,
tree args ATTRIBUTE_UNUSED,
int flags ATTRIBUTE_UNUSED,
bool *no_add_attrs)
{
tree decl = TYPE_NAME (*node);
@ -3189,7 +3189,7 @@ legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
}
gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
offset = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
base == reg ? 0 : reg);
@ -3266,7 +3266,7 @@ thumb_find_work_register (unsigned long pushed_regs_mask)
&& current_function_args_size <= (LAST_ARG_REGNUM * UNITS_PER_WORD)
&& cfun->args_info.nregs < 4)
return LAST_ARG_REGNUM;
/* Otherwise look for a call-saved register that is going to be pushed. */
for (reg = LAST_LO_REGNUM; reg > LAST_ARG_REGNUM; reg --)
if (pushed_regs_mask & (1 << reg))
@ -3866,13 +3866,13 @@ thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)
}
rtx
thumb_legitimize_reload_address(rtx *x_p,
enum machine_mode mode,
int opnum, int type,
int ind_levels ATTRIBUTE_UNUSED)
thumb_legitimize_reload_address (rtx *x_p,
enum machine_mode mode,
int opnum, int type,
int ind_levels ATTRIBUTE_UNUSED)
{
rtx x = *x_p;
if (GET_CODE (x) == PLUS
&& GET_MODE_SIZE (mode) < 4
&& REG_P (XEXP (x, 0))
@ -3907,9 +3907,7 @@ thumb_legitimize_reload_address(rtx *x_p,
return NULL;
}
#define REG_OR_SUBREG_REG(X) \
(GET_CODE (X) == REG \
|| (GET_CODE (X) == SUBREG && GET_CODE (SUBREG_REG (X)) == REG))
@ -6114,10 +6112,6 @@ arm_gen_movmemqi (rtx *operands)
return 1;
}
/* Generate a memory reference for a half word, such that it will be loaded
into the top 16 bits of the word. We can assume that the address is
known to be alignable and of the form reg, or plus (reg, const). */
/* Select a dominance comparison mode if possible for a test of the general
form (OP (COND_OR (X) (Y)) (const_int 0)). We support three forms.
COND_OR == DOM_CC_X_AND_Y => (X && Y)
@ -6181,7 +6175,7 @@ arm_select_dominance_cc_mode (rtx x, rtx y, HOST_WIDE_INT cond_or)
case LT:
if (cond_or == DOM_CC_X_AND_Y)
return CC_DLTmode;
switch (cond2)
{
case LT:
@ -6229,7 +6223,7 @@ arm_select_dominance_cc_mode (rtx x, rtx y, HOST_WIDE_INT cond_or)
case GTU:
if (cond_or == DOM_CC_X_AND_Y)
return CC_DGTUmode;
switch (cond2)
{
case GTU:
@ -6749,7 +6743,6 @@ arm_pad_reg_upward (enum machine_mode mode ATTRIBUTE_UNUSED,
return !BYTES_BIG_ENDIAN;
}
/* Print a symbolic form of X to the debug file, F. */
static void
@ -7656,17 +7649,17 @@ arm_const_double_inline_cost (rtx val)
{
rtx lowpart, highpart;
enum machine_mode mode;
mode = GET_MODE (val);
if (mode == VOIDmode)
mode = DImode;
gcc_assert (GET_MODE_SIZE (mode) == 8);
lowpart = gen_lowpart (SImode, val);
highpart = gen_highpart_mode (SImode, mode, val);
gcc_assert (GET_CODE (lowpart) == CONST_INT);
gcc_assert (GET_CODE (highpart) == CONST_INT);
@ -7691,23 +7684,23 @@ arm_const_double_by_parts (rtx val)
if (mode == VOIDmode)
mode = DImode;
part = gen_highpart_mode (SImode, mode, val);
gcc_assert (GET_CODE (part) == CONST_INT);
if (const_ok_for_arm (INTVAL (part))
|| const_ok_for_arm (~INTVAL (part)))
return true;
part = gen_lowpart (SImode, val);
gcc_assert (GET_CODE (part) == CONST_INT);
if (const_ok_for_arm (INTVAL (part))
|| const_ok_for_arm (~INTVAL (part)))
return true;
return false;
}
@ -8344,31 +8337,31 @@ output_move_double (rtx *operands)
case REG:
output_asm_insn ("ldm%?ia\t%m1, %M0", operands);
break;
case PRE_INC:
gcc_assert (TARGET_LDRD);
output_asm_insn ("ldr%?d\t%0, [%m1, #8]!", operands);
break;
case PRE_DEC:
output_asm_insn ("ldm%?db\t%m1!, %M0", operands);
break;
case POST_INC:
output_asm_insn ("ldm%?ia\t%m1!, %M0", operands);
break;
case POST_DEC:
gcc_assert (TARGET_LDRD);
output_asm_insn ("ldr%?d\t%0, [%m1], #-8", operands);
break;
case PRE_MODIFY:
case POST_MODIFY:
otherops[0] = operands[0];
otherops[1] = XEXP (XEXP (XEXP (operands[1], 0), 1), 0);
otherops[2] = XEXP (XEXP (XEXP (operands[1], 0), 1), 1);
if (GET_CODE (XEXP (operands[1], 0)) == PRE_MODIFY)
{
if (reg_overlap_mentioned_p (otherops[0], otherops[2]))
@ -8386,13 +8379,13 @@ output_move_double (rtx *operands)
output_asm_insn ("ldr%?d\t%0, [%1], %2", otherops);
}
break;
case LABEL_REF:
case CONST:
output_asm_insn ("adr%?\t%0, %1", operands);
output_asm_insn ("ldm%?ia\t%0, %M0", operands);
break;
default:
if (arm_add_operand (XEXP (XEXP (operands[1], 0), 1),
GET_MODE (XEXP (XEXP (operands[1], 0), 1))))
@ -8400,7 +8393,7 @@ output_move_double (rtx *operands)
otherops[0] = operands[0];
otherops[1] = XEXP (XEXP (operands[1], 0), 0);
otherops[2] = XEXP (XEXP (operands[1], 0), 1);
if (GET_CODE (XEXP (operands[1], 0)) == PLUS)
{
if (GET_CODE (otherops[2]) == CONST_INT)
@ -8431,7 +8424,6 @@ output_move_double (rtx *operands)
avoid a conflict. */
otherops[1] = XEXP (XEXP (operands[1], 0), 1);
otherops[2] = XEXP (XEXP (operands[1], 0), 0);
}
/* If both registers conflict, it will usually
have been fixed by a splitter. */
@ -8445,7 +8437,7 @@ output_move_double (rtx *operands)
output_asm_insn ("ldr%?d\t%0, [%1, %2]", otherops);
return "";
}
if (GET_CODE (otherops[2]) == CONST_INT)
{
if (!(const_ok_for_arm (INTVAL (otherops[2]))))
@ -8865,7 +8857,7 @@ arm_compute_save_reg0_reg12_mask (void)
/* If we aren't loading the PIC register,
don't stack it even though it may be live. */
if (flag_pic
&& !TARGET_SINGLE_PIC_BASE
&& !TARGET_SINGLE_PIC_BASE
&& (regs_ever_live[PIC_OFFSET_TABLE_REGNUM]
|| current_function_uses_pic_offset_table))
save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM;
@ -11428,7 +11420,7 @@ arm_final_prescan_insn (rtx insn)
else
{
gcc_assert (seeking_return || arm_ccfsm_state == 2);
while (this_insn && GET_CODE (PATTERN (this_insn)) == USE)
{
this_insn = next_nonnote_insn (this_insn);
@ -13345,7 +13337,7 @@ thumb_expand_prologue (void)
if (frame_pointer_needed)
{
amount = offsets->outgoing_args - offsets->locals_base;
if (amount < 1024)
insn = emit_insn (gen_addsi3 (hard_frame_pointer_rtx,
stack_pointer_rtx, GEN_INT (amount)));
@ -13398,7 +13390,7 @@ thumb_expand_epilogue (void)
emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx));
amount = offsets->locals_base - offsets->saved_regs;
}
if (amount)
{
if (amount < 512)
@ -13697,7 +13689,7 @@ thumb_load_double_from_address (rtx *operands)
{
case REG:
operands[2] = adjust_address (operands[1], SImode, 4);
if (REGNO (operands[0]) == REGNO (addr))
{
output_asm_insn ("ldr\t%H0, %2", operands);
@ -13713,7 +13705,7 @@ thumb_load_double_from_address (rtx *operands)
case CONST:
/* Compute <address> + 4 for the high order load. */
operands[2] = adjust_address (operands[1], SImode, 4);
output_asm_insn ("ldr\t%0, %1", operands);
output_asm_insn ("ldr\t%H0, %2", operands);
break;
@ -13755,7 +13747,6 @@ thumb_load_double_from_address (rtx *operands)
{
/* Compute <address> + 4 for the high order load. */
operands[2] = adjust_address (operands[1], SImode, 4);
/* If the computed address is held in the low order register
then load the high order register first, otherwise always
@ -14616,7 +14607,7 @@ arm_cxx_determine_class_data_visibility (tree decl)
DECL_VISIBILITY (decl) = VISIBILITY_DEFAULT;
DECL_VISIBILITY_SPECIFIED (decl) = 1;
}
static bool
arm_cxx_class_data_always_comdat (void)
{
@ -14851,11 +14842,11 @@ arm_unwind_emit_stm (FILE * asm_out_file, rtx p)
|| GET_CODE (XEXP (e, 0)) != MEM
|| GET_CODE (XEXP (e, 1)) != REG)
abort ();
reg = REGNO (XEXP (e, 1));
if (reg < lastreg)
abort ();
if (i != 1)
fprintf (asm_out_file, ", ");
/* We can't use %r for vfp because we need to use the
@ -14930,7 +14921,7 @@ arm_unwind_emit_set (FILE * asm_out_file, rtx p)
{
HOST_WIDE_INT offset;
unsigned reg;
if (GET_CODE (e1) == PLUS)
{
if (GET_CODE (XEXP (e1, 0)) != REG