[ARC] Cleanup sdata handling.
Clean up how we handle small data load/store operations. gcc/ 2018-01-18 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc-protos.h (prepare_extend_operands): Remove. (small_data_pattern): Likewise. (arc_rewrite_small_data): Likewise. * config/arc/arc.c (LEGITIMATE_SMALL_DATA_OFFSET_P): Remove. (LEGITIMATE_SMALL_DATA_ADDRESS_P): Likewise. (get_symbol_alignment): New function. (legitimate_small_data_address_p): Likewise. (legitimate_scaled_address): Update, call legitimate_small_data_address_p. (output_sdata): New static variable. (arc_print_operand): Update how we handle small data operands. (arc_print_operand_address): Likewise. (arc_legitimate_address_p): Update, use legitimate_small_data_address_p. (arc_rewrite_small_data_p): Remove. (arc_rewrite_small_data_1): Likewise. (arc_rewrite_small_data): Likewise. (small_data_pattern): Likewise. (compact_sda_memory_operand): Update to use legitimate_small_data_address_p and get_symbol_alignment. (prepare_move_operands): Don't rewite sdata pattern. (prepare_extend_operands): Remove. * config/arc/arc.md (zero_extendqihi2): Don't rewrite sdata pattern. (zero_extendqisi2): Likewise. (zero_extendhisi2): Likewise. (extendqihi2): Likewise. (extendqisi2): Likewise. (extendhisi2): Likewise. (addsi3): Likewise. (subsi3): Likewise. (andsi3): Likewise. * config/arc/constraints.md (Usd): Change it to memory constraint. gcc/testsuite 2018-01-18 Claudiu Zissulescu <claziss@synopsys.com> * gcc.target/arc/interrupt-8.c: Update test. * gcc.target/arc/loop-4.c: Likewise. * gcc.target/arc/loop-hazard-1.c: Likewise. * gcc.target/arc/sdata-3.c: Likewise. From-SVN: r259763
This commit is contained in:
Claudiu Zissulescu
Claudiu Zissulescu
parent
2295aa7522
commit
e0be3321b9
@ -1,3 +1,39 @@
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2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/arc-protos.h (prepare_extend_operands): Remove.
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(small_data_pattern): Likewise.
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(arc_rewrite_small_data): Likewise.
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* config/arc/arc.c (LEGITIMATE_SMALL_DATA_OFFSET_P): Remove.
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(LEGITIMATE_SMALL_DATA_ADDRESS_P): Likewise.
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(get_symbol_alignment): New function.
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(legitimate_small_data_address_p): Likewise.
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(legitimate_scaled_address): Update, call
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legitimate_small_data_address_p.
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(output_sdata): New static variable.
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(arc_print_operand): Update how we handle small data operands.
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(arc_print_operand_address): Likewise.
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(arc_legitimate_address_p): Update, use
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legitimate_small_data_address_p.
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(arc_rewrite_small_data_p): Remove.
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(arc_rewrite_small_data_1): Likewise.
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(arc_rewrite_small_data): Likewise.
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(small_data_pattern): Likewise.
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(compact_sda_memory_operand): Update to use
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legitimate_small_data_address_p and get_symbol_alignment.
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(prepare_move_operands): Don't rewite sdata pattern.
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(prepare_extend_operands): Remove.
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* config/arc/arc.md (zero_extendqihi2): Don't rewrite sdata
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pattern.
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(zero_extendqisi2): Likewise.
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(zero_extendhisi2): Likewise.
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(extendqihi2): Likewise.
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(extendqisi2): Likewise.
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(extendhisi2): Likewise.
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(addsi3): Likewise.
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(subsi3): Likewise.
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(andsi3): Likewise.
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* config/arc/constraints.md (Usd): Change it to memory constraint.
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2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
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* config/arc/arc.c (arc_split_move): Allow signed 6-bit constants
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@ -33,8 +33,6 @@ extern void arc_print_operand (FILE *, rtx, int);
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extern void arc_print_operand_address (FILE *, rtx);
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extern void arc_final_prescan_insn (rtx_insn *, rtx *, int);
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extern const char *arc_output_libcall (const char *);
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extern bool prepare_extend_operands (rtx *operands, enum rtx_code code,
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machine_mode omode);
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extern int arc_output_addsi (rtx *operands, bool, bool);
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extern int arc_output_commutative_cond_exec (rtx *operands, bool);
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extern bool arc_expand_movmem (rtx *operands);
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@ -65,8 +63,6 @@ extern bool arc_raw_symbolic_reference_mentioned_p (rtx, bool);
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extern bool arc_is_longcall_p (rtx);
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extern bool arc_is_shortcall_p (rtx);
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extern bool valid_brcc_with_delay_p (rtx *);
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extern bool small_data_pattern (rtx , machine_mode);
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extern rtx arc_rewrite_small_data (rtx);
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extern bool arc_ccfsm_cond_exec_p (void);
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struct secondary_reload_info;
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extern int arc_register_move_cost (machine_mode, enum reg_class,
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@ -96,22 +96,6 @@ HARD_REG_SET overrideregs;
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? 0 \
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: -(-GET_MODE_SIZE (MODE) | -4) >> 1)))
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#define LEGITIMATE_SMALL_DATA_OFFSET_P(X) \
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(GET_CODE (X) == CONST \
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&& GET_CODE (XEXP ((X), 0)) == PLUS \
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&& GET_CODE (XEXP (XEXP ((X), 0), 0)) == SYMBOL_REF \
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&& SYMBOL_REF_SMALL_P (XEXP (XEXP ((X), 0), 0)) \
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&& GET_CODE (XEXP(XEXP ((X), 0), 1)) == CONST_INT \
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&& INTVAL (XEXP (XEXP ((X), 0), 1)) <= g_switch_value)
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#define LEGITIMATE_SMALL_DATA_ADDRESS_P(X) \
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(GET_CODE (X) == PLUS \
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&& REG_P (XEXP ((X), 0)) \
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&& REGNO (XEXP ((X), 0)) == SDATA_BASE_REGNUM \
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&& ((GET_CODE (XEXP ((X), 1)) == SYMBOL_REF \
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&& SYMBOL_REF_SMALL_P (XEXP ((X), 1))) \
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|| LEGITIMATE_SMALL_DATA_OFFSET_P (XEXP ((X), 1))))
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/* Array of valid operand punctuation characters. */
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char arc_punct_chars[256];
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@ -308,6 +292,60 @@ static bool arc_use_by_pieces_infrastructure_p (unsigned HOST_WIDE_INT,
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/* Globally visible information about currently selected cpu. */
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const arc_cpu_t *arc_selected_cpu;
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/* Given a symbol RTX (const (symb <+ const_int>), returns its
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alignment. */
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static int
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get_symbol_alignment (rtx x)
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{
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tree decl = NULL_TREE;
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int align = 0;
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switch (GET_CODE (x))
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{
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case SYMBOL_REF:
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decl = SYMBOL_REF_DECL (x);
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break;
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case CONST:
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return get_symbol_alignment (XEXP (x, 0));
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case PLUS:
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gcc_assert (CONST_INT_P (XEXP (x, 1)));
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return get_symbol_alignment (XEXP (x, 0));
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default:
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return 0;
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}
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if (decl)
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align = DECL_ALIGN (decl);
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align = align / BITS_PER_UNIT;
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return align;
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}
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/* Return true if x is ok to be used as a small data address. */
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static bool
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legitimate_small_data_address_p (rtx x)
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{
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switch (GET_CODE (x))
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{
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case CONST:
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return legitimate_small_data_address_p (XEXP (x, 0));
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case SYMBOL_REF:
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return SYMBOL_REF_SMALL_P (x);
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case PLUS:
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{
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bool p0 = (GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
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&& SYMBOL_REF_SMALL_P (XEXP (x, 0));
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bool p1 = CONST_INT_P (XEXP (x, 1))
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&& (INTVAL (XEXP (x, 1)) <= g_switch_value);
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return p0 && p1;
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}
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default:
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return false;
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}
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}
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/* TRUE if op is an scaled address. */
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static bool
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legitimate_scaled_address_p (machine_mode mode, rtx op, bool strict)
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{
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@ -352,14 +390,13 @@ legitimate_scaled_address_p (machine_mode mode, rtx op, bool strict)
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return true;
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return false;
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}
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/* Scalled addresses for sdata is done other places. */
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if (legitimate_small_data_address_p (op))
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return false;
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if (CONSTANT_P (XEXP (op, 1)))
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{
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/* Scalled addresses for sdata is done other places. */
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if (GET_CODE (XEXP (op, 1)) == SYMBOL_REF
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&& SYMBOL_REF_SMALL_P (XEXP (op, 1)))
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return false;
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return true;
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}
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return false;
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}
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@ -3762,6 +3799,9 @@ arc_add_jli_section (rtx pat)
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reset when we output the scaled address. */
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static int output_scaled = 0;
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/* Set when we force sdata output. */
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static int output_sdata = 0;
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/* Print operand X (an rtx) in assembler syntax to file FILE.
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CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
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For `%' followed by punctuation, CODE is the punctuation and X is null. */
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@ -4114,24 +4154,24 @@ arc_print_operand (FILE *file, rtx x, int code)
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fputs (".as", file);
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output_scaled = 1;
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}
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else if (LEGITIMATE_SMALL_DATA_ADDRESS_P (addr)
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&& GET_MODE_SIZE (GET_MODE (x)) > 1)
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break;
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case SYMBOL_REF:
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case CONST:
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if (legitimate_small_data_address_p (addr)
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&& GET_MODE_SIZE (GET_MODE (x)) > 1)
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{
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tree decl = NULL_TREE;
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int align = 0;
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if (GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
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decl = SYMBOL_REF_DECL (XEXP (addr, 1));
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else if (GET_CODE (XEXP (XEXP (XEXP (addr, 1), 0), 0))
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== SYMBOL_REF)
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decl = SYMBOL_REF_DECL (XEXP (XEXP (XEXP (addr, 1), 0), 0));
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if (decl)
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align = DECL_ALIGN (decl);
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align = align / BITS_PER_UNIT;
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if ((GET_MODE_SIZE (GET_MODE (x)) == 2)
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&& align && ((align & 1) == 0))
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fputs (".as", file);
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if ((GET_MODE_SIZE (GET_MODE (x)) >= 4)
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&& align && ((align & 3) == 0))
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int align = get_symbol_alignment (addr);
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int mask = 0;
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switch (GET_MODE (x))
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{
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case E_HImode:
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mask = 1;
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break;
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default:
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mask = 3;
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break;
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}
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if (align && ((align & mask) == 0))
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fputs (".as", file);
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}
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break;
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@ -4250,6 +4290,9 @@ arc_print_operand (FILE *file, rtx x, int code)
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rtx addr = XEXP (x, 0);
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int size = GET_MODE_SIZE (GET_MODE (x));
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if (legitimate_small_data_address_p (addr))
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output_sdata = 1;
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fputc ('[', file);
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switch (GET_CODE (addr))
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@ -4310,26 +4353,7 @@ arc_print_operand (FILE *file, rtx x, int code)
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|| XINT (XEXP (XEXP (x, 0), 0), 1) == UNSPEC_TLS_GD)))
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arc_output_pic_addr_const (file, x, code);
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else
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{
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/* FIXME: Dirty way to handle @var@sda+const. Shd be handled
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with asm_output_symbol_ref */
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if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS)
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{
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x = XEXP (x, 0);
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output_addr_const (file, XEXP (x, 0));
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if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF && SYMBOL_REF_SMALL_P (XEXP (x, 0)))
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fprintf (file, "@sda");
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if (GET_CODE (XEXP (x, 1)) != CONST_INT
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|| INTVAL (XEXP (x, 1)) >= 0)
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fprintf (file, "+");
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output_addr_const (file, XEXP (x, 1));
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}
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else
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output_addr_const (file, x);
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}
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if (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_SMALL_P (x))
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fprintf (file, "@sda");
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output_addr_const (file, x);
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break;
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}
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}
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@ -4346,10 +4370,13 @@ arc_print_operand_address (FILE *file , rtx addr)
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case REG :
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fputs (reg_names[REGNO (addr)], file);
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break;
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case SYMBOL_REF :
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case SYMBOL_REF:
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if (output_sdata)
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fputs ("gp,", file);
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output_addr_const (file, addr);
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if (SYMBOL_REF_SMALL_P (addr))
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fprintf (file, "@sda");
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if (output_sdata)
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fputs ("@sda", file);
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output_sdata = 0;
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break;
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case PLUS :
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if (GET_CODE (XEXP (addr, 0)) == MULT)
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@ -6170,7 +6197,7 @@ arc_legitimate_address_p (machine_mode mode, rtx x, bool strict)
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return true;
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if (legitimate_scaled_address_p (mode, x, strict))
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return true;
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if (LEGITIMATE_SMALL_DATA_ADDRESS_P (x))
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if (legitimate_small_data_address_p (x))
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return true;
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if (GET_CODE (x) == CONST_INT && LARGE_INT (INTVAL (x)))
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return true;
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@ -7973,98 +8000,9 @@ arc_in_small_data_p (const_tree decl)
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return false;
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}
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/* Return true if X is a small data address that can be rewritten
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as a gp+symref. */
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static bool
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arc_rewrite_small_data_p (const_rtx x)
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{
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if (GET_CODE (x) == CONST)
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x = XEXP (x, 0);
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if (GET_CODE (x) == PLUS)
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{
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if (GET_CODE (XEXP (x, 1)) == CONST_INT)
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x = XEXP (x, 0);
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}
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if (GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_SMALL_P (x))
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{
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gcc_assert (SYMBOL_REF_TLS_MODEL (x) == 0);
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return true;
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}
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return false;
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}
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/* If possible, rewrite OP so that it refers to small data using
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explicit relocations. */
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static rtx
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arc_rewrite_small_data_1 (rtx op)
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{
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rtx rgp = gen_rtx_REG (Pmode, SDATA_BASE_REGNUM);
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op = copy_insn (op);
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subrtx_ptr_iterator::array_type array;
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FOR_EACH_SUBRTX_PTR (iter, array, &op, ALL)
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{
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rtx *loc = *iter;
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if (arc_rewrite_small_data_p (*loc))
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{
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*loc = gen_rtx_PLUS (Pmode, rgp, *loc);
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iter.skip_subrtxes ();
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}
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else if (GET_CODE (*loc) == PLUS
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&& rtx_equal_p (XEXP (*loc, 0), rgp))
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iter.skip_subrtxes ();
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}
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return op;
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}
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rtx
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arc_rewrite_small_data (rtx op)
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{
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op = arc_rewrite_small_data_1 (op);
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/* Check if we fit small data constraints. */
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if (MEM_P (op)
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&& !LEGITIMATE_SMALL_DATA_ADDRESS_P (XEXP (op, 0)))
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{
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rtx addr = XEXP (op, 0);
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rtx tmp = gen_reg_rtx (Pmode);
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emit_move_insn (tmp, addr);
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op = replace_equiv_address_nv (op, tmp);
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}
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return op;
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}
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/* Return true if OP refers to small data symbols directly, not through
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a PLUS. */
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bool
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small_data_pattern (rtx op, machine_mode)
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{
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if (GET_CODE (op) == SEQUENCE)
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return false;
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rtx rgp = gen_rtx_REG (Pmode, SDATA_BASE_REGNUM);
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subrtx_iterator::array_type array;
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FOR_EACH_SUBRTX (iter, array, op, ALL)
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{
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const_rtx x = *iter;
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if (GET_CODE (x) == PLUS
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&& rtx_equal_p (XEXP (x, 0), rgp))
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iter.skip_subrtxes ();
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else if (arc_rewrite_small_data_p (x))
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return true;
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}
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return false;
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}
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/* Return true if OP is an acceptable memory operand for ARCompact
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16-bit gp-relative load instructions.
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op shd look like : [r26, symref@sda]
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i.e. (mem (plus (reg 26) (symref with smalldata flag set))
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*/
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*/
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/* volatile cache option still to be handled. */
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bool
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@ -8072,7 +8010,6 @@ compact_sda_memory_operand (rtx op, machine_mode mode, bool short_p)
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{
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rtx addr;
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int size;
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tree decl = NULL_TREE;
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int align = 0;
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int mask = 0;
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@ -8092,7 +8029,7 @@ compact_sda_memory_operand (rtx op, machine_mode mode, bool short_p)
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/* Decode the address now. */
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addr = XEXP (op, 0);
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if (!LEGITIMATE_SMALL_DATA_ADDRESS_P (addr))
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if (!legitimate_small_data_address_p (addr))
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return false;
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if (!short_p || size == 1)
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@ -8100,14 +8037,7 @@ compact_sda_memory_operand (rtx op, machine_mode mode, bool short_p)
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/* Now check for the alignment, the short loads using gp require the
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addresses to be aligned. */
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if (GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
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decl = SYMBOL_REF_DECL (XEXP (addr, 1));
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else if (GET_CODE (XEXP (XEXP (XEXP (addr, 1), 0), 0)) == SYMBOL_REF)
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decl = SYMBOL_REF_DECL (XEXP (XEXP (XEXP (addr, 1), 0), 0));
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if (decl)
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align = DECL_ALIGN (decl);
|
||||
align = align / BITS_PER_UNIT;
|
||||
|
||||
align = get_symbol_alignment (addr);
|
||||
switch (mode)
|
||||
{
|
||||
case E_HImode:
|
||||
@ -8581,11 +8511,6 @@ prepare_move_operands (rtx *operands, machine_mode mode)
|
||||
}
|
||||
}
|
||||
|
||||
/* We used to do this only for MODE_INT Modes, but addresses to floating
|
||||
point variables may well be in the small data section. */
|
||||
if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[0], Pmode))
|
||||
operands[0] = arc_rewrite_small_data (operands[0]);
|
||||
|
||||
if (mode == SImode && SYMBOLIC_CONST (operands[1]))
|
||||
{
|
||||
prepare_pic_move (operands, SImode);
|
||||
@ -8595,29 +8520,6 @@ prepare_move_operands (rtx *operands, machine_mode mode)
|
||||
here and references the variable directly. */
|
||||
}
|
||||
|
||||
if (GET_CODE (operands[0]) != MEM
|
||||
&& !TARGET_NO_SDATA_SET
|
||||
&& small_data_pattern (operands[1], Pmode))
|
||||
{
|
||||
/* This is to take care of address calculations involving sdata
|
||||
variables. */
|
||||
operands[1] = arc_rewrite_small_data (operands[1]);
|
||||
|
||||
emit_insn (gen_rtx_SET (operands[0],operands[1]));
|
||||
/* ??? This note is useless, since it only restates the set itself.
|
||||
We should rather use the original SYMBOL_REF. However, there is
|
||||
the problem that we are lying to the compiler about these
|
||||
SYMBOL_REFs to start with. symbol@sda should be encoded specially
|
||||
so that we can tell it apart from an actual symbol. */
|
||||
set_unique_reg_note (get_last_insn (), REG_EQUAL, operands[1]);
|
||||
|
||||
/* Take care of the REG_EQUAL note that will be attached to mark the
|
||||
output reg equal to the initial symbol_ref after this code is
|
||||
executed. */
|
||||
emit_move_insn (operands[0], operands[0]);
|
||||
return true;
|
||||
}
|
||||
|
||||
if (MEM_P (operands[0])
|
||||
&& !(reload_in_progress || reload_completed))
|
||||
{
|
||||
@ -8661,31 +8563,6 @@ prepare_move_operands (rtx *operands, machine_mode mode)
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Prepare OPERANDS for an extension using CODE to OMODE.
|
||||
Return true iff the move has been emitted. */
|
||||
|
||||
bool
|
||||
prepare_extend_operands (rtx *operands, enum rtx_code code,
|
||||
machine_mode omode)
|
||||
{
|
||||
if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[1], Pmode))
|
||||
{
|
||||
/* This is to take care of address calculations involving sdata
|
||||
variables. */
|
||||
operands[1]
|
||||
= gen_rtx_fmt_e (code, omode, arc_rewrite_small_data (operands[1]));
|
||||
emit_insn (gen_rtx_SET (operands[0], operands[1]));
|
||||
set_unique_reg_note (get_last_insn (), REG_EQUAL, operands[1]);
|
||||
|
||||
/* Take care of the REG_EQUAL note that will be attached to mark the
|
||||
output reg equal to the initial extension after this code is
|
||||
executed. */
|
||||
emit_move_insn (operands[0], operands[0]);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Output a library call to a function called FNAME that has been arranged
|
||||
to be local to any dso. */
|
||||
|
||||
|
||||
@ -1755,7 +1755,7 @@
|
||||
[(set (match_operand:HI 0 "dest_reg_operand" "")
|
||||
(zero_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
|
||||
""
|
||||
"if (prepare_extend_operands (operands, ZERO_EXTEND, HImode)) DONE;"
|
||||
""
|
||||
)
|
||||
|
||||
(define_insn "*zero_extendqisi2_ac"
|
||||
@ -1779,7 +1779,7 @@
|
||||
[(set (match_operand:SI 0 "dest_reg_operand" "")
|
||||
(zero_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
|
||||
""
|
||||
"if (prepare_extend_operands (operands, ZERO_EXTEND, SImode)) DONE;"
|
||||
""
|
||||
)
|
||||
|
||||
(define_insn "*zero_extendhisi2_i"
|
||||
@ -1804,7 +1804,7 @@
|
||||
[(set (match_operand:SI 0 "dest_reg_operand" "")
|
||||
(zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))]
|
||||
""
|
||||
"if (prepare_extend_operands (operands, ZERO_EXTEND, SImode)) DONE;"
|
||||
""
|
||||
)
|
||||
|
||||
;; Sign extension instructions.
|
||||
@ -1827,7 +1827,7 @@
|
||||
[(set (match_operand:HI 0 "dest_reg_operand" "")
|
||||
(sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
|
||||
""
|
||||
"if (prepare_extend_operands (operands, SIGN_EXTEND, HImode)) DONE;"
|
||||
""
|
||||
)
|
||||
|
||||
(define_insn "*extendqisi2_ac"
|
||||
@ -1847,7 +1847,7 @@
|
||||
[(set (match_operand:SI 0 "dest_reg_operand" "")
|
||||
(sign_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
|
||||
""
|
||||
"if (prepare_extend_operands (operands, SIGN_EXTEND, SImode)) DONE;"
|
||||
""
|
||||
)
|
||||
|
||||
(define_insn "*extendhisi2_i"
|
||||
@ -1868,7 +1868,7 @@
|
||||
[(set (match_operand:SI 0 "dest_reg_operand" "")
|
||||
(sign_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))]
|
||||
""
|
||||
"if (prepare_extend_operands (operands, SIGN_EXTEND, SImode)) DONE;"
|
||||
""
|
||||
)
|
||||
|
||||
;; Unary arithmetic insns
|
||||
@ -2761,11 +2761,6 @@
|
||||
{
|
||||
operands[2]=force_reg(SImode, operands[2]);
|
||||
}
|
||||
else if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[2], Pmode))
|
||||
{
|
||||
operands[2] = force_reg (SImode, arc_rewrite_small_data (operands[2]));
|
||||
}
|
||||
|
||||
")
|
||||
|
||||
(define_expand "adddi3"
|
||||
@ -2969,8 +2964,6 @@
|
||||
}
|
||||
if (flag_pic && arc_raw_symbolic_reference_mentioned_p (operands[c], false))
|
||||
operands[c] = force_reg (SImode, operands[c]);
|
||||
else if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[c], Pmode))
|
||||
operands[c] = force_reg (SImode, arc_rewrite_small_data (operands[c]));
|
||||
}")
|
||||
|
||||
; the casesi expander might generate a sub of zero, so we have to recognize it.
|
||||
@ -3326,8 +3319,7 @@
|
||||
""
|
||||
"if (!satisfies_constraint_Cux (operands[2]))
|
||||
operands[1] = force_reg (SImode, operands[1]);
|
||||
else if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[1], Pmode))
|
||||
operands[1] = arc_rewrite_small_data (operands[1]);")
|
||||
")
|
||||
|
||||
(define_insn "andsi3_i"
|
||||
[(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,Rcq,Rcqq,Rcqq,Rcqq,Rcw,Rcw, Rcw,Rcw,Rcw,Rcw, w, w, w, w,Rrq,w,Rcw, w,W")
|
||||
|
||||
@ -347,11 +347,7 @@
|
||||
(match_test "!cmem_address (XEXP (op, 0), SImode)")
|
||||
(not (match_operand 0 "long_immediate_loadstore_operand"))))
|
||||
|
||||
; Don't use define_memory_constraint here as the relocation patching
|
||||
; for small data symbols only works within a ld/st instruction and
|
||||
; define_memory_constraint may result in the address being calculated
|
||||
; into a register first.
|
||||
(define_constraint "Usd"
|
||||
(define_memory_constraint "Usd"
|
||||
"@internal
|
||||
A valid _small-data_ memory operand for ARCompact instructions"
|
||||
(and (match_code "mem")
|
||||
|
||||
@ -1,3 +1,10 @@
|
||||
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
|
||||
|
||||
* gcc.target/arc/interrupt-8.c: Update test.
|
||||
* gcc.target/arc/loop-4.c: Likewise.
|
||||
* gcc.target/arc/loop-hazard-1.c: Likewise.
|
||||
* gcc.target/arc/sdata-3.c: Likewise.
|
||||
|
||||
2018-04-30 Claudiu Zissulescu <claziss@synopsys.com>
|
||||
|
||||
* gcc.target/arc/store-merge-1.c: New test.
|
||||
|
||||
@ -2,8 +2,7 @@
|
||||
/* { dg-skip-if "Not available for ARCv1" { arc700 || arc6xx } } */
|
||||
/* { dg-options "-O2 -mirq-ctrl-saved=r0-r17" } */
|
||||
|
||||
/* Check if the registers R0-R17 are automatically saved. GP is saved
|
||||
by the compiler. */
|
||||
/* Check if the registers R0-R17 are automatically saved. */
|
||||
|
||||
int a;
|
||||
|
||||
@ -18,8 +17,6 @@ foo(void)
|
||||
/* { dg-final { scan-assembler-not "st.*r14,\\\[sp" } } */
|
||||
/* { dg-final { scan-assembler-not "st.*r15,\\\[sp" } } */
|
||||
/* { dg-final { scan-assembler-not "st.*r16,\\\[sp" } } */
|
||||
/* { dg-final { scan-assembler "st.*gp,\\\[sp,-4\\\]" } } */
|
||||
/* { dg-final { scan-assembler "ld.*gp,\\\[sp\\\]" } } */
|
||||
/* { dg-final { scan-assembler-not "st.*r0,\\\[sp" } } */
|
||||
/* { dg-final { scan-assembler-not "st.*r1,\\\[sp" } } */
|
||||
/* { dg-final { scan-assembler-not "st.*r2,\\\[sp" } } */
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/* { dg-do assemble } */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-Os" } */
|
||||
/* { dg-options "-Os -fbranch-count-reg" } */
|
||||
|
||||
|
||||
void fn1(void *p1, int p2, int p3)
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-Os" } */
|
||||
/* { dg-options "-Os -fbranch-count-reg" } */
|
||||
|
||||
/* This caused an assertion within arc_loop_hazard. */
|
||||
|
||||
|
||||
@ -10,9 +10,13 @@ short g_c;
|
||||
char g_d;
|
||||
|
||||
#define TEST(name, optype) \
|
||||
void test_ ## name (optype x) \
|
||||
optype testLD_ ## name (optype x) \
|
||||
{ \
|
||||
g_ ## name += x; \
|
||||
return g_ ## name + x; \
|
||||
} \
|
||||
void testST_ ## name (optype x) \
|
||||
{ \
|
||||
g_ ## name = x; \
|
||||
}
|
||||
|
||||
TEST (a, int)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user