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re PR target/42549 (Incorrect 3DNow! code generated) 

PR target/42549
	* config/i386/mmx.md (*mmx_subv2sf3): Fix insn operand number for
	alternative 1.

testsuite/ChangeLog:

	PR target/42549
	* gcc.target/i386/mmx-3dnow-check.h: New file.
	* gcc.target/i386/pr42549.c: New test.

From-SVN: r155521
This commit is contained in:
Uros Bizjak 2009-12-30 12:34:57 +01:00
parent 96c64a577d
commit e0fae0c0d5
5 changed files with 78 additions and 9 deletions
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21
gcc/ChangeLog
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@ -1,3 +1,9 @@
2009-12-30 Uros Bizjak <ubizjak@gmail.com>
PR target/42549
* config/i386/mmx.md (*mmx_subv2sf3): Fix insn operand number for
alternative 1.
2009-12-28 H.J. Lu <hongjiu.lu@intel.com>
Backport from mainline:
@ -50,9 +56,8 @@
PR target/41196
2009-10-14 Daniel Gutson <dgutson@codesourcery.com>
* config/arm/neon.md (neon_vshll_n<mode>): Checking Bounds
fixed.
* config/arm/neon.md (neon_vshll_n<mode>): Checking Bounds fixed.
2009-12-11 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
@ -63,14 +68,14 @@
floating point and we are not doing unsafe math optimizations.
2009-12-11 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/41939
Backport from mainline:
2009-06-05 Julian Brown <julian@codesourcery.com>
* config/arm/ieee754-df.S (cmpdf2): Avoid writing below SP.
* config/arm/ieee754-sf.S (cmpsf2): Likewise.
2009-12-09 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.md ("copysign<mode>3"): Pattern removed.
@ -225,7 +230,7 @@
2009-11-24 Wolfgang Gellerich <gellerich@de.ibm.com>
* config/s390/s390.md: Added agen condition to operand
forwarding bypasses.
forwarding bypasses.
Added bypass for early address generation use of int results.
Updated comments.
@ -240,7 +245,7 @@
2009-11-18 Matthias Klose <doko@ubuntu.com>
* config.gcc: Update ARM --with-fpu option list.
* config.gcc: Update ARM --with-fpu option list.
2009-11-17 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
@ -583,7 +588,7 @@
2009-10-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Backport from mainline.
Backport from mainline.
2009-10-01 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.c (arm_override_options): Turn off
flag_dwarf2_cfi_asm for AAPCS variants.

2
gcc/config/i386/mmx.md
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@ -336,7 +336,7 @@
"TARGET_3DNOW && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
pfsub\t{%2, %0|%0, %2}
pfsubr\t{%2, %0|%0, %2}"
pfsubr\t{%1, %0|%0, %1}"
[(set_attr "type" "mmxadd")
(set_attr "mode" "V2SF")])

6
gcc/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2009-12-30 Uros Bizjak <ubizjak@gmail.com>
PR target/42549
* gcc.target/i386/mmx-3dnow-check.h: New file.
* gcc.target/i386/pr42549.c: New test.
2009-12-28 H.J. Lu <hongjiu.lu@intel.com>
Backport from mainline:

21
gcc/testsuite/gcc.target/i386/mmx-3dnow-check.h Normal file
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@ -0,0 +1,21 @@
#include <stdio.h>
#include <stdlib.h>
#include "cpuid.h"
static void mmx_3dnow_test (void);
int
main ()
{
unsigned int eax, ebx, ecx, edx;
if (!__get_cpuid (0x80000001, &eax, &ebx, &ecx, &edx))
return 0;
/* Run 3DNow! test only if host has 3DNow! support. */
if (edx & bit_3DNOW)
mmx_3dnow_test ();
return 0;
}

37
gcc/testsuite/gcc.target/i386/pr42549.c Normal file
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@ -0,0 +1,37 @@
/* { dg-do run } */
/* { dg-options "-O2 -m3dnow" } */
#include "mmx-3dnow-check.h"
#include <mm3dnow.h>
typedef union {
float f[2];
__m64 v;
} vec_t;
void __attribute__ ((noinline))
Butterfly_3 (__m64 * D, __m64 SC)
{
__m64 T, T1;
T = _m_pfmul (D[1], SC);
T1 = D[0];
D[0] = _m_pfadd (T1, T);
D[1] = _m_pfsub (T1, T);
}
static void
mmx_3dnow_test (void)
{
vec_t D[2] = { { .f = { 2.0f, 3.0f } },
{ .f = { 4.0f, 5.0f } } };
const vec_t SC = { .f = { 1.0f, 1.0f } };
Butterfly_3 (&D[0].v, SC.v);
_m_femms ();
if (D[1].f[0] != -2.0f || D[1].f[1] != -2.0f)
abort ();
}