From e1152c0bc885278944dfbfa1c877e045702abc3f Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Sat, 26 Jun 2004 03:51:29 +0000 Subject: [PATCH] mips.md: Add back scheduling exclusion info. 2004-06-25 Eric Christopher * config/mips/mips.md: Add back scheduling exclusion info. From-SVN: r83699 --- gcc/ChangeLog | 16 ++++++++++------ gcc/config/mips/mips.md | 20 ++++++++++---------- 2 files changed, 20 insertions(+), 16 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9c638b86ece..adc5748ccdd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2004-06-25 Eric Christopher + + * config/mips/mips.md: Add back scheduling exclusion info. + 2004-06-25 Roger Sayle * ifcvt.c (seq_contains_jump): Delete function. @@ -10,7 +14,7 @@ PR wrong-code/15089 * loop.c (scan_loop): Do not move user-specified register assignments. - + 2004-06-25 DJ Delorie * c-common.h (warn_cast_qual, warn_missing_format_attribute, @@ -98,7 +102,7 @@ 2004-06-25 Devang Patel * doc/tree-ssa.texi: Document info about MODIFY_EXPR's type - + 2004-06-25 Paul Brook * target-def.h (TARGET_CXX_GUARD_TYPE, TARGET_CXX_GUARD_MASK_BIT, @@ -114,10 +118,10 @@ TARGET_CXX_GUARD_MASK_BIT. 2004-06-25 Devang Patel - + * config/rs6000/darwin.h (CC1_SPEC): Handle -gused and -gfull. * config/i386/darwin.h (CC1_SPEC): Same. - + 2004-06-25 Mark G. Adams * dbxout.h: Add include guards @@ -141,7 +145,7 @@ on armv5. * arm.h (arm_arch4t): Declare. * arm.md (call_reg_armv5, call_value_reg_armv5): New. - (call_reg_arm, call_value_reg_arm): Renamed from call_reg and + (call_reg_arm, call_value_reg_arm): Renamed from call_reg and call_value_reg respectively. (call_reg_thumb_v5, call_value_reg_thumb_v5): New. (call_reg_thumb, call_value_reg_thumb): Renamed from call_indirect @@ -169,7 +173,7 @@ * gimplify.c (internal_get_tmp_var, gimplify_return_expr): Likewise. (gimplify_loop_expr, gimplify_init_constructor): Likewise. (gimplify_self_mod_expr, gimplify_cond_expr): Likewise. - + PR/16131 * gimplify.c (voidify_wrapper_expr): Allow TARGET_EXPR. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 545565ce760..94bd87a0284 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -326,7 +326,7 @@ (define_function_unit "memory" 1 0 (and (eq_attr "type" "load,fpload,fpidxload") - (eq_attr "cpu" "r3900,r4600,r4650,r4100,r4120,r4300,r5000")) + (eq_attr "cpu" "!r3900,r4600,r4650,r4100,r4120,r4300,r5000")) 3 0) (define_function_unit "memory" 1 0 @@ -346,7 +346,7 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "imul,imadd") - (eq_attr "cpu" "r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) + (eq_attr "cpu" "!r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) 17 17) ;; On them mips16, we want to stronly discourage a mult from appearing @@ -398,7 +398,7 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "idiv") - (eq_attr "cpu" "r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) + (eq_attr "cpu" "!r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) 38 38) (define_function_unit "imuldiv" 1 0 @@ -455,7 +455,7 @@ ;; instructions to be processed in the "imuldiv" unit. (define_function_unit "adder" 1 1 - (and (eq_attr "type" "fcmp") (eq_attr "cpu" "r3900,r6000,r4300,r5000")) + (and (eq_attr "type" "fcmp") (eq_attr "cpu" "!r3900,r6000,r4300,r5000")) 3 0) (define_function_unit "adder" 1 1 @@ -467,7 +467,7 @@ 1 0) (define_function_unit "adder" 1 1 - (and (eq_attr "type" "fadd") (eq_attr "cpu" "r3900,r6000,r4300")) + (and (eq_attr "type" "fadd") (eq_attr "cpu" "!r3900,r6000,r4300")) 4 0) (define_function_unit "adder" 1 1 @@ -480,7 +480,7 @@ (define_function_unit "adder" 1 1 (and (eq_attr "type" "fabs,fneg,fmove") - (eq_attr "cpu" "r3900,r4600,r4650,r4300,r5000")) + (eq_attr "cpu" "!r3900,r4600,r4650,r4300,r5000")) 2 0) (define_function_unit "adder" 1 1 @@ -490,7 +490,7 @@ (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") (and (eq_attr "mode" "SF") - (eq_attr "cpu" "r3900,r6000,r4600,r4650,r4300,r5000"))) + (eq_attr "cpu" "!r3900,r6000,r4600,r4650,r4300,r5000"))) 7 0) (define_function_unit "mult" 1 1 @@ -510,7 +510,7 @@ (define_function_unit "mult" 1 1 (and (eq_attr "type" "fmul") - (and (eq_attr "mode" "DF") (eq_attr "cpu" "r3900,r6000,r4300,r5000"))) + (and (eq_attr "mode" "DF") (eq_attr "cpu" "!r3900,r6000,r4300,r5000"))) 8 0) (define_function_unit "mult" 1 1 @@ -526,7 +526,7 @@ (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "SF") - (eq_attr "cpu" "r3900,r6000,r4600,r4650,r4300,r5000"))) + (eq_attr "cpu" "!r3900,r6000,r4600,r4650,r4300,r5000"))) 23 0) (define_function_unit "divide" 1 1 @@ -552,7 +552,7 @@ (define_function_unit "divide" 1 1 (and (eq_attr "type" "fdiv") (and (eq_attr "mode" "DF") - (eq_attr "cpu" "r3900,r6000,r4600,r4650,r4300"))) + (eq_attr "cpu" "!r3900,r6000,r4600,r4650,r4300"))) 36 0) (define_function_unit "divide" 1 1