[RS6000] Don't pass -many to the assembler
I'd like to remove -many from the options passed by default to the assembler, on the grounds that a gcc bug in instruction selection (eg. emitting a power9 insn for -mcpu=power8) is better found at assembly time than run time. For now, just do this when --enable-checking or gcc is not a release. This patch also emits .machine assembler directives for ELF targets when functions are compiled for different cpus via attributes or pragmas. That's necessary when the initial -m<cpu> option passed to the assembler doesn't enable the superset of all opcodes emitted, as seen by a failure of gcc.target/powerpc/clone2.c without .machine when building gcc for power8. rs6000_machine_from_flags deliberately uses ISA_2_4_MASKS rather than ISA_2_2_MASKS for power5 because "friz" and other similar instructions enabled by gcc with TARGET_FPRND are enabled in gas by "-mpower5". (gas -mpower5 supports power5+ too.) rs6000-cpus.def puts OPTION_MASK_FPRND in ISA_2_4_MASKS, so ISA_2_4_MASKS is the one to use in deciding to pass "-mpower5" to gas. O3-pr70130.c also failed on an earlier version of this patch (when only testing one ISA bit to determine .machine). This is a test for a power7 vector bug, but on power8 hw check_vect_support_and_set_flags passes -mpower8-vector which means the test isn't exercising the original bug exactly. I reckon that is wrong, and similary for other vector testcases that ask for a specific cpu. I've fixed it here by explicitly passing -mno-power8-vector and similar vector options. * config/rs6000/rs6000.h (ASM_OPT_ANY): Define. (ASM_CPU_SPEC): Conditionally add -many. * config/rs6000/rs6000.c (rs6000_machine): New static var. (rs6000_machine_from_flags, emit_asm_machine): New functions.. (rs6000_file_start): ..extracted from here, and modified to test all ISA bits. (rs6000_output_function_prologue): Emit .machine as necessary. * testsuite/gcc.target/powerpc/ppc32-abi-dfp-1.c: Don't use power mnemonics. * testsuite/gcc.dg/vect/O3-pr70130.c: Disable default options added by check_vect_support_and_set_flags. * testsuite/gcc.dg/vect/pr48765.c: Likewise. * testsuite/gfortran.dg/vect/pr45714-b.f: Likewise. From-SVN: r271500
This commit is contained in:
Alan Modra
Alan Modra
parent
0acb03ae87
commit
e154242724
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@ -1,3 +1,19 @@
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2019-05-22 Alan Modra <amodra@gmail.com>
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* config/rs6000/rs6000.h (ASM_OPT_ANY): Define.
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(ASM_CPU_SPEC): Conditionally add -many.
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* config/rs6000/rs6000.c (rs6000_machine): New static var.
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(rs6000_machine_from_flags, emit_asm_machine): New functions..
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(rs6000_file_start): ..extracted from here, and modified to
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test all ISA bits.
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(rs6000_output_function_prologue): Emit .machine as necessary.
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* testsuite/gcc.target/powerpc/ppc32-abi-dfp-1.c: Don't use
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power mnemonics.
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* testsuite/gcc.dg/vect/O3-pr70130.c: Disable default options
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added by check_vect_support_and_set_flags.
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* testsuite/gcc.dg/vect/pr48765.c: Likewise.
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* testsuite/gfortran.dg/vect/pr45714-b.f: Likewise.
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2019-05-22 Hans-Peter Nilsson <hp@axis.com>
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PR middle-end/90553
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@ -5632,6 +5632,36 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out,
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/* Default CPU string for rs6000*_file_start functions. */
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static const char *rs6000_default_cpu;
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#ifdef USING_ELFOS_H
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static const char *rs6000_machine;
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static const char *
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rs6000_machine_from_flags (void)
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{
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if ((rs6000_isa_flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
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return "power9";
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if ((rs6000_isa_flags & (ISA_2_7_MASKS_SERVER & ~ISA_2_6_MASKS_SERVER)) != 0)
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return "power8";
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if ((rs6000_isa_flags & (ISA_2_6_MASKS_SERVER & ~ISA_2_5_MASKS_SERVER)) != 0)
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return "power7";
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if ((rs6000_isa_flags & (ISA_2_5_MASKS_SERVER & ~ISA_2_4_MASKS)) != 0)
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return "power6";
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if ((rs6000_isa_flags & (ISA_2_4_MASKS & ~ISA_2_1_MASKS)) != 0)
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return "power5";
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if ((rs6000_isa_flags & ISA_2_1_MASKS) != 0)
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return "power4";
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if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) != 0)
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return "ppc64";
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return "ppc";
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}
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static void
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emit_asm_machine (void)
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{
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fprintf (asm_out_file, "\t.machine %s\n", rs6000_machine);
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}
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#endif
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/* Do anything needed at the start of the asm file. */
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static void
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@ -5697,27 +5727,10 @@ rs6000_file_start (void)
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}
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#ifdef USING_ELFOS_H
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rs6000_machine = rs6000_machine_from_flags ();
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if (!(rs6000_default_cpu && rs6000_default_cpu[0])
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&& !global_options_set.x_rs6000_cpu_index)
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{
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fputs ("\t.machine ", asm_out_file);
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if ((rs6000_isa_flags & OPTION_MASK_MODULO) != 0)
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fputs ("power9\n", asm_out_file);
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else if ((rs6000_isa_flags & OPTION_MASK_DIRECT_MOVE) != 0)
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fputs ("power8\n", asm_out_file);
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else if ((rs6000_isa_flags & OPTION_MASK_POPCNTD) != 0)
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fputs ("power7\n", asm_out_file);
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else if ((rs6000_isa_flags & OPTION_MASK_CMPB) != 0)
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fputs ("power6\n", asm_out_file);
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else if ((rs6000_isa_flags & OPTION_MASK_POPCNTB) != 0)
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fputs ("power5\n", asm_out_file);
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else if ((rs6000_isa_flags & OPTION_MASK_MFCRF) != 0)
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fputs ("power4\n", asm_out_file);
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else if ((rs6000_isa_flags & OPTION_MASK_POWERPC64) != 0)
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fputs ("ppc64\n", asm_out_file);
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else
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fputs ("ppc\n", asm_out_file);
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}
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emit_asm_machine ();
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#endif
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if (DEFAULT_ABI == ABI_ELFv2)
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@ -27504,7 +27517,17 @@ static void
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rs6000_output_function_prologue (FILE *file)
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{
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if (!cfun->is_thunk)
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rs6000_output_savres_externs (file);
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{
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rs6000_output_savres_externs (file);
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#ifdef USING_ELFOS_H
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const char *curr_machine = rs6000_machine_from_flags ();
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if (rs6000_machine != curr_machine)
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{
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rs6000_machine = curr_machine;
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emit_asm_machine ();
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}
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#endif
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}
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/* ELFv2 ABI r2 setup code and local entry point. This must follow
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immediately after the global entry point label. */
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@ -70,6 +70,12 @@
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#define PPC405_ERRATUM77 0
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#endif
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#if CHECKING_P
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#define ASM_OPT_ANY ""
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#else
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#define ASM_OPT_ANY " -many"
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#endif
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/* Common ASM definitions used by ASM_SPEC among the various targets for
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handling -mcpu=xxx switches. There is a parallel list in driver-rs6000.c to
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provide the default assembler options if the user uses -mcpu=native, so if
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@ -137,8 +143,8 @@
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mvsx: -mpower7; \
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mpowerpc64: -mppc64;: %(asm_default)}; \
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:%eMissing -mcpu option in ASM_CPU_SPEC?\n} \
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%{mvsx: -mvsx -maltivec; maltivec: -maltivec} \
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-many"
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%{mvsx: -mvsx -maltivec; maltivec: -maltivec}" \
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ASM_OPT_ANY
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#define CPP_DEFAULT_SPEC ""
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@ -1,5 +1,5 @@
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/* { dg-require-effective-target vsx_hw { target powerpc*-*-* } } */
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/* { dg-additional-options "-mcpu=power7" { target powerpc*-*-* } } */
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/* { dg-additional-options "-mcpu=power7 -mno-power9-vector -mno-power8-vector" { target powerpc*-*-* } } */
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#include "tree-vect.h"
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@ -1,6 +1,6 @@
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/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
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/* { dg-additional-options "-O3 -mcpu=power6" } */
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/* { dg-additional-options "-O3 -mcpu=power6 -mno-power9-vector -mno-power8-vector -mno-vsx" } */
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enum reg_class
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{
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@ -45,14 +45,14 @@ __asm__ ("\t.globl\t" #NAME "_asm\n\t" \
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#NAME "_asm:\n\t" \
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"lis 11,gparms@ha\n\t" \
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"la 11,gparms@l(11)\n\t" \
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"st 3,0(11)\n\t" \
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"st 4,4(11)\n\t" \
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"st 5,8(11)\n\t" \
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"st 6,12(11)\n\t" \
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"st 7,16(11)\n\t" \
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"st 8,20(11)\n\t" \
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"st 9,24(11)\n\t" \
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"st 10,28(11)\n\t" \
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"stw 3,0(11)\n\t" \
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"stw 4,4(11)\n\t" \
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"stw 5,8(11)\n\t" \
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"stw 6,12(11)\n\t" \
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"stw 7,16(11)\n\t" \
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"stw 8,20(11)\n\t" \
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"stw 9,24(11)\n\t" \
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"stw 10,28(11)\n\t" \
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"stfd 1,32(11)\n\t" \
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"stfd 2,40(11)\n\t" \
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"stfd 3,48(11)\n\t" \
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@ -1,5 +1,5 @@
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! { dg-do compile { target powerpc*-*-* } }
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! { dg-additional-options "-O3 -mcpu=power7 -ffast-math -mveclibabi=mass" }
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! { dg-additional-options "-O3 -mcpu=power7 -mno-power9-vector -mno-power8-vector -ffast-math -mveclibabi=mass" }
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integer index(18),i,j,k,l,ipiv(18),info,ichange,neq,lda,ldb,
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& nrhs,iplas
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