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[ARM/AArch64][testsuite] Add vmlal_lane and vmlsl_lane tests.

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2015-01-20  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vmlXl_lane.inc: New file.
	* gcc.target/aarch64/advsimd-intrinsics/vmlal_lane.c: New file.
	* gcc.target/aarch64/advsimd-intrinsics/vmlsl_lane.c: New file.

From-SVN: r219921
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Christophe Lyon 2015-01-20 23:23:44 +00:00 committed by Christophe Lyon
parent 8e4a8e54ae
commit e20a3d0f5c
4 changed files with 108 additions and 0 deletions
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6
gcc/testsuite/ChangeLog
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2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlXl_lane.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlal_lane.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vmlsl_lane.c: New file.
2015-01-20 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc: New file.

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gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl_lane.inc Normal file
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#define FNNAME1(NAME) exec_ ## NAME
#define FNNAME(NAME) FNNAME1(NAME)
void FNNAME (INSN_NAME) (void)
{
/* vector_res = vmlxl_lane(vector, vector3, vector4, lane),
then store the result. */
#define TEST_VMLXL_LANE1(INSN, T1, T2, W, W2, N, V) \
VECT_VAR(vector_res, T1, W, N) = \
INSN##_##T2##W2(VECT_VAR(vector, T1, W, N), \
VECT_VAR(vector3, T1, W2, N), \
VECT_VAR(vector4, T1, W2, N), \
V); \
vst1q_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
#define TEST_VMLXL_LANE(INSN, T1, T2, W, W2, N, V) \
TEST_VMLXL_LANE1(INSN, T1, T2, W, W2, N, V)
DECL_VARIABLE(vector, int, 32, 4);
DECL_VARIABLE(vector3, int, 16, 4);
DECL_VARIABLE(vector4, int, 16, 4);
DECL_VARIABLE(vector_res, int, 32, 4);
DECL_VARIABLE(vector, int, 64, 2);
DECL_VARIABLE(vector3, int, 32, 2);
DECL_VARIABLE(vector4, int, 32, 2);
DECL_VARIABLE(vector_res, int, 64, 2);
DECL_VARIABLE(vector, uint, 32, 4);
DECL_VARIABLE(vector3, uint, 16, 4);
DECL_VARIABLE(vector4, uint, 16, 4);
DECL_VARIABLE(vector_res, uint, 32, 4);
DECL_VARIABLE(vector, uint, 64, 2);
DECL_VARIABLE(vector3, uint, 32, 2);
DECL_VARIABLE(vector4, uint, 32, 2);
DECL_VARIABLE(vector_res, uint, 64, 2);
clean_results ();
VLOAD(vector, buffer, q, int, s, 32, 4);
VLOAD(vector, buffer, q, int, s, 64, 2);
VLOAD(vector, buffer, q, uint, u, 32, 4);
VLOAD(vector, buffer, q, uint, u, 64, 2);
VDUP(vector3, , int, s, 16, 4, 0x55);
VDUP(vector4, , int, s, 16, 4, 0xBB);
VDUP(vector3, , int, s, 32, 2, 0x55);
VDUP(vector4, , int, s, 32, 2, 0xBB);
VDUP(vector3, , uint, u, 16, 4, 0x55);
VDUP(vector4, , uint, u, 16, 4, 0xBB);
VDUP(vector3, , uint, u, 32, 2, 0x55);
VDUP(vector4, , uint, u, 32, 2, 0xBB);
TEST_VMLXL_LANE(INSN_NAME, int, s, 32, 16, 4, 2);
TEST_VMLXL_LANE(INSN_NAME, int, s, 64, 32, 2, 1);
TEST_VMLXL_LANE(INSN_NAME, uint, u, 32, 16, 4, 2);
TEST_VMLXL_LANE(INSN_NAME, uint, u, 64, 32, 2, 1);
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
}
int main (void)
{
FNNAME (INSN_NAME) ();
return 0;
}

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gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlal_lane.c Normal file
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#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#define INSN_NAME vmlal_lane
#define TEST_MSG "VMLAL_LANE"
/* Expected results. */
VECT_VAR_DECL(expected,int,32,4) [] = { 0x3e07, 0x3e08, 0x3e09, 0x3e0a };
VECT_VAR_DECL(expected,int,64,2) [] = { 0x3e07, 0x3e08 };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0x3e07, 0x3e08, 0x3e09, 0x3e0a };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3e07, 0x3e08 };
#include "vmlXl_lane.inc"

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gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlsl_lane.c Normal file
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#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#define INSN_NAME vmlsl_lane
#define TEST_MSG "VMLSL_LANE"
/* Expected results. */
VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffc1d9, 0xffffc1da,
0xffffc1db, 0xffffc1dc };
VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffc1d9,
0xffffffffffffc1da };
VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffc1d9, 0xffffc1da,
0xffffc1db, 0xffffc1dc };
VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffc1d9,
0xffffffffffffc1da };
#include "vmlXl_lane.inc"