re PR tree-optimization/81529 (ICE in vectorizable_induction, at tree-vect-loop.c:6613)
2017-07-25 Richard Biener <rguenther@suse.de> PR tree-optimization/81529 * tree-vect-stmts.c (process_use): Disregard live induction PHIs when optimizing backedge uses. * gfortran.dg/pr81529.f90: New testcase. From-SVN: r250517
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2017-07-25 Richard Biener <rguenther@suse.de>
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PR tree-optimization/81529
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* tree-vect-stmts.c (process_use): Disregard live induction PHIs
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when optimizing backedge uses.
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2017-07-25 David Edelsohn <dje.gcc@gmail.com>
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* dwarf2asm.c (dw2_asm_output_nstring): Encode double quote
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2017-07-25 Richard Biener <rguenther@suse.de>
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PR tree-optimization/81529
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* gfortran.dg/pr81529.f90: New testcase.
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2017-07-25 Wilco Dijkstra <wdijkstr@arm.com>
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* testsuite/gcc.target/aarch64/pr79041-2.c: Improve test.
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! { dg-do compile }
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! { dg-options "-std=gnu -fno-tree-scev-cprop -Ofast" }
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subroutine CalcCgr(C,rmax,ordgr_max)
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integer, intent(in) :: rmax,ordgr_max
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double complex :: Zadj(2,2), Zadj2(2,2)
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double complex, intent(out) :: C(0:rmax,0:rmax,0:rmax)
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double complex, allocatable :: Cexpgr(:,:,:,:)
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double complex :: Caux
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integer :: rmaxB,rmaxExp,r,n0,n1,n2,k,l,i,j,m,n,nn
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rmaxB = 2*rmax
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rmaxExp = rmaxB
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allocate(Cexpgr(0:rmaxExp/2,0:rmaxExp,0:rmaxExp,0:ordgr_max))
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rloop: do r=0,rmaxExp/2
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do n0=r,1,-1
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do nn=r-n0,0,-1
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do i=1,2
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Caux = Caux - Zadj(i,l)
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end do
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Cexpgr(n0,0,0,0) = Caux/(2*(nn+1))
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end do
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end do
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do n1=0,r
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n2 = r-n1
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if (r.le.rmax) then
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C(0,n1,n2) = Cexpgr(0,n1,n2,0)
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end if
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end do
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end do rloop
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end subroutine CalcCgr
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@ -581,9 +581,11 @@ process_use (gimple *stmt, tree use, loop_vec_info loop_vinfo,
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}
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/* We are also not interested in uses on loop PHI backedges that are
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inductions. Otherwise we'll needlessly vectorize the IV increment
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and cause hybrid SLP for SLP inductions. */
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and cause hybrid SLP for SLP inductions. Unless the PHI is live
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of course. */
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else if (gimple_code (stmt) == GIMPLE_PHI
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&& STMT_VINFO_DEF_TYPE (stmt_vinfo) == vect_induction_def
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&& ! STMT_VINFO_LIVE_P (stmt_vinfo)
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&& (PHI_ARG_DEF_FROM_EDGE (stmt, loop_latch_edge (bb->loop_father))
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== use))
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{
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