From e3cc72542ba605f704f9590ef6d5b91bd9b66233 Mon Sep 17 00:00:00 2001 From: Zdenek Dvorak Date: Wed, 27 Apr 2005 16:28:11 +0200 Subject: [PATCH] re PR tree-optimization/21171 (IV OPTS removes does not create a new VOPs for constant values) PR tree-optimization/21171 * tree-ssa-loop-ivopts.c (find_interesting_uses_address): Do not record address uses if the reference is volatile. * gcc.dg/tree-ssa/pr21171.c: New test. From-SVN: r98828 --- gcc/ChangeLog | 6 +++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.dg/tree-ssa/pr21171.c | 29 +++++++++++++++++++++++++ gcc/tree-ssa-loop-ivopts.c | 5 +++++ 4 files changed, 45 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr21171.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5a99ffa1aff..2a545fd9a65 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2005-04-27 Zdenek Dvorak + + PR tree-optimization/21171 + * tree-ssa-loop-ivopts.c (find_interesting_uses_address): Do not + record address uses if the reference is volatile. + 2004-04-27 Paolo Bonzini * tree-complex.c (expand_vector_operation): New, extracted from diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0f69c320f7d..78ac81ac2aa 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2005-04-27 Zdenek Dvorak + + PR tree-optimization/21171 + * gcc.dg/tree-ssa/pr21171.c: New test. + 2004-04-27 Paolo Bonzini * gcc.dg/tree-ssa/gen-vect-11.c, gcc.dg/tree-ssa/gen-vect-11a.c, diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr21171.c b/gcc/testsuite/gcc.dg/tree-ssa/pr21171.c new file mode 100644 index 00000000000..a655ed63281 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr21171.c @@ -0,0 +1,29 @@ +/* PR 21171. Ivopts should not rewrite references to volatile memory. */ +/* { dg-do compile } */ +/* { dg-options "-O1 -fdump-tree-vars" } */ + +typedef unsigned int u_int32_t; +typedef unsigned char u_int8_t; + +#define AIC_VECTORS 32 + +typedef volatile struct AT91RM9200_regs { + u_int32_t SVR[AIC_VECTORS]; +} AT91RM9200_regs_t; + +#define CPUReg ((AT91RM9200_regs_t*)0xFFF00000) + +extern const u_int32_t __IntTable[AIC_VECTORS]; + +int main() +{ + int c; + + for (c = 0; c < AIC_VECTORS; c++) + CPUReg->SVR[c] = __IntTable[c]; + + return 0; +} + +/* { dg-final { scan-tree-dump-times "SVR" 1 "vars"} } */ +/* { dg-final { cleanup-tree-dump "vars" } } */ diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c index a62c1cda8f4..f23e8d6d3a5 100644 --- a/gcc/tree-ssa-loop-ivopts.c +++ b/gcc/tree-ssa-loop-ivopts.c @@ -1518,6 +1518,11 @@ find_interesting_uses_address (struct ivopts_data *data, tree stmt, tree *op_p) struct iv *civ; struct ifs_ivopts_data ifs_ivopts_data; + /* Do not play with volatile memory references. A bit too conservative, + perhaps, but safe. */ + if (stmt_ann (stmt)->has_volatile_ops) + goto fail; + /* Ignore bitfields for now. Not really something terribly complicated to handle. TODO. */ if (TREE_CODE (base) == COMPONENT_REF