optabs.c (gen_condiational_trap): Remove #define.
* optabs.c (gen_condiational_trap): Remove #define. (add_equal_note): Assertify. Remove explicit indirection from call via function pointer. (expand_ternary_op, expand_simple_binop, expand_binop, expand_twoval_unop, expand_twoval_binop, expand_twoval_binop_libfunc, expand_simple_unop expand_unop, emit_unop_insn, emit_no_conflict_block, prepare_cmp_insn, prepare_operand emit_cmp_and_jump_insn_1, emit_cmp_and_jump_insns, prepare_float_lib_cmp, emit_conditional_move, emit_conditional_add, gen_add2_insn, gen_add3_insn, have_add2_insn, gen_sub2_insn, gen_sub3_insn, have_sub2_insn, expand_float, expand_fix, debug_optab_libfuncs, gen_cond_trap, vector_compare_rtx, expand_vec_cond_expr): Likewise. From-SVN: r98499
This commit is contained in:
Nathan Sidwell
Nathan Sidwell
parent
d4e6fecb8f
commit
e3feb57152
@ -1,3 +1,19 @@
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2005-04-21 Nathan Sidwell <nathan@codesourcery.com>
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* optabs.c (gen_condiational_trap): Remove #define.
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(add_equal_note): Assertify. Remove explicit indirection from
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call via function pointer.
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(expand_ternary_op, expand_simple_binop, expand_binop,
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expand_twoval_unop, expand_twoval_binop,
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expand_twoval_binop_libfunc, expand_simple_unop expand_unop,
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emit_unop_insn, emit_no_conflict_block, prepare_cmp_insn,
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prepare_operand emit_cmp_and_jump_insn_1, emit_cmp_and_jump_insns,
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prepare_float_lib_cmp, emit_conditional_move,
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emit_conditional_add, gen_add2_insn, gen_add3_insn,
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have_add2_insn, gen_sub2_insn, gen_sub3_insn, have_sub2_insn,
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expand_float, expand_fix, debug_optab_libfuncs, gen_cond_trap,
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vector_compare_rtx, expand_vec_cond_expr): Likewise.
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2005-04-21 Nathan Sidwell <nathan@codesourcery.com>
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* vec.h: Update API to separate allocation mechanism from type.
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242
gcc/optabs.c
242
gcc/optabs.c
@ -127,7 +127,6 @@ static rtx vector_compare_rtx (tree, bool, enum insn_code);
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#ifndef HAVE_conditional_trap
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#define HAVE_conditional_trap 0
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#define gen_conditional_trap(a,b) (abort (), NULL_RTX)
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#endif
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/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
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@ -146,10 +145,7 @@ add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
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rtx last_insn, insn, set;
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rtx note;
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if (! insns
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|| ! INSN_P (insns)
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|| NEXT_INSN (insns) == NULL_RTX)
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abort ();
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gcc_assert (insns && INSN_P (insns) && NEXT_INSN (insns));
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if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
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&& GET_RTX_CLASS (code) != RTX_BIN_ARITH
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@ -348,11 +344,10 @@ expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
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rtx pat;
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rtx xop0 = op0, xop1 = op1, xop2 = op2;
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if (ternary_optab->handlers[(int) mode].insn_code == CODE_FOR_nothing)
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abort ();
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gcc_assert (ternary_optab->handlers[(int) mode].insn_code
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!= CODE_FOR_nothing);
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if (!target
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|| ! (*insn_data[icode].operand[0].predicate) (target, mode))
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if (!target || !insn_data[icode].operand[0].predicate (target, mode))
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temp = gen_reg_rtx (mode);
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else
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temp = target;
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@ -387,15 +382,15 @@ expand_ternary_op (enum machine_mode mode, optab ternary_optab, rtx op0,
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/* Now, if insn's predicates don't allow our operands, put them into
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pseudo regs. */
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if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0)
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if (!insn_data[icode].operand[1].predicate (xop0, mode0)
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&& mode0 != VOIDmode)
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xop0 = copy_to_mode_reg (mode0, xop0);
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if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1)
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if (!insn_data[icode].operand[2].predicate (xop1, mode1)
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&& mode1 != VOIDmode)
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xop1 = copy_to_mode_reg (mode1, xop1);
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if (! (*insn_data[icode].operand[3].predicate) (xop2, mode2)
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if (!insn_data[icode].operand[3].predicate (xop2, mode2)
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&& mode2 != VOIDmode)
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xop2 = copy_to_mode_reg (mode2, xop2);
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@ -927,8 +922,7 @@ expand_simple_binop (enum machine_mode mode, enum rtx_code code, rtx op0,
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enum optab_methods methods)
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{
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optab binop = code_to_optab[(int) code];
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if (binop == 0)
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abort ();
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gcc_assert (binop);
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return expand_binop (mode, binop, op0, op1, target, unsignedp, methods);
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}
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@ -1088,15 +1082,15 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
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/* Now, if insn's predicates don't allow our operands, put them into
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pseudo regs. */
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if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0)
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if (!insn_data[icode].operand[1].predicate (xop0, mode0)
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&& mode0 != VOIDmode)
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xop0 = copy_to_mode_reg (mode0, xop0);
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if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1)
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if (!insn_data[icode].operand[2].predicate (xop1, mode1)
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&& mode1 != VOIDmode)
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xop1 = copy_to_mode_reg (mode1, xop1);
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if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
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if (!insn_data[icode].operand[0].predicate (temp, mode))
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temp = gen_reg_rtx (mode);
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pat = GEN_FCN (icode) (temp, xop0, xop1);
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@ -1829,14 +1823,13 @@ expand_twoval_unop (optab unoptab, rtx op0, rtx targ0, rtx targ1,
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xop0 = convert_to_mode (mode0, xop0, unsignedp);
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/* Now, if insn doesn't accept these operands, put them into pseudos. */
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if (! (*insn_data[icode].operand[2].predicate) (xop0, mode0))
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if (!insn_data[icode].operand[2].predicate (xop0, mode0))
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xop0 = copy_to_mode_reg (mode0, xop0);
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/* We could handle this, but we should always be called with a pseudo
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for our targets and all insns should take them as outputs. */
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if (! (*insn_data[icode].operand[0].predicate) (targ0, mode)
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|| ! (*insn_data[icode].operand[1].predicate) (targ1, mode))
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abort ();
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gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
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gcc_assert (insn_data[icode].operand[1].predicate (targ1, mode));
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pat = GEN_FCN (icode) (targ0, targ1, xop0);
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if (pat)
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@ -1955,17 +1948,16 @@ expand_twoval_binop (optab binoptab, rtx op0, rtx op1, rtx targ0, rtx targ1,
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xop1, unsignedp);
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/* Now, if insn doesn't accept these operands, put them into pseudos. */
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if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
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if (!insn_data[icode].operand[1].predicate (xop0, mode0))
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xop0 = copy_to_mode_reg (mode0, xop0);
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if (! (*insn_data[icode].operand[2].predicate) (xop1, mode1))
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if (!insn_data[icode].operand[2].predicate (xop1, mode1))
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xop1 = copy_to_mode_reg (mode1, xop1);
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/* We could handle this, but we should always be called with a pseudo
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for our targets and all insns should take them as outputs. */
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if (! (*insn_data[icode].operand[0].predicate) (targ0, mode)
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|| ! (*insn_data[icode].operand[3].predicate) (targ1, mode))
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abort ();
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gcc_assert (insn_data[icode].operand[0].predicate (targ0, mode));
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gcc_assert (insn_data[icode].operand[3].predicate (targ1, mode));
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pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1);
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if (pat)
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@ -2028,8 +2020,7 @@ expand_twoval_binop_libfunc (optab binoptab, rtx op0, rtx op1,
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rtx insns;
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/* Exactly one of TARG0 or TARG1 should be non-NULL. */
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if (!((targ0 != NULL_RTX) ^ (targ1 != NULL_RTX)))
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abort ();
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gcc_assert (!targ0 != !targ1);
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mode = GET_MODE (op0);
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if (!binoptab->handlers[(int) mode].libfunc)
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@ -2066,8 +2057,7 @@ expand_simple_unop (enum machine_mode mode, enum rtx_code code, rtx op0,
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rtx target, int unsignedp)
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{
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optab unop = code_to_optab[(int) code];
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if (unop == 0)
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abort ();
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gcc_assert (unop);
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return expand_unop (mode, unop, op0, target, unsignedp);
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}
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@ -2317,10 +2307,10 @@ expand_unop (enum machine_mode mode, optab unoptab, rtx op0, rtx target,
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/* Now, if insn doesn't accept our operand, put it into a pseudo. */
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if (! (*insn_data[icode].operand[1].predicate) (xop0, mode0))
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if (!insn_data[icode].operand[1].predicate (xop0, mode0))
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xop0 = copy_to_mode_reg (mode0, xop0);
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if (! (*insn_data[icode].operand[0].predicate) (temp, mode))
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if (!insn_data[icode].operand[0].predicate (temp, mode))
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temp = gen_reg_rtx (mode);
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pat = GEN_FCN (icode) (temp, xop0);
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@ -2934,10 +2924,10 @@ emit_unop_insn (int icode, rtx target, rtx op0, enum rtx_code code)
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/* Now, if insn does not accept our operands, put them into pseudos. */
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if (! (*insn_data[icode].operand[1].predicate) (op0, mode0))
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if (!insn_data[icode].operand[1].predicate (op0, mode0))
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op0 = copy_to_mode_reg (mode0, op0);
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if (! (*insn_data[icode].operand[0].predicate) (temp, GET_MODE (temp))
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if (!insn_data[icode].operand[0].predicate (temp, GET_MODE (temp))
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|| (flag_force_mem && MEM_P (temp)))
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temp = gen_reg_rtx (GET_MODE (temp));
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@ -3022,8 +3012,7 @@ emit_no_conflict_block (rtx insns, rtx target, rtx op0, rtx op1, rtx equiv)
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}
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}
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if (set == 0)
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abort ();
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gcc_assert (set);
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if (! reg_overlap_mentioned_p (target, SET_DEST (set)))
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{
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@ -3365,8 +3354,7 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
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/* Abort if we have a non-canonical comparison. The RTL documentation
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states that canonical comparisons are required only for targets which
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have cc0. */
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if (CONSTANT_P (x) && ! CONSTANT_P (y))
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abort ();
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gcc_assert (!CONSTANT_P (x) || CONSTANT_P (y));
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#endif
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/* Don't let both operands fail to indicate the mode. */
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@ -3385,8 +3373,7 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
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rtx opalign
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= GEN_INT (MIN (MEM_ALIGN (x), MEM_ALIGN (y)) / BITS_PER_UNIT);
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if (size == 0)
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abort ();
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gcc_assert (size);
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/* Try to use a memory block compare insn - either cmpstr
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or cmpmem will do. */
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@ -3483,11 +3470,8 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size,
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return;
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}
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if (class == MODE_FLOAT)
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prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
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else
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abort ();
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gcc_assert (class == MODE_FLOAT);
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prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp);
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}
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/* Before emitting an insn with code ICODE, make sure that X, which is going
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@ -3502,7 +3486,7 @@ prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
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if (mode != wider_mode)
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x = convert_modes (wider_mode, mode, x, unsignedp);
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if (! (*insn_data[icode].operand[opnum].predicate)
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if (!insn_data[icode].operand[opnum].predicate
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(x, insn_data[icode].operand[opnum].mode))
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{
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if (no_new_pseudos)
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@ -3537,7 +3521,7 @@ emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
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icode = cbranch_optab->handlers[(int) wider_mode].insn_code;
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if (icode != CODE_FOR_nothing
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&& (*insn_data[icode].operand[0].predicate) (test, wider_mode))
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&& insn_data[icode].operand[0].predicate (test, wider_mode))
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{
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x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp);
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y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp);
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@ -3553,7 +3537,7 @@ emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
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x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp);
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emit_insn (GEN_FCN (icode) (x));
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if (label)
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emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
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emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
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return;
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}
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@ -3566,7 +3550,7 @@ emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
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y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp);
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emit_insn (GEN_FCN (icode) (x, y));
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if (label)
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emit_jump_insn ((*bcc_gen_fctn[(int) comparison]) (label));
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emit_jump_insn (bcc_gen_fctn[(int) comparison] (label));
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return;
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}
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@ -3578,7 +3562,7 @@ emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode,
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}
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while (wider_mode != VOIDmode);
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abort ();
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gcc_unreachable ();
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}
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/* Generate code to compare X with Y so that the condition codes are
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@ -3609,8 +3593,7 @@ emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size,
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{
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/* If we're not emitting a branch, this means some caller
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is out of sync. */
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if (! label)
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abort ();
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gcc_assert (label);
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op0 = y, op1 = x;
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comparison = swap_condition (comparison);
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@ -3681,8 +3664,7 @@ prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
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}
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}
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if (mode == VOIDmode)
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abort ();
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gcc_assert (mode != VOIDmode);
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if (mode != orig_mode)
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{
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@ -3740,7 +3722,7 @@ prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
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break;
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default:
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abort ();
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gcc_unreachable ();
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}
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equiv = simplify_gen_ternary (IF_THEN_ELSE, word_mode, word_mode,
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equiv, true_rtx, false_rtx);
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@ -3772,8 +3754,8 @@ prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison,
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void
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emit_indirect_jump (rtx loc)
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{
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if (! ((*insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate)
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(loc, Pmode)))
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if (!insn_data[(int) CODE_FOR_indirect_jump].operand[0].predicate
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(loc, Pmode))
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loc = copy_to_mode_reg (Pmode, loc);
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emit_jump_insn (gen_indirect_jump (loc));
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@ -3858,15 +3840,15 @@ emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1,
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/* If the insn doesn't accept these operands, put them in pseudos. */
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if (! (*insn_data[icode].operand[0].predicate)
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if (!insn_data[icode].operand[0].predicate
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(subtarget, insn_data[icode].operand[0].mode))
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subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
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if (! (*insn_data[icode].operand[2].predicate)
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if (!insn_data[icode].operand[2].predicate
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(op2, insn_data[icode].operand[2].mode))
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op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
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if (! (*insn_data[icode].operand[3].predicate)
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if (!insn_data[icode].operand[3].predicate
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(op3, insn_data[icode].operand[3].mode))
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op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
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@ -3990,17 +3972,17 @@ emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
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/* If the insn doesn't accept these operands, put them in pseudos. */
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if (! (*insn_data[icode].operand[0].predicate)
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if (!insn_data[icode].operand[0].predicate
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(target, insn_data[icode].operand[0].mode))
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subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode);
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else
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subtarget = target;
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if (! (*insn_data[icode].operand[2].predicate)
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if (!insn_data[icode].operand[2].predicate
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(op2, insn_data[icode].operand[2].mode))
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op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
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if (! (*insn_data[icode].operand[3].predicate)
|
||||
if (!insn_data[icode].operand[3].predicate
|
||||
(op3, insn_data[icode].operand[3].mode))
|
||||
op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3);
|
||||
|
||||
@ -4042,15 +4024,14 @@ gen_add2_insn (rtx x, rtx y)
|
||||
{
|
||||
int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
|
||||
|
||||
if (! ((*insn_data[icode].operand[0].predicate)
|
||||
(x, insn_data[icode].operand[0].mode))
|
||||
|| ! ((*insn_data[icode].operand[1].predicate)
|
||||
(x, insn_data[icode].operand[1].mode))
|
||||
|| ! ((*insn_data[icode].operand[2].predicate)
|
||||
(y, insn_data[icode].operand[2].mode)))
|
||||
abort ();
|
||||
gcc_assert (insn_data[icode].operand[0].predicate
|
||||
(x, insn_data[icode].operand[0].mode));
|
||||
gcc_assert (insn_data[icode].operand[1].predicate
|
||||
(x, insn_data[icode].operand[1].mode));
|
||||
gcc_assert (insn_data[icode].operand[2].predicate
|
||||
(y, insn_data[icode].operand[2].mode));
|
||||
|
||||
return (GEN_FCN (icode) (x, x, y));
|
||||
return GEN_FCN (icode) (x, x, y);
|
||||
}
|
||||
|
||||
/* Generate and return an insn body to add r1 and c,
|
||||
@ -4061,15 +4042,15 @@ gen_add3_insn (rtx r0, rtx r1, rtx c)
|
||||
int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
|
||||
|
||||
if (icode == CODE_FOR_nothing
|
||||
|| ! ((*insn_data[icode].operand[0].predicate)
|
||||
(r0, insn_data[icode].operand[0].mode))
|
||||
|| ! ((*insn_data[icode].operand[1].predicate)
|
||||
(r1, insn_data[icode].operand[1].mode))
|
||||
|| ! ((*insn_data[icode].operand[2].predicate)
|
||||
(c, insn_data[icode].operand[2].mode)))
|
||||
|| !(insn_data[icode].operand[0].predicate
|
||||
(r0, insn_data[icode].operand[0].mode))
|
||||
|| !(insn_data[icode].operand[1].predicate
|
||||
(r1, insn_data[icode].operand[1].mode))
|
||||
|| !(insn_data[icode].operand[2].predicate
|
||||
(c, insn_data[icode].operand[2].mode)))
|
||||
return NULL_RTX;
|
||||
|
||||
return (GEN_FCN (icode) (r0, r1, c));
|
||||
return GEN_FCN (icode) (r0, r1, c);
|
||||
}
|
||||
|
||||
int
|
||||
@ -4077,20 +4058,19 @@ have_add2_insn (rtx x, rtx y)
|
||||
{
|
||||
int icode;
|
||||
|
||||
if (GET_MODE (x) == VOIDmode)
|
||||
abort ();
|
||||
gcc_assert (GET_MODE (x) != VOIDmode);
|
||||
|
||||
icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code;
|
||||
|
||||
if (icode == CODE_FOR_nothing)
|
||||
return 0;
|
||||
|
||||
if (! ((*insn_data[icode].operand[0].predicate)
|
||||
(x, insn_data[icode].operand[0].mode))
|
||||
|| ! ((*insn_data[icode].operand[1].predicate)
|
||||
(x, insn_data[icode].operand[1].mode))
|
||||
|| ! ((*insn_data[icode].operand[2].predicate)
|
||||
(y, insn_data[icode].operand[2].mode)))
|
||||
if (!(insn_data[icode].operand[0].predicate
|
||||
(x, insn_data[icode].operand[0].mode))
|
||||
|| !(insn_data[icode].operand[1].predicate
|
||||
(x, insn_data[icode].operand[1].mode))
|
||||
|| !(insn_data[icode].operand[2].predicate
|
||||
(y, insn_data[icode].operand[2].mode)))
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
@ -4103,15 +4083,14 @@ gen_sub2_insn (rtx x, rtx y)
|
||||
{
|
||||
int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
|
||||
|
||||
if (! ((*insn_data[icode].operand[0].predicate)
|
||||
(x, insn_data[icode].operand[0].mode))
|
||||
|| ! ((*insn_data[icode].operand[1].predicate)
|
||||
(x, insn_data[icode].operand[1].mode))
|
||||
|| ! ((*insn_data[icode].operand[2].predicate)
|
||||
(y, insn_data[icode].operand[2].mode)))
|
||||
abort ();
|
||||
gcc_assert (insn_data[icode].operand[0].predicate
|
||||
(x, insn_data[icode].operand[0].mode));
|
||||
gcc_assert (insn_data[icode].operand[1].predicate
|
||||
(x, insn_data[icode].operand[1].mode));
|
||||
gcc_assert (insn_data[icode].operand[2].predicate
|
||||
(y, insn_data[icode].operand[2].mode));
|
||||
|
||||
return (GEN_FCN (icode) (x, x, y));
|
||||
return GEN_FCN (icode) (x, x, y);
|
||||
}
|
||||
|
||||
/* Generate and return an insn body to subtract r1 and c,
|
||||
@ -4122,15 +4101,15 @@ gen_sub3_insn (rtx r0, rtx r1, rtx c)
|
||||
int icode = (int) sub_optab->handlers[(int) GET_MODE (r0)].insn_code;
|
||||
|
||||
if (icode == CODE_FOR_nothing
|
||||
|| ! ((*insn_data[icode].operand[0].predicate)
|
||||
(r0, insn_data[icode].operand[0].mode))
|
||||
|| ! ((*insn_data[icode].operand[1].predicate)
|
||||
(r1, insn_data[icode].operand[1].mode))
|
||||
|| ! ((*insn_data[icode].operand[2].predicate)
|
||||
(c, insn_data[icode].operand[2].mode)))
|
||||
|| !(insn_data[icode].operand[0].predicate
|
||||
(r0, insn_data[icode].operand[0].mode))
|
||||
|| !(insn_data[icode].operand[1].predicate
|
||||
(r1, insn_data[icode].operand[1].mode))
|
||||
|| !(insn_data[icode].operand[2].predicate
|
||||
(c, insn_data[icode].operand[2].mode)))
|
||||
return NULL_RTX;
|
||||
|
||||
return (GEN_FCN (icode) (r0, r1, c));
|
||||
return GEN_FCN (icode) (r0, r1, c);
|
||||
}
|
||||
|
||||
int
|
||||
@ -4138,20 +4117,19 @@ have_sub2_insn (rtx x, rtx y)
|
||||
{
|
||||
int icode;
|
||||
|
||||
if (GET_MODE (x) == VOIDmode)
|
||||
abort ();
|
||||
gcc_assert (GET_MODE (x) != VOIDmode);
|
||||
|
||||
icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code;
|
||||
|
||||
if (icode == CODE_FOR_nothing)
|
||||
return 0;
|
||||
|
||||
if (! ((*insn_data[icode].operand[0].predicate)
|
||||
(x, insn_data[icode].operand[0].mode))
|
||||
|| ! ((*insn_data[icode].operand[1].predicate)
|
||||
(x, insn_data[icode].operand[1].mode))
|
||||
|| ! ((*insn_data[icode].operand[2].predicate)
|
||||
(y, insn_data[icode].operand[2].mode)))
|
||||
if (!(insn_data[icode].operand[0].predicate
|
||||
(x, insn_data[icode].operand[0].mode))
|
||||
|| !(insn_data[icode].operand[1].predicate
|
||||
(x, insn_data[icode].operand[1].mode))
|
||||
|| !(insn_data[icode].operand[2].predicate
|
||||
(y, insn_data[icode].operand[2].mode)))
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
@ -4265,8 +4243,7 @@ expand_float (rtx to, rtx from, int unsignedp)
|
||||
enum machine_mode fmode, imode;
|
||||
|
||||
/* Crash now, because we won't be able to decide which mode to use. */
|
||||
if (GET_MODE (from) == VOIDmode)
|
||||
abort ();
|
||||
gcc_assert (GET_MODE (from) != VOIDmode);
|
||||
|
||||
/* Look for an insn to do the conversion. Do it in the specified
|
||||
modes if possible; otherwise convert either input, output or both to
|
||||
@ -4427,8 +4404,7 @@ expand_float (rtx to, rtx from, int unsignedp)
|
||||
from = force_not_mem (from);
|
||||
|
||||
libfunc = tab->handlers[GET_MODE (to)][GET_MODE (from)].libfunc;
|
||||
if (!libfunc)
|
||||
abort ();
|
||||
gcc_assert (libfunc);
|
||||
|
||||
start_sequence ();
|
||||
|
||||
@ -4611,8 +4587,7 @@ expand_fix (rtx to, rtx from, int unsignedp)
|
||||
|
||||
convert_optab tab = unsignedp ? ufix_optab : sfix_optab;
|
||||
libfunc = tab->handlers[GET_MODE (to)][GET_MODE (from)].libfunc;
|
||||
if (!libfunc)
|
||||
abort ();
|
||||
gcc_assert (libfunc);
|
||||
|
||||
if (flag_force_mem)
|
||||
from = force_not_mem (from);
|
||||
@ -5267,8 +5242,7 @@ debug_optab_libfuncs (void)
|
||||
h = &o->handlers[j];
|
||||
if (h->libfunc)
|
||||
{
|
||||
if (GET_CODE (h->libfunc) != SYMBOL_REF)
|
||||
abort ();
|
||||
gcc_assert (GET_CODE (h->libfunc) = SYMBOL_REF);
|
||||
fprintf (stderr, "%s\t%s:\t%s\n",
|
||||
GET_RTX_NAME (o->code),
|
||||
GET_MODE_NAME (j),
|
||||
@ -5288,8 +5262,7 @@ debug_optab_libfuncs (void)
|
||||
h = &o->handlers[j][k];
|
||||
if (h->libfunc)
|
||||
{
|
||||
if (GET_CODE (h->libfunc) != SYMBOL_REF)
|
||||
abort ();
|
||||
gcc_assert (GET_CODE (h->libfunc) = SYMBOL_REF);
|
||||
fprintf (stderr, "%s\t%s\t%s:\t%s\n",
|
||||
GET_RTX_NAME (o->code),
|
||||
GET_MODE_NAME (j),
|
||||
@ -5334,6 +5307,7 @@ gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1,
|
||||
emit_insn (GEN_FCN (icode) (op1, op2));
|
||||
|
||||
PUT_CODE (trap_rtx, code);
|
||||
gcc_assert (HAVE_conditional_trap);
|
||||
insn = gen_conditional_trap (trap_rtx, tcode);
|
||||
if (insn)
|
||||
{
|
||||
@ -5399,7 +5373,7 @@ get_rtx_code (enum tree_code tcode, bool unsignedp)
|
||||
break;
|
||||
|
||||
default:
|
||||
abort ();
|
||||
gcc_unreachable ();
|
||||
}
|
||||
return code;
|
||||
}
|
||||
@ -5414,29 +5388,23 @@ vector_compare_rtx (tree cond, bool unsignedp, enum insn_code icode)
|
||||
tree t_op0, t_op1;
|
||||
rtx rtx_op0, rtx_op1;
|
||||
|
||||
if (!COMPARISON_CLASS_P (cond))
|
||||
{
|
||||
/* This is unlikely. While generating VEC_COND_EXPR,
|
||||
auto vectorizer ensures that condition is a relational
|
||||
operation. */
|
||||
abort ();
|
||||
}
|
||||
else
|
||||
{
|
||||
rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
|
||||
t_op0 = TREE_OPERAND (cond, 0);
|
||||
t_op1 = TREE_OPERAND (cond, 1);
|
||||
}
|
||||
/* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
|
||||
ensures that condition is a relational operation. */
|
||||
gcc_assert (COMPARISON_CLASS_P (cond));
|
||||
|
||||
rcode = get_rtx_code (TREE_CODE (cond), unsignedp);
|
||||
t_op0 = TREE_OPERAND (cond, 0);
|
||||
t_op1 = TREE_OPERAND (cond, 1);
|
||||
|
||||
/* Expand operands. */
|
||||
rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)), 1);
|
||||
rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)), 1);
|
||||
|
||||
if (!(*insn_data[icode].operand[4].predicate) (rtx_op0, GET_MODE (rtx_op0))
|
||||
if (!insn_data[icode].operand[4].predicate (rtx_op0, GET_MODE (rtx_op0))
|
||||
&& GET_MODE (rtx_op0) != VOIDmode)
|
||||
rtx_op0 = force_reg (GET_MODE (rtx_op0), rtx_op0);
|
||||
|
||||
if (!(*insn_data[icode].operand[5].predicate) (rtx_op1, GET_MODE (rtx_op1))
|
||||
if (!insn_data[icode].operand[5].predicate (rtx_op1, GET_MODE (rtx_op1))
|
||||
&& GET_MODE (rtx_op1) != VOIDmode)
|
||||
rtx_op1 = force_reg (GET_MODE (rtx_op1), rtx_op1);
|
||||
|
||||
@ -5493,13 +5461,13 @@ expand_vec_cond_expr (tree vec_cond_expr, rtx target)
|
||||
/* Expand both operands and force them in reg, if required. */
|
||||
rtx_op1 = expand_expr (TREE_OPERAND (vec_cond_expr, 1),
|
||||
NULL_RTX, VOIDmode, 1);
|
||||
if (!(*insn_data[icode].operand[1].predicate) (rtx_op1, mode)
|
||||
if (!insn_data[icode].operand[1].predicate (rtx_op1, mode)
|
||||
&& mode != VOIDmode)
|
||||
rtx_op1 = force_reg (mode, rtx_op1);
|
||||
|
||||
rtx_op2 = expand_expr (TREE_OPERAND (vec_cond_expr, 2),
|
||||
NULL_RTX, VOIDmode, 1);
|
||||
if (!(*insn_data[icode].operand[2].predicate) (rtx_op2, mode)
|
||||
if (!insn_data[icode].operand[2].predicate (rtx_op2, mode)
|
||||
&& mode != VOIDmode)
|
||||
rtx_op2 = force_reg (mode, rtx_op2);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user