i386.md (zeroing peephole2): Use general_reg_operand.
* config/i386/i386.md (zeroing peephole2): Use general_reg_operand. (or $-1,reg peephole2): Ditto. (strict_low_part zeroing peephole2): Use SWI12 mode iterator. From-SVN: r235581
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@ -1,4 +1,10 @@
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2016-04-28 Markus Trippelsdorf <markus@trippelsdorf.de>
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2016-04-28 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (zeroing peephole2): Use general_reg_operand.
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(or $-1,reg peephole2): Ditto.
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(strict_low_part zeroing peephole2): Use SWI12 mode iterator.
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2016-04-28 Markus Trippelsdorf <markus@trippelsdorf.de>
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* doc/extend.texi (Common Function Attributes) [optimize]:
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Discourage use of the optimize attribute.
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@ -18124,34 +18124,30 @@
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copy_rtx (operands[2]));
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})
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;; Attempt to always use XOR for zeroing registers.
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;; Attempt to always use XOR for zeroing registers (including FP modes).
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(define_peephole2
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[(set (match_operand 0 "register_operand")
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[(set (match_operand 0 "general_reg_operand")
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(match_operand 1 "const0_operand"))]
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"GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
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&& (! TARGET_USE_MOV0 || optimize_insn_for_size_p ())
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&& GENERAL_REGNO_P (REGNO (operands[0]))
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&& peep2_regno_dead_p (0, FLAGS_REG)"
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[(parallel [(set (match_dup 0) (const_int 0))
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(clobber (reg:CC FLAGS_REG))])]
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"operands[0] = gen_lowpart (word_mode, operands[0]);")
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(define_peephole2
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[(set (strict_low_part (match_operand 0 "register_operand"))
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[(set (strict_low_part (match_operand:SWI12 0 "general_reg_operand"))
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(const_int 0))]
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"(GET_MODE (operands[0]) == QImode
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|| GET_MODE (operands[0]) == HImode)
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&& (! TARGET_USE_MOV0 || optimize_insn_for_size_p ())
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"(! TARGET_USE_MOV0 || optimize_insn_for_size_p ())
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&& peep2_regno_dead_p (0, FLAGS_REG)"
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[(parallel [(set (strict_low_part (match_dup 0)) (const_int 0))
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(clobber (reg:CC FLAGS_REG))])])
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;; For HI, SI and DI modes, or $-1,reg is smaller than mov $-1,reg.
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(define_peephole2
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[(set (match_operand:SWI248 0 "register_operand")
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[(set (match_operand:SWI248 0 "general_reg_operand")
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(const_int -1))]
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"(optimize_insn_for_size_p () || TARGET_MOVE_M1_VIA_OR)
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&& GENERAL_REGNO_P (REGNO (operands[0]))
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"(TARGET_MOVE_M1_VIA_OR || optimize_insn_for_size_p ())
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&& peep2_regno_dead_p (0, FLAGS_REG)"
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[(parallel [(set (match_dup 0) (const_int -1))
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(clobber (reg:CC FLAGS_REG))])]
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