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backport: fpu-387.h (_FPU_MASK_ALL): New. 

Backport from mainline
	2013-06-20  Uros Bizjak  <ubizjak@gmail.com>

	* config/fpu-387.h (_FPU_MASK_ALL): New.
	(_FPU_EX_ALL): Ditto.
	(set_fpu): Use fstcw to store x87 FPU control word. Use fnclex to
	clear stalled exception flags.  Correctly clear stalled SSE
	exception flags.  Simplify code.

	Backport from mainline
	2013-06-19  Uros Bizjak  <ubizjak@gmail.com>

	* config/fpu-387.h: Use __asm__ and __volatile__ consistently.

From-SVN: r200635
This commit is contained in:
Uros Bizjak 2013-07-03 11:59:55 +02:00 committed by Uros Bizjak
parent 9c42cfb23b
commit e4befe529c
2 changed files with 38 additions and 22 deletions
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16
libgfortran/ChangeLog
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@ -1,3 +1,19 @@
2013-07-03 Uros Bizjak <ubizjak@gmail.com>
Backport from mainline
2013-06-20 Uros Bizjak <ubizjak@gmail.com>
* config/fpu-387.h (_FPU_MASK_ALL): New.
(_FPU_EX_ALL): Ditto.
(set_fpu): Use fstcw to store x87 FPU control word. Use fnclex to
clear stalled exception flags. Correctly clear stalled SSE
exception flags. Simplify code.
Backport from mainline
2013-06-19 Uros Bizjak <ubizjak@gmail.com>
* config/fpu-387.h: Use __asm__ and __volatile__ consistently.
2013-04-28 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Backport from mainline:

44
libgfortran/config/fpu-387.h
View File

@ -73,7 +73,7 @@ has_sse (void)
/* We need a single SSE instruction here so the handler can safely skip
over it. */
__asm__ volatile ("movaps %xmm0,%xmm0");
__asm__ __volatile__ ("movaps\t%xmm0,%xmm0");
sigaction (SIGILL, &oact, NULL);
@ -95,42 +95,42 @@ has_sse (void)
#define _FPU_MASK_OM 0x08
#define _FPU_MASK_UM 0x10
#define _FPU_MASK_PM 0x20
#define _FPU_MASK_ALL 0x3f
#define _FPU_EX_ALL 0x3f
void set_fpu (void)
{
int excepts = 0;
unsigned short cw;
asm volatile ("fnstcw %0" : "=m" (cw));
__asm__ __volatile__ ("fstcw\t%0" : "=m" (cw));
cw |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM
| _FPU_MASK_UM | _FPU_MASK_PM);
if (options.fpe & GFC_FPE_INVALID) excepts |= _FPU_MASK_IM;
if (options.fpe & GFC_FPE_DENORMAL) excepts |= _FPU_MASK_DM;
if (options.fpe & GFC_FPE_ZERO) excepts |= _FPU_MASK_ZM;
if (options.fpe & GFC_FPE_OVERFLOW) excepts |= _FPU_MASK_OM;
if (options.fpe & GFC_FPE_UNDERFLOW) excepts |= _FPU_MASK_UM;
if (options.fpe & GFC_FPE_INEXACT) excepts |= _FPU_MASK_PM;
if (options.fpe & GFC_FPE_INVALID) cw &= ~_FPU_MASK_IM;
if (options.fpe & GFC_FPE_DENORMAL) cw &= ~_FPU_MASK_DM;
if (options.fpe & GFC_FPE_ZERO) cw &= ~_FPU_MASK_ZM;
if (options.fpe & GFC_FPE_OVERFLOW) cw &= ~_FPU_MASK_OM;
if (options.fpe & GFC_FPE_UNDERFLOW) cw &= ~_FPU_MASK_UM;
if (options.fpe & GFC_FPE_INEXACT) cw &= ~_FPU_MASK_PM;
cw |= _FPU_MASK_ALL;
cw &= ~excepts;
asm volatile ("fldcw %0" : : "m" (cw));
__asm__ __volatile__ ("fnclex\n\tfldcw\t%0" : : "m" (cw));
if (has_sse())
{
unsigned int cw_sse;
asm volatile ("%vstmxcsr %0" : "=m" (cw_sse));
__asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse));
cw_sse &= 0xffff0000;
cw_sse |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM
| _FPU_MASK_UM | _FPU_MASK_PM ) << 7;
/* The SSE exception masks are shifted by 7 bits. */
cw_sse |= _FPU_MASK_ALL << 7;
cw_sse &= ~(excepts << 7);
if (options.fpe & GFC_FPE_INVALID) cw_sse &= ~(_FPU_MASK_IM << 7);
if (options.fpe & GFC_FPE_DENORMAL) cw_sse &= ~(_FPU_MASK_DM << 7);
if (options.fpe & GFC_FPE_ZERO) cw_sse &= ~(_FPU_MASK_ZM << 7);
if (options.fpe & GFC_FPE_OVERFLOW) cw_sse &= ~(_FPU_MASK_OM << 7);
if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse &= ~(_FPU_MASK_UM << 7);
if (options.fpe & GFC_FPE_INEXACT) cw_sse &= ~(_FPU_MASK_PM << 7);
/* Clear stalled exception flags. */
cw_sse &= ~_FPU_EX_ALL;
asm volatile ("%vldmxcsr %0" : : "m" (cw_sse));
__asm__ __volatile__ ("%vldmxcsr\t%0" : : "m" (cw_sse));
}
}