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htm.md (tabort, [...]): Use xor instead of minus. 

2014-09-11  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/htm.md (tabort, tabortdc, tabortdci, tabortwc,
	tabortwci, tbegin, tcheck, tend, trechkpt, treclaim, tsr): Use xor
	instead of minus.
	* config/rs6000/vector.md (cr6_test_for_zero_reverse,
	cr6_test_for_lt_reverse): Ditto.

From-SVN: r215187
This commit is contained in:
Segher Boessenkool 2014-09-11 20:29:50 +02:00 committed by Segher Boessenkool
parent 450bfd7d5c
commit e4fb6f093c
3 changed files with 36 additions and 13 deletions
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8
gcc/ChangeLog
View File

@ -1,3 +1,11 @@
2014-09-11 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/htm.md (tabort, tabortdc, tabortdci, tabortwc,
tabortwci, tbegin, tcheck, tend, trechkpt, treclaim, tsr): Use xor
instead of minus.
* config/rs6000/vector.md (cr6_test_for_zero_reverse,
cr6_test_for_lt_reverse): Ditto.
2014-09-11 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/61489

33
gcc/config/rs6000/htm.md
View File

@ -55,7 +55,8 @@
(eq:SI (match_dup 2)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 3)))]
(xor:SI (match_dup 3)
(const_int 1)))]
"TARGET_HTM"
{
operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -81,7 +82,8 @@
(eq:SI (match_dup 4)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 5)))]
(xor:SI (match_dup 5)
(const_int 1)))]
"TARGET_HTM"
{
operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -109,7 +111,8 @@
(eq:SI (match_dup 4)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 5)))]
(xor:SI (match_dup 5)
(const_int 1)))]
"TARGET_HTM"
{
operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -137,7 +140,8 @@
(eq:SI (match_dup 4)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 5)))]
(xor:SI (match_dup 5)
(const_int 1)))]
"TARGET_HTM"
{
operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -165,7 +169,8 @@
(eq:SI (match_dup 4)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 5)))]
(xor:SI (match_dup 5)
(const_int 1)))]
"TARGET_HTM"
{
operands[4] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -209,7 +214,8 @@
(eq:SI (match_dup 2)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 3)))]
(xor:SI (match_dup 3)
(const_int 1)))]
"TARGET_HTM"
{
operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -233,7 +239,8 @@
(eq:SI (match_dup 2)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 3)))]
(xor:SI (match_dup 3)
(const_int 1)))]
"TARGET_HTM"
{
operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -257,7 +264,8 @@
(eq:SI (match_dup 2)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 3)))]
(xor:SI (match_dup 3)
(const_int 1)))]
"TARGET_HTM"
{
operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -281,7 +289,8 @@
(eq:SI (match_dup 1)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 2)))]
(xor:SI (match_dup 2)
(const_int 1)))]
"TARGET_HTM"
{
operands[1] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -305,7 +314,8 @@
(eq:SI (match_dup 2)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 3)))]
(xor:SI (match_dup 3)
(const_int 1)))]
"TARGET_HTM"
{
operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);
@ -329,7 +339,8 @@
(eq:SI (match_dup 2)
(const_int 0)))
(set (match_operand:SI 0 "int_reg_operand" "")
(minus:SI (const_int 1) (match_dup 3)))]
(xor:SI (match_dup 3)
(const_int 1)))]
"TARGET_HTM"
{
operands[2] = gen_rtx_REG (CCmode, CR0_REGNO);

8
gcc/config/rs6000/vector.md
View File

@ -686,7 +686,9 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(eq:SI (reg:CC 74)
(const_int 0)))
(set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))]
(set (match_dup 0)
(xor:SI (match_dup 0)
(const_int 1)))]
"TARGET_ALTIVEC || TARGET_VSX"
"")
@ -701,7 +703,9 @@
[(set (match_operand:SI 0 "register_operand" "=r")
(lt:SI (reg:CC 74)
(const_int 0)))
(set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))]
(set (match_dup 0)
(xor:SI (match_dup 0)
(const_int 1)))]
"TARGET_ALTIVEC || TARGET_VSX"
"")