Fix compile time warnings for arm-pe target.
From-SVN: r33069
This commit is contained in:
Nick Clifton
Nick Clifton
parent
dc4a31ee33
commit
e59512633b
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@ -1,3 +1,26 @@
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2000-04-10 Nick Clifton <nickc@cygnus.com>
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* config/arm/arm.h (HOST_INT): New macro: Declare a HOST_WIDE_INT
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integer.
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(HOST_UINT): New macro: Declare an unsigned HOST_WIDE_INT
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integer.
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(ARM_SIGN_EXTEND): Use HOST_UINT.
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(STRIP_NAME_ENCODING): Prevent warnings about redefinitions.
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(ASM_OUTPUT_LABELREF): Prevent warnings about redefinitions.
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(INCOMING_RETURN_ADDR_RTX): Only define if Dwarf2 is supported.
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(DWARF_FRAME_RETURN_COLUMN): Only define if Dwarf2 is supported.
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* config/arm/arm.c: (const_ok_for_arm): Use HOST_UINT.
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(arm_gen_constant): Use HOST_UINT.
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(arm_canonicalize_constant): Use HOST_UINT.
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(arm_reload_in_hi): Use HOST_UINT.
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(arm_reload_out_hi): Use HOST_UINT.
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(output_multi_immediate): Use HOST_UINT.
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(int_log2): Use HOST_UINT.
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(arm_poke_function_name): Use HOST_UINT.
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(arm_output_epilogue): Use arm_volatile_func().
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(output_thumb_prologue): Use arm_strip_name_encoding().
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Mon Apr 10 15:40:59 2000 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
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* sbitmap.c (sbitmap_a_subset_b_p): Rework loop to avoid potential
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@ -722,14 +722,14 @@ int
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const_ok_for_arm (i)
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HOST_WIDE_INT i;
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{
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unsigned HOST_WIDE_INT mask = ~(unsigned HOST_WIDE_INT)0xFF;
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unsigned HOST_WIDE_INT mask = ~ HOST_UINT (0xFF);
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/* For machines with >32 bit HOST_WIDE_INT, the bits above bit 31 must
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be all zero, or all one. */
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if ((i & ~(unsigned HOST_WIDE_INT) 0xffffffff) != 0
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&& ((i & ~(unsigned HOST_WIDE_INT) 0xffffffff)
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!= ((~(unsigned HOST_WIDE_INT) 0)
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& ~(unsigned HOST_WIDE_INT) 0xffffffff)))
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if ((i & ~ HOST_UINT (0xffffffff)) != 0
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&& ((i & ~ HOST_UINT (0xffffffff))
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!= ((~ HOST_UINT (0))
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& ~ HOST_UINT (0xffffffff))))
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return FALSE;
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/* Fast return for 0 and powers of 2 */
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@ -738,12 +738,12 @@ const_ok_for_arm (i)
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do
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{
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if ((i & mask & (unsigned HOST_WIDE_INT) 0xffffffff) == 0)
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if ((i & mask & HOST_UINT (0xffffffff)) == 0)
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return TRUE;
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mask =
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(mask << 2) | ((mask & (unsigned HOST_WIDE_INT) 0xffffffff)
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>> (32 - 2)) | ~((unsigned HOST_WIDE_INT) 0xffffffff);
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} while (mask != ~(unsigned HOST_WIDE_INT) 0xFF);
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(mask << 2) | ((mask & HOST_UINT (0xffffffff))
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>> (32 - 2)) | ~(HOST_UINT (0xffffffff));
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} while (mask != ~ HOST_UINT (0xFF));
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return FALSE;
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}
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@ -863,7 +863,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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int set_zero_bit_copies = 0;
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int insns = 0;
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unsigned HOST_WIDE_INT temp1, temp2;
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unsigned HOST_WIDE_INT remainder = val & (unsigned HOST_WIDE_INT)0xffffffff;
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unsigned HOST_WIDE_INT remainder = val & HOST_UINT (0xffffffff);
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/* Find out which operations are safe for a given CODE. Also do a quick
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check for degenerate cases; these can occur when DImode operations
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@ -882,7 +882,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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break;
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case IOR:
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if (remainder == (unsigned HOST_WIDE_INT)0xffffffff)
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if (remainder == HOST_UINT (0xffffffff))
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{
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if (generate)
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emit_insn (gen_rtx_SET (VOIDmode, target,
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@ -906,7 +906,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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emit_insn (gen_rtx_SET (VOIDmode, target, const0_rtx));
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return 1;
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}
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if (remainder == (unsigned HOST_WIDE_INT)0xffffffff)
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if (remainder == HOST_UINT (0xffffffff))
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{
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if (reload_completed && rtx_equal_p (target, source))
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return 0;
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@ -926,7 +926,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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emit_insn (gen_rtx_SET (VOIDmode, target, source));
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return 1;
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}
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if (remainder == (unsigned HOST_WIDE_INT)0xffffffff)
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if (remainder == HOST_UINT (0xffffffff))
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{
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if (generate)
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emit_insn (gen_rtx_SET (VOIDmode, target,
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@ -1054,16 +1054,16 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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word. We only look for the simplest cases, to do more would cost
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too much. Be careful, however, not to generate this when the
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alternative would take fewer insns. */
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if (val & (unsigned HOST_WIDE_INT)0xffff0000)
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if (val & HOST_UINT (0xffff0000))
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{
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temp1 = remainder & (unsigned HOST_WIDE_INT)0xffff0000;
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temp1 = remainder & HOST_UINT (0xffff0000);
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temp2 = remainder & 0x0000ffff;
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/* Overlaps outside this range are best done using other methods. */
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for (i = 9; i < 24; i++)
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{
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if ((((temp2 | (temp2 << i))
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& (unsigned HOST_WIDE_INT)0xffffffff) == remainder)
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& HOST_UINT (0xffffffff)) == remainder)
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&& ! const_ok_for_arm (temp2))
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{
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rtx new_src = (subtargets
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@ -1201,11 +1201,11 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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/* See if two shifts will do 2 or more insn's worth of work. */
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if (clear_sign_bit_copies >= 16 && clear_sign_bit_copies < 24)
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{
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HOST_WIDE_INT shift_mask = ((((unsigned HOST_WIDE_INT)0xffffffff)
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HOST_WIDE_INT shift_mask = (((HOST_UINT (0xffffffff))
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<< (32 - clear_sign_bit_copies))
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& (unsigned HOST_WIDE_INT)0xffffffff);
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& HOST_UINT (0xffffffff));
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if ((remainder | shift_mask) != (unsigned HOST_WIDE_INT)0xffffffff)
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if ((remainder | shift_mask) != HOST_UINT (0xffffffff))
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{
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if (generate)
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{
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@ -1238,7 +1238,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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{
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HOST_WIDE_INT shift_mask = (1 << clear_zero_bit_copies) - 1;
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if ((remainder | shift_mask) != (unsigned HOST_WIDE_INT)0xffffffff)
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if ((remainder | shift_mask) != HOST_UINT (0xffffffff))
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{
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if (generate)
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{
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@ -1280,9 +1280,9 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
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num_bits_set++;
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if (code == AND || (can_invert && num_bits_set > 16))
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remainder = (~remainder) & (unsigned HOST_WIDE_INT)0xffffffff;
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remainder = (~remainder) & HOST_UINT (0xffffffff);
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else if (code == PLUS && num_bits_set > 16)
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remainder = (-remainder) & (unsigned HOST_WIDE_INT)0xffffffff;
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remainder = (-remainder) & HOST_UINT (0xffffffff);
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else
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{
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can_invert = 0;
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@ -1406,7 +1406,7 @@ arm_canonicalize_comparison (code, op1)
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case GT:
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case LE:
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if (i != ((((unsigned HOST_WIDE_INT) 1) << (HOST_BITS_PER_WIDE_INT - 1))
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if (i != (((HOST_UINT (1)) << (HOST_BITS_PER_WIDE_INT - 1))
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- 1)
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&& (const_ok_for_arm (i+1) || const_ok_for_arm (- (i+1))))
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{
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@ -1417,7 +1417,7 @@ arm_canonicalize_comparison (code, op1)
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case GE:
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case LT:
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if (i != (((unsigned HOST_WIDE_INT) 1) << (HOST_BITS_PER_WIDE_INT - 1))
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if (i != ((HOST_UINT (1)) << (HOST_BITS_PER_WIDE_INT - 1))
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&& (const_ok_for_arm (i-1) || const_ok_for_arm (- (i-1))))
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{
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*op1 = GEN_INT (i-1);
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@ -1427,7 +1427,7 @@ arm_canonicalize_comparison (code, op1)
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case GTU:
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case LEU:
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if (i != ~((unsigned HOST_WIDE_INT) 0)
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if (i != ~ (HOST_UINT (0))
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&& (const_ok_for_arm (i+1) || const_ok_for_arm (- (i+1))))
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{
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*op1 = GEN_INT (i + 1);
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@ -2306,7 +2306,7 @@ arm_rtx_costs (x, code, outer)
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if (GET_CODE (XEXP (x, 1)) == CONST_INT)
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{
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unsigned HOST_WIDE_INT i = (INTVAL (XEXP (x, 1))
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& (unsigned HOST_WIDE_INT) 0xffffffff);
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& HOST_UINT (0xffffffff));
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int add_cost = const_ok_for_arm (i) ? 4 : 8;
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int j;
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@ -4360,9 +4360,9 @@ arm_reload_in_hi (operands)
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if (lo == 4095)
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lo &= 0x7ff;
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hi = ((((offset - lo) & (HOST_WIDE_INT) 0xffffffff)
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^ (HOST_WIDE_INT) 0x80000000)
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- (HOST_WIDE_INT) 0x80000000);
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hi = ((((offset - lo) & HOST_INT (0xffffffff))
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^ HOST_INT (0x80000000))
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- HOST_INT (0x80000000));
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if (hi + lo != offset)
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abort ();
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@ -4506,9 +4506,9 @@ arm_reload_out_hi (operands)
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if (lo == 4095)
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lo &= 0x7ff;
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hi = ((((offset - lo) & (HOST_WIDE_INT) 0xffffffff)
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^ (HOST_WIDE_INT) 0x80000000)
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- (HOST_WIDE_INT) 0x80000000);
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hi = ((((offset - lo) & HOST_INT (0xffffffff))
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^ HOST_INT (0x80000000))
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- HOST_INT (0x80000000));
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if (hi + lo != offset)
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abort ();
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@ -6179,8 +6179,7 @@ output_mov_immediate (operands)
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n_ones++;
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if (n_ones > 16) /* Shorter to use MVN with BIC in this case. */
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output_multi_immediate (operands, "mvn%?\t%0, %1", "bic%?\t%0, %0, %1", 1,
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~n);
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output_multi_immediate (operands, "mvn%?\t%0, %1", "bic%?\t%0, %0, %1", 1, ~n);
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else
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output_multi_immediate (operands, "mov%?\t%0, %1", "orr%?\t%0, %0, %1", 1, n);
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@ -6227,7 +6226,7 @@ output_multi_immediate (operands, instr1, instr2, immed_op, n)
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HOST_WIDE_INT n;
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{
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#if HOST_BITS_PER_WIDE_INT > 32
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n &= (unsigned HOST_WIDE_INT)0xffffffff;
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n &= HOST_UINT (0xffffffff);
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#endif
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if (n == 0)
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@ -6375,7 +6374,7 @@ int_log2 (power)
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{
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HOST_WIDE_INT shift = 0;
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while (((((HOST_WIDE_INT) 1) << shift) & power) == 0)
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while ((((HOST_INT (1)) << shift) & power) == 0)
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{
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if (shift > 31)
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abort ();
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@ -6823,7 +6822,7 @@ arm_poke_function_name (stream, name)
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ASM_OUTPUT_ASCII (stream, name, length);
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ASM_OUTPUT_ALIGN (stream, 2);
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x = GEN_INT (((unsigned HOST_WIDE_INT)0xff000000) + alignlength);
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x = GEN_INT (HOST_UINT(0xff000000) + alignlength);
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ASM_OUTPUT_INT (stream, x);
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}
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@ -6925,8 +6924,7 @@ arm_output_epilogue ()
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int frame_size = get_frame_size ();
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rtx eh_ofs = cfun->machine->eh_epilogue_sp_ofs;
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FILE * f = asm_out_file;
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int volatile_func = (optimize > 0
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&& TREE_THIS_VOLATILE (current_function_decl));
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int volatile_func = arm_volatile_func ();
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int return_regnum;
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if (use_return_insn (FALSE) && return_used_this_function)
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@ -7493,7 +7491,6 @@ arm_expand_prologue ()
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if (profile_flag || profile_block_flag || TARGET_NO_SCHED_PRO)
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emit_insn (gen_blockage ());
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}
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/* If CODE is 'd', then the X is a condition operand and the instruction
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should only be executed if the condition is true.
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@ -9210,7 +9207,7 @@ output_thumb_prologue (f)
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asm_fprintf (f, "\t.code\t16\n");
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#ifdef ARM_PE
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if (arm_dllexport_name_p (name))
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name = ARM_STRIP_NAME_ENCODING (name);
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name = arm_strip_name_encoding (name);
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#endif
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asm_fprintf (f, "\t.globl %s%U%s\n", STUB_NAME, name);
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asm_fprintf (f, "\t.thumb_func\n");
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@ -457,11 +457,11 @@ Unrecognized value in TARGET_CPU_DEFAULT.
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{"callee-super-interworking", THUMB_FLAG_CALLEE_SUPER_INTERWORKING, \
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"Thumb: Assume non-static functions may be called from ARM code" }, \
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{"no-callee-super-interworking", -THUMB_FLAG_CALLEE_SUPER_INTERWORKING, \
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""}, \
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"" }, \
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{"caller-super-interworking", THUMB_FLAG_CALLER_SUPER_INTERWORKING, \
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"Thumb: Assume function pointers may go to non-Thumb aware code" }, \
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{"no-caller-super-interworking", -THUMB_FLAG_CALLER_SUPER_INTERWORKING, \
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"" }, \
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"" }, \
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SUBTARGET_SWITCHES \
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{"", TARGET_DEFAULT, "" } \
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}
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@ -1217,9 +1217,9 @@ enum reg_class
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else \
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break; \
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\
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high = ((((val - low) & (unsigned long)0xffffffff) \
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^ (unsigned long)0x80000000) \
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- (unsigned long)0x80000000); \
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high = ((((val - low) & HOST_UINT (0xffffffff)) \
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^ HOST_UINT (0x80000000)) \
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- HOST_UINT (0x80000000)); \
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/* Check for overflow or zero */ \
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if (low == 0 || high == 0 || (high + low != val)) \
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break; \
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@ -1840,11 +1840,13 @@ typedef struct
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/* This has to be handled by a function because more than part of the
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ARM backend uses funciton name prefixes to encode attributes. */
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#undef STRIP_NAME_ENCODING
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#define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
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(VAR) = arm_strip_name_encoding (SYMBOL_NAME)
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/* This is how to output a reference to a user-level label named NAME.
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`assemble_name' uses this. */
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#undef ASM_OUTPUT_LABELREF
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#define ASM_OUTPUT_LABELREF(FILE, NAME) \
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fprintf (FILE, "%s%s", USER_LABEL_PREFIX, arm_strip_name_encoding (NAME))
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@ -2628,17 +2630,26 @@ extern int making_const_table;
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|| (TARGET_ARM && (CODE == '?')) \
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|| (TARGET_THUMB && (CODE == '_')))
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/* Output an operand of an instruction. */
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#define PRINT_OPERAND(STREAM, X, CODE) \
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arm_print_operand (STREAM, X, CODE)
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#define ARM_SIGN_EXTEND(x) ((HOST_WIDE_INT) \
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(HOST_BITS_PER_WIDE_INT <= 32 ? (x) \
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: (((x) & (unsigned HOST_WIDE_INT) 0xffffffff) | \
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(((x) & (unsigned HOST_WIDE_INT) 0x80000000) \
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? ((~ (HOST_WIDE_INT) 0) \
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& ~ (unsigned HOST_WIDE_INT) 0xffffffff) \
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/* Create an [unsigned] host sized integer declaration that
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avoids compiler warnings. */
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#ifdef __STDC__
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#define HOST_INT(x) ((signed HOST_WIDE_INT) x##UL)
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#define HOST_UINT(x) ((unsigned HOST_WIDE_INT) x##UL)
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#else
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#define HOST_INT(x) ((HOST_WIDE_INT) x)
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#define HOST_UINT(x) ((unsigned HOST_WIDE_INT) x)
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#endif
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#define ARM_SIGN_EXTEND(x) ((HOST_WIDE_INT) \
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(HOST_BITS_PER_WIDE_INT <= 32 ? (x) \
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: (((x) & HOST_UINT (0xffffffff)) | \
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(((x) & HOST_UINT (0x80000000)) \
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? ((~ HOST_INT (0)) \
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& ~ HOST_UINT(0xffffffff)) \
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: 0))))
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/* Output the address of an operand. */
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@ -2814,12 +2825,13 @@ extern int making_const_table;
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when running in 26-bit mode. */
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#define RETURN_ADDR_MASK26 (0x03fffffc)
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#ifdef DWARF2_DEBUGGING_INFO
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/* Pick up the return address upon entry to a procedure. Used for
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dwarf2 unwind information. This also enables the table driven
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mechanism. */
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#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM)
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#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM)
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#endif
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/* Used to mask out junk bits from the return address, such as
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processor state, interrupt status, condition codes and the like. */
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