OpenE2K/gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

rtl.texi (REG_NOTES): Say that int_list can also be used.

Browse Source 
gcc/
	* doc/rtl.texi (REG_NOTES): Say that int_list can also be used.
	(REG_BR_PROB): Say that the probability is stored in an int_list.
	* reg-notes.def: Update commentary to mention INT_LIST.
	* rtl.def (EXPR_LIST, INSN_LIST): Capitalize comments.
	(INT_LIST): New rtx.
	* rtl.h (add_int_reg_note, add_shallow_copy_of_reg_note): Declare.
	* rtlanal.c (int_reg_note_p): New function.
	(alloc_reg_note): Assert that the note does not have an int argument.
	(add_int_reg_note, add_shallow_copy_of_reg_note): New functions.
	* combine.c (distribute_notes): Use add_shallow_copy_of_rtx.
	* cse.c (cse_process_notes_1): Expect REG_EQUAL to be an EXPR_LIST
	rather than an INSN_LIST.  Handle INT_LIST.
	* ifcvt.c (cond_exec_process_insns): Take the probability as an int
	rather than an rtx.  Use gen_rtx_INT_LIST to create a REG_BR_PROB note.
	(cond_exec_process_if_block): Use XINT to extract REG_BR_PROB values.
	Manipulate them as ints rather than rtxes.
	* reg-stack.c (subst_asm_stack_regs): Only handle EXPR_LIST notes.
	* regmove.c (copy_src_to_dest): Likewise.
	* sched-vis.c (print_insn_with_notes): Handle INT_LIST.

	* config/i386/winnt.c (i386_pe_seh_unwind_emit): Sink pat assignment
	into the cases that need it.
	* config/arm/arm.c (arm_unwind_emit): Likewise.

	* asan.c (asan_clear_shadow): Use add_int_reg_note for REG_BR_PROB.
	* emit-rtl.c (try_split, emit_copy_of_insn_after): Likewise.
	* loop-doloop.c (add_test, doloop_modify): Likewise.
	* loop-unswitch.c (compare_and_jump_seq): Likewise.
	* optabs.c (emit_cmp_and_jump_insn_1): Likewise.
	* predict.c (combine_predictions_for_insn): Likewise.
	* print-rtl.c (print_rtx): Handle INT_LIST.
	* config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): Likewise.
	* config/alpha/alpha.c (emit_unlikely_jump): Likewise.
	* config/arm/arm.c (emit_unlikely_jump): Likewise.
	* config/i386/i386.c (ix86_expand_split_stack_prologue): Likewise.
	(ix86_split_fp_branch, predict_jump): Likewise.
	* config/rs6000/rs6000.c (emit_unlikely_jump): Likewise.
	* config/sh/sh.c (expand_cbranchsi4): Likewise.
	* config/spu/spu.c (ea_load_store_inline): Likewise.

	* cfgbuild.c (compute_outgoing_frequencies): Use XINT to access the
	value of a REG_BR_PROB note.
	* cfgrtl.c (force_nonfallthru_and_redirect): Likewise.
	(update_br_prob_note, rtl_verify_edges, purge_dead_edges): Likewise.
	* emit-rtl.c (try_split): Likewise.
	* predict.c (br_prob_note_reliable_p): Likewise.
	(invert_br_probabilities, combine_predictions_for_insn): Likewise.
	* reorg.c (mostly_true_jump): Likewise.
	* config/bfin/bfin.c (cbranch_predicted_taken_p): Likewise.
	* config/frv/frv.c (frv_print_operand_jump_hint): Likewise.
	* config/i386/i386.c (ix86_print_operand): Likewise.
	* config/ia64/ia64.c (ia64_print_operand): Likewise.
	* config/mmix/mmix.c (mmix_print_operand): Likewise.
	* config/rs6000/rs6000.c (output_cbranch): Likewise.
	* config/s390/s390.c (s390_expand_tbegin): Likewise.
	* config/sh/sh.c (sh_print_operand, sh_adjust_cost): Likewise.
	* config/sparc/sparc.c (output_cbranch): Likewise.
	* config/spu/spu.c (get_branch_target): Likewise.
	* config/tilegx/tilegx.c (cbranch_predicted_p): Likewise.
	* config/tilepro/tilepro.c (cbranch_predicted_p): Likewise.

From-SVN: r202839
This commit is contained in:
Richard Sandiford 2013-09-23 17:41:02 +00:00 committed by Richard Sandiford
parent 450ad0cd44
commit e5af9ddd01
38 changed files with 213 additions and 102 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

63
gcc/ChangeLog
View File

@ -1,3 +1,66 @@
2013-09-23 Richard Sandiford <rdsandiford@googlemail.com>
* doc/rtl.texi (REG_NOTES): Say that int_list can also be used.
(REG_BR_PROB): Say that the probability is stored in an int_list.
* reg-notes.def: Update commentary to mention INT_LIST.
* rtl.def (EXPR_LIST, INSN_LIST): Capitalize comments.
(INT_LIST): New rtx.
* rtl.h (add_int_reg_note, add_shallow_copy_of_reg_note): Declare.
* rtlanal.c (int_reg_note_p): New function.
(alloc_reg_note): Assert that the note does not have an int argument.
(add_int_reg_note, add_shallow_copy_of_reg_note): New functions.
* combine.c (distribute_notes): Use add_shallow_copy_of_rtx.
* cse.c (cse_process_notes_1): Expect REG_EQUAL to be an EXPR_LIST
rather than an INSN_LIST. Handle INT_LIST.
* ifcvt.c (cond_exec_process_insns): Take the probability as an int
rather than an rtx. Use gen_rtx_INT_LIST to create a REG_BR_PROB note.
(cond_exec_process_if_block): Use XINT to extract REG_BR_PROB values.
Manipulate them as ints rather than rtxes.
* reg-stack.c (subst_asm_stack_regs): Only handle EXPR_LIST notes.
* regmove.c (copy_src_to_dest): Likewise.
* sched-vis.c (print_insn_with_notes): Handle INT_LIST.
* config/i386/winnt.c (i386_pe_seh_unwind_emit): Sink pat assignment
into the cases that need it.
* config/arm/arm.c (arm_unwind_emit): Likewise.
* asan.c (asan_clear_shadow): Use add_int_reg_note for REG_BR_PROB.
* emit-rtl.c (try_split, emit_copy_of_insn_after): Likewise.
* loop-doloop.c (add_test, doloop_modify): Likewise.
* loop-unswitch.c (compare_and_jump_seq): Likewise.
* optabs.c (emit_cmp_and_jump_insn_1): Likewise.
* predict.c (combine_predictions_for_insn): Likewise.
* print-rtl.c (print_rtx): Handle INT_LIST.
* config/aarch64/aarch64.c (aarch64_emit_unlikely_jump): Likewise.
* config/alpha/alpha.c (emit_unlikely_jump): Likewise.
* config/arm/arm.c (emit_unlikely_jump): Likewise.
* config/i386/i386.c (ix86_expand_split_stack_prologue): Likewise.
(ix86_split_fp_branch, predict_jump): Likewise.
* config/rs6000/rs6000.c (emit_unlikely_jump): Likewise.
* config/sh/sh.c (expand_cbranchsi4): Likewise.
* config/spu/spu.c (ea_load_store_inline): Likewise.
* cfgbuild.c (compute_outgoing_frequencies): Use XINT to access the
value of a REG_BR_PROB note.
* cfgrtl.c (force_nonfallthru_and_redirect): Likewise.
(update_br_prob_note, rtl_verify_edges, purge_dead_edges): Likewise.
* emit-rtl.c (try_split): Likewise.
* predict.c (br_prob_note_reliable_p): Likewise.
(invert_br_probabilities, combine_predictions_for_insn): Likewise.
* reorg.c (mostly_true_jump): Likewise.
* config/bfin/bfin.c (cbranch_predicted_taken_p): Likewise.
* config/frv/frv.c (frv_print_operand_jump_hint): Likewise.
* config/i386/i386.c (ix86_print_operand): Likewise.
* config/ia64/ia64.c (ia64_print_operand): Likewise.
* config/mmix/mmix.c (mmix_print_operand): Likewise.
* config/rs6000/rs6000.c (output_cbranch): Likewise.
* config/s390/s390.c (s390_expand_tbegin): Likewise.
* config/sh/sh.c (sh_print_operand, sh_adjust_cost): Likewise.
* config/sparc/sparc.c (output_cbranch): Likewise.
* config/spu/spu.c (get_branch_target): Likewise.
* config/tilegx/tilegx.c (cbranch_predicted_p): Likewise.
* config/tilepro/tilepro.c (cbranch_predicted_p): Likewise.
2013-09-23 Jan Hubicka <jh@suse.cz>
* ipa-cp.c (ipa_get_indirect_edge_target_1): Add sanity check

2
gcc/asan.c
View File

@ -908,7 +908,7 @@ asan_clear_shadow (rtx shadow_mem, HOST_WIDE_INT len)
emit_cmp_and_jump_insns (addr, end, LT, NULL_RTX, Pmode, true, top_label);
jump = get_last_insn ();
gcc_assert (JUMP_P (jump));
add_reg_note (jump, REG_BR_PROB, GEN_INT (REG_BR_PROB_BASE * 80 / 100));
add_int_reg_note (jump, REG_BR_PROB, REG_BR_PROB_BASE * 80 / 100);
}
/* Insert code to protect stack vars. The prologue sequence should be emitted

2
gcc/cfgbuild.c
View File

@ -542,7 +542,7 @@ compute_outgoing_frequencies (basic_block b)
if (note)
{
probability = INTVAL (XEXP (note, 0));
probability = XINT (note, 0);
e = BRANCH_EDGE (b);
e->probability = probability;
e->count = apply_probability (b->count, probability);

16
gcc/cfgrtl.c
View File

@ -1480,7 +1480,7 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
note = find_reg_note (BB_END (e->src), REG_BR_PROB, NULL_RTX);
if (note)
{
int prob = INTVAL (XEXP (note, 0));
int prob = XINT (note, 0);
b->probability = prob;
/* Update this to use GCOV_COMPUTE_SCALE. */
@ -2207,9 +2207,9 @@ update_br_prob_note (basic_block bb)
if (!JUMP_P (BB_END (bb)))
return;
note = find_reg_note (BB_END (bb), REG_BR_PROB, NULL_RTX);
if (!note || INTVAL (XEXP (note, 0)) == BRANCH_EDGE (bb)->probability)
if (!note || XINT (note, 0) == BRANCH_EDGE (bb)->probability)
return;
XEXP (note, 0) = GEN_INT (BRANCH_EDGE (bb)->probability);
XINT (note, 0) = BRANCH_EDGE (bb)->probability;
}
/* Get the last insn associated with block BB (that includes barriers and
@ -2399,11 +2399,11 @@ rtl_verify_edges (void)
&& EDGE_COUNT (bb->succs) >= 2
&& any_condjump_p (BB_END (bb)))
{
if (INTVAL (XEXP (note, 0)) != BRANCH_EDGE (bb)->probability
if (XINT (note, 0) != BRANCH_EDGE (bb)->probability
&& profile_status != PROFILE_ABSENT)
{
error ("verify_flow_info: REG_BR_PROB does not match cfg %wi %i",
INTVAL (XEXP (note, 0)), BRANCH_EDGE (bb)->probability);
error ("verify_flow_info: REG_BR_PROB does not match cfg %i %i",
XINT (note, 0), BRANCH_EDGE (bb)->probability);
err = 1;
}
}
@ -3104,7 +3104,7 @@ purge_dead_edges (basic_block bb)
b = BRANCH_EDGE (bb);
f = FALLTHRU_EDGE (bb);
b->probability = INTVAL (XEXP (note, 0));
b->probability = XINT (note, 0);
f->probability = REG_BR_PROB_BASE - b->probability;
/* Update these to use GCOV_COMPUTE_SCALE. */
b->count = bb->count * b->probability / REG_BR_PROB_BASE;
@ -3735,7 +3735,7 @@ fixup_reorder_chain (void)
rtx note = find_reg_note (bb_end_insn, REG_BR_PROB, 0);
if (note
&& INTVAL (XEXP (note, 0)) < REG_BR_PROB_BASE / 2
&& XINT (note, 0) < REG_BR_PROB_BASE / 2
&& invert_jump (bb_end_insn,
(e_fall->dest == EXIT_BLOCK_PTR
? NULL_RTX

2
gcc/combine.c
View File

@ -13677,7 +13677,7 @@ distribute_notes (rtx notes, rtx from_insn, rtx i3, rtx i2, rtx elim_i2,
}
if (place2)
add_reg_note (place2, REG_NOTE_KIND (note), XEXP (note, 0));
add_shallow_copy_of_reg_note (place2, note);
}
}

4
gcc/config/aarch64/aarch64.c
View File

@ -7162,10 +7162,10 @@ aarch64_emit_store_exclusive (enum machine_mode mode, rtx bval,
static void
aarch64_emit_unlikely_jump (rtx insn)
{
rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1);
int very_unlikely = REG_BR_PROB_BASE / 100 - 1;
insn = emit_jump_insn (insn);
add_reg_note (insn, REG_BR_PROB, very_unlikely);
add_int_reg_note (insn, REG_BR_PROB, very_unlikely);
}
/* Expand a compare and swap pattern. */

4
gcc/config/alpha/alpha.c
View File

@ -4228,12 +4228,12 @@ alpha_expand_builtin_vector_binop (rtx (*gen) (rtx, rtx, rtx),
static void
emit_unlikely_jump (rtx cond, rtx label)
{
rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1);
int very_unlikely = REG_BR_PROB_BASE / 100 - 1;
rtx x;
x = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, label, pc_rtx);
x = emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, x));
add_reg_note (x, REG_BR_PROB, very_unlikely);
add_int_reg_note (x, REG_BR_PROB, very_unlikely);
}
/* A subroutine of the atomic operation splitters. Emit a load-locked

7
gcc/config/arm/arm.c
View File

@ -26103,13 +26103,14 @@ arm_unwind_emit (FILE * asm_out_file, rtx insn)
for (note = REG_NOTES (insn); note ; note = XEXP (note, 1))
{
pat = XEXP (note, 0);
switch (REG_NOTE_KIND (note))
{
case REG_FRAME_RELATED_EXPR:
pat = XEXP (note, 0);
goto found;
case REG_CFA_REGISTER:
pat = XEXP (note, 0);
if (pat == NULL)
{
pat = PATTERN (insn);
@ -27028,10 +27029,10 @@ arm_emit_store_exclusive (enum machine_mode mode, rtx bval, rtx rval,
static void
emit_unlikely_jump (rtx insn)
{
rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1);
int very_unlikely = REG_BR_PROB_BASE / 100 - 1;
insn = emit_jump_insn (insn);
add_reg_note (insn, REG_BR_PROB, very_unlikely);
add_int_reg_note (insn, REG_BR_PROB, very_unlikely);
}
/* Expand a compare and swap pattern. */

2
gcc/config/bfin/bfin.c
View File

@ -2438,7 +2438,7 @@ cbranch_predicted_taken_p (rtx insn)
if (x)
{
int pred_val = INTVAL (XEXP (x, 0));
int pred_val = XINT (x, 0);
return pred_val >= REG_BR_PROB_BASE / 2;
}

10
gcc/config/frv/frv.c
View File

@ -2643,7 +2643,7 @@ frv_print_operand_jump_hint (rtx insn)
rtx note;
rtx labelref;
int ret;
HOST_WIDE_INT prob = -1;
int prob = -1;
enum { UNKNOWN, BACKWARD, FORWARD } jump_type = UNKNOWN;
gcc_assert (JUMP_P (insn));
@ -2669,7 +2669,7 @@ frv_print_operand_jump_hint (rtx insn)
else
{
prob = INTVAL (XEXP (note, 0));
prob = XINT (note, 0);
ret = ((prob >= (REG_BR_PROB_BASE / 2))
? FRV_JUMP_LIKELY
: FRV_JUMP_NOT_LIKELY);
@ -2690,10 +2690,10 @@ frv_print_operand_jump_hint (rtx insn)
}
fprintf (stderr,
"%s: uid %ld, %s, probability = %ld, max prob. = %ld, hint = %d\n",
"%s: uid %ld, %s, probability = %d, max prob. = %d, hint = %d\n",
IDENTIFIER_POINTER (DECL_NAME (current_function_decl)),
(long)INSN_UID (insn), direction, (long)prob,
(long)REG_BR_PROB_BASE, ret);
(long)INSN_UID (insn), direction, prob,
REG_BR_PROB_BASE, ret);
}
#endif

10
gcc/config/i386/i386.c
View File

@ -11511,8 +11511,8 @@ ix86_expand_split_stack_prologue (void)
JUMP_LABEL (jump_insn) = label;
/* Mark the jump as very likely to be taken. */
add_reg_note (jump_insn, REG_BR_PROB,
GEN_INT (REG_BR_PROB_BASE - REG_BR_PROB_BASE / 100));
add_int_reg_note (jump_insn, REG_BR_PROB,
REG_BR_PROB_BASE - REG_BR_PROB_BASE / 100);
if (split_stack_fn == NULL_RTX)
split_stack_fn = gen_rtx_SYMBOL_REF (Pmode, "__morestack");
@ -14808,7 +14808,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
if (x)
{
int pred_val = INTVAL (XEXP (x, 0));
int pred_val = XINT (x, 0);
if (pred_val < REG_BR_PROB_BASE * 45 / 100
|| pred_val > REG_BR_PROB_BASE * 55 / 100)
@ -19454,7 +19454,7 @@ ix86_split_fp_branch (enum rtx_code code, rtx op1, rtx op2,
gen_rtx_IF_THEN_ELSE (VOIDmode,
condition, target1, target2)));
if (split_branch_probability >= 0)
add_reg_note (i, REG_BR_PROB, GEN_INT (split_branch_probability));
add_int_reg_note (i, REG_BR_PROB, split_branch_probability);
}
void
@ -21961,7 +21961,7 @@ predict_jump (int prob)
{
rtx insn = get_last_insn ();
gcc_assert (JUMP_P (insn));
add_reg_note (insn, REG_BR_PROB, GEN_INT (prob));
add_int_reg_note (insn, REG_BR_PROB, prob);
}
/* Helper function for the string operations below. Dest VARIABLE whether

4
gcc/config/i386/winnt.c
View File

@ -1178,10 +1178,10 @@ i386_pe_seh_unwind_emit (FILE *asm_out_file, rtx insn)
for (note = REG_NOTES (insn); note ; note = XEXP (note, 1))
{
pat = XEXP (note, 0);
switch (REG_NOTE_KIND (note))
{
case REG_FRAME_RELATED_EXPR:
pat = XEXP (note, 0);
goto found;
case REG_CFA_DEF_CFA:
@ -1195,6 +1195,7 @@ i386_pe_seh_unwind_emit (FILE *asm_out_file, rtx insn)
gcc_unreachable ();
case REG_CFA_ADJUST_CFA:
pat = XEXP (note, 0);
if (pat == NULL)
{
pat = PATTERN (insn);
@ -1206,6 +1207,7 @@ i386_pe_seh_unwind_emit (FILE *asm_out_file, rtx insn)
break;
case REG_CFA_OFFSET:
pat = XEXP (note, 0);
if (pat == NULL)
pat = single_set (insn);
seh_cfa_offset (asm_out_file, seh, pat);

2
gcc/config/ia64/ia64.c
View File

@ -5463,7 +5463,7 @@ ia64_print_operand (FILE * file, rtx x, int code)
x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
if (x)
{
int pred_val = INTVAL (XEXP (x, 0));
int pred_val = XINT (x, 0);
/* Guess top and bottom 10% statically predicted. */
if (pred_val < REG_BR_PROB_BASE / 50

2
gcc/config/mmix/mmix.c
View File

@ -1531,7 +1531,7 @@ mmix_print_operand (FILE *stream, rtx x, int code)
if (TARGET_BRANCH_PREDICT)
{
x = find_reg_note (current_output_insn, REG_BR_PROB, 0);
if (x && INTVAL (XEXP (x, 0)) > REG_BR_PROB_BASE / 2)
if (x && XINT (x, 0) > REG_BR_PROB_BASE / 2)
putc ('P', stream);
}
return;

6
gcc/config/rs6000/rs6000.c
View File

@ -17541,7 +17541,7 @@ output_cbranch (rtx op, const char *label, int reversed, rtx insn)
if (note != NULL_RTX)
{
/* PROB is the difference from 50%. */
int prob = INTVAL (XEXP (note, 0)) - REG_BR_PROB_BASE / 2;
int prob = XINT (note, 0) - REG_BR_PROB_BASE / 2;
/* Only hint for highly probable/improbable branches on newer
cpus as static prediction overrides processor dynamic
@ -18147,12 +18147,12 @@ rs6000_emit_minmax (rtx dest, enum rtx_code code, rtx op0, rtx op1)
static void
emit_unlikely_jump (rtx cond, rtx label)
{
rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1);
int very_unlikely = REG_BR_PROB_BASE / 100 - 1;
rtx x;
x = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, label, pc_rtx);
x = emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, x));
add_reg_note (x, REG_BR_PROB, very_unlikely);
add_int_reg_note (x, REG_BR_PROB, very_unlikely);
}
/* A subroutine of the atomic operation splitters. Emit a load-locked

6
gcc/config/s390/s390.c
View File

@ -9589,7 +9589,7 @@ s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p)
rtx retry_reg = gen_reg_rtx (SImode);
rtx retry_label = NULL_RTX;
rtx jump;
rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1);
int very_unlikely = REG_BR_PROB_BASE / 100 - 1;
if (retry != NULL_RTX)
{
@ -9612,7 +9612,7 @@ s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p)
JUMP_LABEL (jump) = abort_label;
LABEL_NUSES (abort_label) = 1;
add_reg_note (jump, REG_BR_PROB, very_unlikely);
add_int_reg_note (jump, REG_BR_PROB, very_unlikely);
/* Initialize CC return value. */
emit_move_insn (dest, const0_rtx);
@ -9632,7 +9632,7 @@ s390_expand_tbegin (rtx dest, rtx tdb, rtx retry, bool clobber_fprs_p)
gen_rtx_REG (CCRAWmode, CC_REGNUM),
gen_rtx_CONST_INT (VOIDmode, CC1 | CC3)));
LABEL_NUSES (leave_label) = 2;
add_reg_note (jump, REG_BR_PROB, very_unlikely);
add_int_reg_note (jump, REG_BR_PROB, very_unlikely);
/* CC2 - transient failure. Perform retry with ppa. */
emit_move_insn (count, retry);

7
gcc/config/sh/sh.c
View File

@ -1146,7 +1146,7 @@ sh_print_operand (FILE *stream, rtx x, int code)
{
rtx note = find_reg_note (current_output_insn, REG_BR_PROB, 0);
if (note && INTVAL (XEXP (note, 0)) * 2 < REG_BR_PROB_BASE)
if (note && XINT (note, 0) * 2 < REG_BR_PROB_BASE)
fputs ("/u", stream);
break;
}
@ -2082,7 +2082,7 @@ expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int probability)
operands[1], operands[2])));
rtx jump = emit_jump_insn (branch_expander (operands[3]));
if (probability >= 0)
add_reg_note (jump, REG_BR_PROB, GEN_INT (probability));
add_int_reg_note (jump, REG_BR_PROB, probability);
}
/* ??? How should we distribute probabilities when more than one branch
@ -10741,8 +10741,7 @@ sh_adjust_cost (rtx insn, rtx link ATTRIBUTE_UNUSED, rtx dep_insn, int cost)
{
int orig_cost = cost;
rtx note = find_reg_note (insn, REG_BR_PROB, 0);
rtx target = ((! note
|| INTVAL (XEXP (note, 0)) * 2 < REG_BR_PROB_BASE)
rtx target = ((!note || XINT (note, 0) * 2 < REG_BR_PROB_BASE)
? insn : JUMP_LABEL (insn));
/* On the likely path, the branch costs 1, on the unlikely path,
it costs 3. */

4
gcc/config/sparc/sparc.c
View File

@ -7724,7 +7724,7 @@ output_cbranch (rtx op, rtx dest, int label, int reversed, int annul,
if (*labelno && insn && (note = find_reg_note (insn, REG_BR_PROB, NULL_RTX)))
{
strcpy (p,
((INTVAL (XEXP (note, 0)) >= REG_BR_PROB_BASE / 2) ^ far)
((XINT (note, 0) >= REG_BR_PROB_BASE / 2) ^ far)
? ",pt" : ",pn");
p += 3;
spaces -= 3;
@ -8195,7 +8195,7 @@ output_v9branch (rtx op, rtx dest, int reg, int label, int reversed,
if (insn && (note = find_reg_note (insn, REG_BR_PROB, NULL_RTX)))
{
strcpy (p,
((INTVAL (XEXP (note, 0)) >= REG_BR_PROB_BASE / 2) ^ far)
((XINT (note, 0) >= REG_BR_PROB_BASE / 2) ^ far)
? ",pt" : ",pn");
p += 3;
}

4
gcc/config/spu/spu.c
View File

@ -2197,7 +2197,7 @@ get_branch_target (rtx branch)
{
/* If the more probable case is not a fall through, then
try a branch hint. */
HOST_WIDE_INT prob = INTVAL (XEXP (note, 0));
int prob = XINT (note, 0);
if (prob > (REG_BR_PROB_BASE * 6 / 10)
&& GET_CODE (XEXP (src, 1)) != PC)
lab = XEXP (src, 1);
@ -4342,7 +4342,7 @@ ea_load_store_inline (rtx mem, bool is_store, rtx ea_addr, rtx data_addr)
hit_ref, pc_rtx)));
/* Say that this branch is very likely to happen. */
v = REG_BR_PROB_BASE - REG_BR_PROB_BASE / 100 - 1;
add_reg_note (insn, REG_BR_PROB, GEN_INT (v));
add_int_reg_note (insn, REG_BR_PROB, v);
ea_load_store (mem, is_store, ea_addr, data_addr);
cont_label = gen_label_rtx ();

2
gcc/config/tilegx/tilegx.c
View File

@ -2529,7 +2529,7 @@ cbranch_predicted_p (rtx insn)
if (x)
{
int pred_val = INTVAL (XEXP (x, 0));
int pred_val = XINT (x, 0);
return pred_val >= REG_BR_PROB_BASE / 2;
}

2
gcc/config/tilepro/tilepro.c
View File

@ -2411,7 +2411,7 @@ cbranch_predicted_p (rtx insn)
if (x)
{
int pred_val = INTVAL (XEXP (x, 0));
int pred_val = XINT (x, 0);
return pred_val >= REG_BR_PROB_BASE / 2;
}

5
gcc/cse.c
View File

@ -6068,9 +6068,12 @@ cse_process_notes_1 (rtx x, rtx object, bool *changed)
return x;
case EXPR_LIST:
case INSN_LIST:
if (REG_NOTE_KIND (x) == REG_EQUAL)
XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
/* Fall through. */
case INSN_LIST:
case INT_LIST:
if (XEXP (x, 1))
XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
return x;

22
gcc/doc/rtl.texi
View File

@ -3732,8 +3732,8 @@ Def-use and use-def chains are now preferred.
@findex REG_NOTES
@item REG_NOTES (@var{i})
A list (chain of @code{expr_list} and @code{insn_list} expressions)
giving miscellaneous information about the insn. It is often
A list (chain of @code{expr_list}, @code{insn_list} and @code{int_list}
expressions) giving miscellaneous information about the insn. It is often
information pertaining to the registers used in this insn.
@end table
@ -3752,10 +3752,10 @@ analysis pass adds a link to insns which store into registers values
that are used for the first time in this insn.
The @code{REG_NOTES} field of an insn is a chain similar to the
@code{LOG_LINKS} field but it includes @code{expr_list} expressions in
addition to @code{insn_list} expressions. There are several kinds of
register notes, which are distinguished by the machine mode, which in a
register note is really understood as being an @code{enum reg_note}.
@code{LOG_LINKS} field but it includes @code{expr_list} and @code{int_list}
expressions in addition to @code{insn_list} expressions. There are several
kinds of register notes, which are distinguished by the machine mode, which
in a register note is really understood as being an @code{enum reg_note}.
The first operand @var{op} of the note is data whose meaning depends on
the kind of note.
@ -3956,16 +3956,16 @@ This indicates an anti dependence (a write after read dependence).
@end table
These notes describe information gathered from gcov profile data. They
are stored in the @code{REG_NOTES} field of an insn as an
@code{expr_list}.
are stored in the @code{REG_NOTES} field of an insn.
@table @code
@findex REG_BR_PROB
@item REG_BR_PROB
This is used to specify the ratio of branches to non-branches of a
branch insn according to the profile data. The value is stored as a
value between 0 and REG_BR_PROB_BASE; larger values indicate a higher
probability that the branch will be taken.
branch insn according to the profile data. The note is represented
as an @code{int_list} expression whose integer value is between 0 and
REG_BR_PROB_BASE. Larger values indicate a higher probability that
the branch will be taken.
@findex REG_BR_PRED
@item REG_BR_PRED

6
gcc/emit-rtl.c
View File

@ -3461,7 +3461,7 @@ try_split (rtx pat, rtx trial, int last)
if (any_condjump_p (trial)
&& (note = find_reg_note (trial, REG_BR_PROB, 0)))
split_branch_probability = INTVAL (XEXP (note, 0));
split_branch_probability = XINT (note, 0);
probability = split_branch_probability;
seq = split_insns (pat, trial);
@ -3512,7 +3512,7 @@ try_split (rtx pat, rtx trial, int last)
is responsible for this step using
split_branch_probability variable. */
gcc_assert (njumps == 1);
add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
add_int_reg_note (insn, REG_BR_PROB, probability);
}
}
}
@ -5968,7 +5968,7 @@ emit_copy_of_insn_after (rtx insn, rtx after)
add_reg_note (new_rtx, REG_NOTE_KIND (link),
copy_insn_1 (XEXP (link, 0)));
else
add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
add_shallow_copy_of_reg_note (new_rtx, link);
}
INSN_CODE (new_rtx) = INSN_CODE (insn);

39
gcc/ifcvt.c
View File

@ -91,7 +91,7 @@ static rtx last_active_insn (basic_block, int);
static rtx find_active_insn_before (basic_block, rtx);
static rtx find_active_insn_after (basic_block, rtx);
static basic_block block_fallthru (basic_block);
static int cond_exec_process_insns (ce_if_block_t *, rtx, rtx, rtx, rtx, int);
static int cond_exec_process_insns (ce_if_block_t *, rtx, rtx, rtx, int, int);
static rtx cond_exec_get_condition (rtx);
static rtx noce_get_condition (rtx, rtx *, bool);
static int noce_operand_ok (const_rtx);
@ -316,7 +316,7 @@ cond_exec_process_insns (ce_if_block_t *ce_info ATTRIBUTE_UNUSED,
/* if block information */rtx start,
/* first insn to look at */rtx end,
/* last insn to look at */rtx test,
/* conditional execution test */rtx prob_val,
/* conditional execution test */int prob_val,
/* probability of branch taken. */int mod_ok)
{
int must_be_last = FALSE;
@ -387,10 +387,10 @@ cond_exec_process_insns (ce_if_block_t *ce_info ATTRIBUTE_UNUSED,
validate_change (insn, &PATTERN (insn), pattern, 1);
if (CALL_P (insn) && prob_val)
if (CALL_P (insn) && prob_val >= 0)
validate_change (insn, &REG_NOTES (insn),
alloc_EXPR_LIST (REG_BR_PROB, prob_val,
REG_NOTES (insn)), 1);
gen_rtx_INT_LIST ((enum machine_mode) REG_BR_PROB,
prob_val, REG_NOTES (insn)), 1);
insn_done:
if (insn == end)
@ -449,14 +449,15 @@ cond_exec_process_if_block (ce_if_block_t * ce_info,
int then_mod_ok; /* whether conditional mods are ok in THEN */
rtx true_expr; /* test for else block insns */
rtx false_expr; /* test for then block insns */
rtx true_prob_val; /* probability of else block */
rtx false_prob_val; /* probability of then block */
int true_prob_val; /* probability of else block */
int false_prob_val; /* probability of then block */
rtx then_last_head = NULL_RTX; /* Last match at the head of THEN */
rtx else_last_head = NULL_RTX; /* Last match at the head of ELSE */
rtx then_first_tail = NULL_RTX; /* First match at the tail of THEN */
rtx else_first_tail = NULL_RTX; /* First match at the tail of ELSE */
int then_n_insns, else_n_insns, n_insns;
enum rtx_code false_code;
rtx note;
/* If test is comprised of && or || elements, and we've failed at handling
all of them together, just use the last test if it is the special case of
@ -588,14 +589,17 @@ cond_exec_process_if_block (ce_if_block_t * ce_info,
goto fail;
#endif
true_prob_val = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX);
if (true_prob_val)
note = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX);
if (note)
{
true_prob_val = XEXP (true_prob_val, 0);
false_prob_val = GEN_INT (REG_BR_PROB_BASE - INTVAL (true_prob_val));
true_prob_val = XINT (note, 0);
false_prob_val = REG_BR_PROB_BASE - true_prob_val;
}
else
false_prob_val = NULL_RTX;
{
true_prob_val = -1;
false_prob_val = -1;
}
/* If we have && or || tests, do them here. These tests are in the adjacent
blocks after the first block containing the test. */
@ -4113,15 +4117,14 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
All that's left is making sure the insns involved can actually
be predicated. */
rtx cond, prob_val;
rtx cond;
cond = cond_exec_get_condition (jump);
if (! cond)
return FALSE;
prob_val = find_reg_note (jump, REG_BR_PROB, NULL_RTX);
if (prob_val)
prob_val = XEXP (prob_val, 0);
rtx note = find_reg_note (jump, REG_BR_PROB, NULL_RTX);
int prob_val = (note ? XINT (note, 0) : -1);
if (reversep)
{
@ -4130,8 +4133,8 @@ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
return FALSE;
cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
XEXP (cond, 1));
if (prob_val)
prob_val = GEN_INT (REG_BR_PROB_BASE - INTVAL (prob_val));
if (prob_val >= 0)
prob_val = REG_BR_PROB_BASE - prob_val;
}
if (cond_exec_process_insns (NULL, head, end, cond, prob_val, 0)

5
gcc/loop-doloop.c
View File

@ -381,7 +381,7 @@ add_test (rtx cond, edge *e, basic_block dest)
JUMP_LABEL (jump) = label;
/* The jump is supposed to handle an unlikely special case. */
add_reg_note (jump, REG_BR_PROB, const0_rtx);
add_int_reg_note (jump, REG_BR_PROB, 0);
LABEL_NUSES (label)++;
@ -594,8 +594,7 @@ doloop_modify (struct loop *loop, struct niter_desc *desc,
if (true_prob_val)
{
/* Seems safer to use the branch probability. */
add_reg_note (jump_insn, REG_BR_PROB,
GEN_INT (desc->in_edge->probability));
add_int_reg_note (jump_insn, REG_BR_PROB, desc->in_edge->probability);
}
}

2
gcc/loop-unswitch.c
View File

@ -126,7 +126,7 @@ compare_and_jump_seq (rtx op0, rtx op1, enum rtx_code comp, rtx label, int prob,
JUMP_LABEL (jump) = label;
LABEL_NUSES (label)++;
}
add_reg_note (jump, REG_BR_PROB, GEN_INT (prob));
add_int_reg_note (jump, REG_BR_PROB, prob);
seq = get_insns ();
end_sequence ();

2
gcc/optabs.c
View File

@ -4288,7 +4288,7 @@ emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label, int prob)
&& JUMP_P (insn)
&& any_condjump_p (insn)
&& !find_reg_note (insn, REG_BR_PROB, 0))
add_reg_note (insn, REG_BR_PROB, GEN_INT (prob));
add_int_reg_note (insn, REG_BR_PROB, prob);
}
/* Generate code to compare X with Y so that the condition codes are

8
gcc/predict.c
View File

@ -528,7 +528,7 @@ bool
br_prob_note_reliable_p (const_rtx note)
{
gcc_assert (REG_NOTE_KIND (note) == REG_BR_PROB);
return probability_reliable_p (INTVAL (XEXP (note, 0)));
return probability_reliable_p (XINT (note, 0));
}
static void
@ -682,7 +682,7 @@ invert_br_probabilities (rtx insn)
for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
if (REG_NOTE_KIND (note) == REG_BR_PROB)
XEXP (note, 0) = GEN_INT (REG_BR_PROB_BASE - INTVAL (XEXP (note, 0)));
XINT (note, 0) = REG_BR_PROB_BASE - XINT (note, 0);
else if (REG_NOTE_KIND (note) == REG_BR_PRED)
XEXP (XEXP (note, 0), 1)
= GEN_INT (REG_BR_PROB_BASE - INTVAL (XEXP (XEXP (note, 0), 1)));
@ -836,7 +836,7 @@ combine_predictions_for_insn (rtx insn, basic_block bb)
if (!prob_note)
{
add_reg_note (insn, REG_BR_PROB, GEN_INT (combined_probability));
add_int_reg_note (insn, REG_BR_PROB, combined_probability);
/* Save the prediction into CFG in case we are seeing non-degenerated
conditional jump. */
@ -849,7 +849,7 @@ combine_predictions_for_insn (rtx insn, basic_block bb)
}
else if (!single_succ_p (bb))
{
int prob = INTVAL (XEXP (prob_note, 0));
int prob = XINT (prob_note, 0);
BRANCH_EDGE (bb)->probability = prob;
FALLTHRU_EDGE (bb)->probability = REG_BR_PROB_BASE - prob;

3
gcc/print-rtl.c
View File

@ -150,7 +150,8 @@ print_rtx (const_rtx in_rtx)
/* Print REG_NOTE names for EXPR_LIST and INSN_LIST. */
if ((GET_CODE (in_rtx) == EXPR_LIST
|| GET_CODE (in_rtx) == INSN_LIST)
|| GET_CODE (in_rtx) == INSN_LIST
|| GET_CODE (in_rtx) == INT_LIST)
&& (int)GET_MODE (in_rtx) < REG_NOTE_MAX)
fprintf (outfile, ":%s",
GET_REG_NOTE_NAME (GET_MODE (in_rtx)));

12
gcc/reg-notes.def
View File

@ -18,9 +18,9 @@ along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* This file defines all the codes that may appear on individual
EXPR_LIST rtxes in the REG_NOTES chain of an insn. The codes are
stored in the mode field of the EXPR_LIST. Source files define
DEF_REG_NOTE appropriately before including this file. */
EXPR_LIST, INSN_LIST and INT_LIST rtxes in the REG_NOTES chain of an insn.
The codes are stored in the mode field of the rtx. Source files
define DEF_REG_NOTE appropriately before including this file. */
/* Shorthand. */
#define REG_NOTE(NAME) DEF_REG_NOTE (REG_##NAME)
@ -94,9 +94,9 @@ REG_NOTE (DEP_ANTI)
REG_NOTE (DEP_CONTROL)
/* REG_BR_PROB is attached to JUMP_INSNs and CALL_INSNs. It has an
integer value. For jumps, it is the probability that this is a
taken branch. For calls, it is the probability that this call
won't return. */
integer value (in an INT_LIST). For jumps, it is the probability
that this is a taken branch. For calls, it is the probability that
this call won't return. */
REG_NOTE (BR_PROB)
/* Attached to a call insn; indicates that the call is malloc-like and

2
gcc/reg-stack.c
View File

@ -2058,6 +2058,8 @@ subst_asm_stack_regs (rtx insn, stack_ptr regstack)
n_notes = 0;
for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
{
if (GET_CODE (note) != EXPR_LIST)
continue;
rtx reg = XEXP (note, 0);
rtx *loc = & XEXP (note, 0);

2
gcc/regmove.c
View File

@ -652,7 +652,7 @@ copy_src_to_dest (rtx insn, rtx src, rtx dest)
for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
{
next = XEXP (link, 1);
if (XEXP (link, 0) == src)
if (GET_CODE (link) == EXPR_LIST && XEXP (link, 0) == src)
{
*p_move_notes = link;
p_move_notes = &XEXP (link, 1);

2
gcc/reorg.c
View File

@ -876,7 +876,7 @@ mostly_true_jump (rtx jump_insn)
rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
if (note)
{
int prob = INTVAL (XEXP (note, 0));
int prob = XINT (note, 0);
if (prob >= REG_BR_PROB_BASE * 9 / 10)
return 2;

7
gcc/rtl.def
View File

@ -95,13 +95,16 @@ DEF_RTL_EXPR(DEBUG_EXPR, "debug_expr", "0", RTX_OBJ)
Expressions used in constructing lists.
--------------------------------------------------------------------- */
/* a linked list of expressions */
/* A linked list of expressions. */
DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA)
/* a linked list of instructions.
/* A linked list of instructions.
The insns are represented in print by their uids. */
DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
/* A linked list of integers. */
DEF_RTL_EXPR(INT_LIST, "int_list", "ie", RTX_EXTRA)
/* SEQUENCE is used in late passes of the compiler to group insns for
one reason or another.

2
gcc/rtl.h
View File

@ -2055,6 +2055,8 @@ extern int find_reg_fusage (const_rtx, enum rtx_code, const_rtx);
extern int find_regno_fusage (const_rtx, enum rtx_code, unsigned int);
extern rtx alloc_reg_note (enum reg_note, rtx, rtx);
extern void add_reg_note (rtx, enum reg_note, rtx);
extern void add_int_reg_note (rtx, enum reg_note, int);
extern void add_shallow_copy_of_reg_note (rtx, rtx);
extern void remove_note (rtx, const_rtx);
extern void remove_reg_equal_equiv_notes (rtx);
extern void remove_reg_equal_equiv_notes_for_regno (unsigned int);

30
gcc/rtlanal.c
View File

@ -1923,6 +1923,14 @@ find_regno_fusage (const_rtx insn, enum rtx_code code, unsigned int regno)
}
/* Return true if KIND is an integer REG_NOTE. */
static bool
int_reg_note_p (enum reg_note kind)
{
return kind == REG_BR_PROB;
}
/* Allocate a register note with kind KIND and datum DATUM. LIST is
stored as the pointer to the next register note. */
@ -1931,6 +1939,7 @@ alloc_reg_note (enum reg_note kind, rtx datum, rtx list)
{
rtx note;
gcc_checking_assert (!int_reg_note_p (kind));
switch (kind)
{
case REG_CC_SETTER:
@ -1961,6 +1970,27 @@ add_reg_note (rtx insn, enum reg_note kind, rtx datum)
REG_NOTES (insn) = alloc_reg_note (kind, datum, REG_NOTES (insn));
}
/* Add an integer register note with kind KIND and datum DATUM to INSN. */
void
add_int_reg_note (rtx insn, enum reg_note kind, int datum)
{
gcc_checking_assert (int_reg_note_p (kind));
REG_NOTES (insn) = gen_rtx_INT_LIST ((enum machine_mode) kind,
datum, REG_NOTES (insn));
}
/* Add a register note like NOTE to INSN. */
void
add_shallow_copy_of_reg_note (rtx insn, rtx note)
{
if (GET_CODE (note) == INT_LIST)
add_int_reg_note (insn, REG_NOTE_KIND (note), XINT (note, 0));
else
add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
}
/* Remove register note NOTE from the REG_NOTES of INSN. */
void

5
gcc/sched-vis.c
View File

@ -751,7 +751,10 @@ print_insn_with_notes (pretty_printer *pp, const_rtx x)
{
pp_printf (pp, "%s %s ", print_rtx_head,
GET_REG_NOTE_NAME (REG_NOTE_KIND (note)));
print_pattern (pp, XEXP (note, 0), 1);
if (GET_CODE (note) == INT_LIST)
pp_printf (pp, "%d", XINT (note, 0));
else
print_pattern (pp, XEXP (note, 0), 1);
pp_newline (pp);
}
}