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AVX. Fix block absq emit for non AVX-512 targets. 

gcc/
	* config/i386/sse.md (define_mode_iterator VI1248_AVX512VL_AVX512BW):
	New.
	(define_insn "*abs<mode>2"): Use VI1248_AVX512VL_AVX512BW mode
	iterator.
	(define_expand "abs<mode>2"): Ditto.

gcc/testsuite/
	* gcc.target/i386/pr63600.c: New.

From-SVN: r216591
This commit is contained in:
Kirill Yukhin 2014-10-23 11:50:19 +00:00 committed by Kirill Yukhin
parent c1b7a563e0
commit e650a5685c
4 changed files with 37 additions and 6 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2014-10-23 Kirill Yukhin <kirill.yukhin@intel.com>
* config/i386/sse.md (define_mode_iterator VI1248_AVX512VL_AVX512BW):
New.
(define_insn "*abs<mode>2"): Use VI1248_AVX512VL_AVX512BW mode
iterator.
(define_expand "abs<mode>2"): Ditto.
2014-10-23 Kirill Yukhin <kirill.yukhin@intel.com>
* tree-core.h (tree_var_decl): Extend `function_code' field

20
gcc/config/i386/sse.md
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@ -13785,10 +13785,18 @@
(set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)"))
(set_attr "mode" "DI")])
;; Mode iterator to handle singularity w/ absence of V2DI and V4DI
;; modes for abs instruction on pre AVX-512 targets.
(define_mode_iterator VI1248_AVX512VL_AVX512BW
[(V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX2") V16QI
(V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX2") V8HI
(V16SI "TARGET_AVX512F") (V8SI "TARGET_AVX2") V4SI
(V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")])
(define_insn "*abs<mode>2"
[(set (match_operand:VI_AVX2 0 "register_operand" "=v")
(abs:VI_AVX2
(match_operand:VI_AVX2 1 "nonimmediate_operand" "vm")))]
[(set (match_operand:VI1248_AVX512VL_AVX512BW 0 "register_operand" "=v")
(abs:VI1248_AVX512VL_AVX512BW
(match_operand:VI1248_AVX512VL_AVX512BW 1 "nonimmediate_operand" "vm")))]
"TARGET_SSSE3"
"%vpabs<ssemodesuffix>\t{%1, %0|%0, %1}"
[(set_attr "type" "sselog1")
@ -13824,9 +13832,9 @@
(set_attr "mode" "<sseinsnmode>")])
(define_expand "abs<mode>2"
[(set (match_operand:VI_AVX2 0 "register_operand")
(abs:VI_AVX2
(match_operand:VI_AVX2 1 "nonimmediate_operand")))]
[(set (match_operand:VI1248_AVX512VL_AVX512BW 0 "register_operand")
(abs:VI1248_AVX512VL_AVX512BW
(match_operand:VI1248_AVX512VL_AVX512BW 1 "nonimmediate_operand")))]
"TARGET_SSE2"
{
if (!TARGET_SSSE3)

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2014-10-10 Kirill Yukhin <kirill.yukhin@intel.com>
* gcc.target/i386/pr63600.c: New.
2014-10-23 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* gcc.dg/ipa/ipa-icf-21.c: Add -msse2 to dg-options.

11
gcc/testsuite/gcc.target/i386/pr63600.c Normal file
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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-options "-O3 -msse" } */
long *a, b;
int c;
void
foo (void)
{
for (c = 0; c < 64; c++)
a[c] = b >= 0 ? b : -b;
}