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arm.h (ARM_PRINT_OPERAND_ADDRESS): Use gcc_assert and gcc_unreachable as appropriate.

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* config/arm/arm.h (ARM_PRINT_OPERAND_ADDRESS): Use gcc_assert and
	gcc_unreachable as appropriate.
	(THUMB_PRINT_OPERAND_ADDRESS): Likewise.
	* config/arm/arm.c (arm_override_options, arm_compute_func_type,
	use_return_insn, const_ok_for_op, arm_gen_constant,
	arm_canonicalize_comparison, legitimize_pic_address,
	thumb_find_work_register, arm_load_pic_register, arm_rtx_costs_1,
	arm_cirrus_insn_p, cirrus_reorg, minmax_code,
	load_multiple_sequence, emit_ldm_seq, store_multiple_sequence,
	emit_stm_seq, arm_gen_movmemqi, arm_select_dominance_cc_mode,
	arm_select_cc_mode, arm_reload_in_hi, arm_reload_out_hi,
	move_minipool_fix_forward_ref, move_minipool_fix_backward_ref,
	dump_minipool, create_fix_barrier, push_minipool_fix, arm_reorg,
	fp_immediate_constant, fp_const_from_val, vfp_output_fstmx,
	output_call, output_mov_long_double_fpa_from_arm,
	output_mov_long_double_arm_from_fpa,
	output_mov_double_fpa_from_arm, output_mov_double_arm_from_fpa,
	output_move_double, arithmetic_instr, shift_op, int_log2,
	output_return_instruction, arm_output_function_prologue,
	arm_output_epilogue, arm_output_function_epilogue,
	emit_multi_reg_push, arm_get_frame_offsets,
	arm_compute_initial_elimination_offset, arm_expand_prologue,
	arm_print_operand, arm_assemble_integer, get_arm_condition_code,
	arm_final_prescan_insn, arm_init_iwmmxt_builtins,
	arm_expand_binop_builtin, thumb_pushpop, thumb_far_jump_used_p,
	thumb_compute_initial_elimination_offset,
	thumb_output_function_prologue, thumb_load_double_from_address,
	thumb_output_move_mem_multiple, thumb_reload_out_hi,
	arm_emit_vector_const, arm_dbx_register_number): Likewise.
	* config/arm/pe.c (arm_mark_dllexport, arm_mark_dllimport): Likewise.
	* config/arm/arm.md (thumb_extendhisi2,
	*thumb_extendhisi2_insn_v6, *thumb_extendqisi2,
	*thumb_extendqisi2_v6, movhi, *thumb_movhi_insn,
	thumb_movhi_clobber, movqi, *arm_buneq, *arm_bltgt,
	*arm_buneq_reversed, *arm_bltgt_reversed, suneq, sltgt): Likewise.
	* config/arm/cirrus.md (*cirrus_arm_movdi,
	*cirrus_movdf_hard_insn): Likewise.
	* config/arm/vfp.md (*arm_movdi_vfp, *movdf_vfp): Likewise.

From-SVN: r98850
This commit is contained in:
Nathan Sidwell 2005-04-27 16:09:03 +00:00 committed by Nathan Sidwell
parent 4845b383bb
commit e6d29d157f
7 changed files with 441 additions and 468 deletions
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41
gcc/ChangeLog
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@ -1,3 +1,44 @@
2005-04-27 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.h (ARM_PRINT_OPERAND_ADDRESS): Use gcc_assert and
gcc_unreachable as appropriate.
(THUMB_PRINT_OPERAND_ADDRESS): Likewise.
* config/arm/arm.c (arm_override_options, arm_compute_func_type,
use_return_insn, const_ok_for_op, arm_gen_constant,
arm_canonicalize_comparison, legitimize_pic_address,
thumb_find_work_register, arm_load_pic_register, arm_rtx_costs_1,
arm_cirrus_insn_p, cirrus_reorg, minmax_code,
load_multiple_sequence, emit_ldm_seq, store_multiple_sequence,
emit_stm_seq, arm_gen_movmemqi, arm_select_dominance_cc_mode,
arm_select_cc_mode, arm_reload_in_hi, arm_reload_out_hi,
move_minipool_fix_forward_ref, move_minipool_fix_backward_ref,
dump_minipool, create_fix_barrier, push_minipool_fix, arm_reorg,
fp_immediate_constant, fp_const_from_val, vfp_output_fstmx,
output_call, output_mov_long_double_fpa_from_arm,
output_mov_long_double_arm_from_fpa,
output_mov_double_fpa_from_arm, output_mov_double_arm_from_fpa,
output_move_double, arithmetic_instr, shift_op, int_log2,
output_return_instruction, arm_output_function_prologue,
arm_output_epilogue, arm_output_function_epilogue,
emit_multi_reg_push, arm_get_frame_offsets,
arm_compute_initial_elimination_offset, arm_expand_prologue,
arm_print_operand, arm_assemble_integer, get_arm_condition_code,
arm_final_prescan_insn, arm_init_iwmmxt_builtins,
arm_expand_binop_builtin, thumb_pushpop, thumb_far_jump_used_p,
thumb_compute_initial_elimination_offset,
thumb_output_function_prologue, thumb_load_double_from_address,
thumb_output_move_mem_multiple, thumb_reload_out_hi,
arm_emit_vector_const, arm_dbx_register_number): Likewise.
* config/arm/pe.c (arm_mark_dllexport, arm_mark_dllimport): Likewise.
* config/arm/arm.md (thumb_extendhisi2,
*thumb_extendhisi2_insn_v6, *thumb_extendqisi2,
*thumb_extendqisi2_v6, movhi, *thumb_movhi_insn,
thumb_movhi_clobber, movqi, *arm_buneq, *arm_bltgt,
*arm_buneq_reversed, *arm_bltgt_reversed, suneq, sltgt): Likewise.
* config/arm/cirrus.md (*cirrus_arm_movdi,
*cirrus_movdf_hard_insn): Likewise.
* config/arm/vfp.md (*arm_movdi_vfp, *movdf_vfp): Likewise.
2005-04-27 Kazu Hirata <kazu@cs.umass.edu>
* tree-flow.h (ssa_names): Change the type to VEC(tree,gc).

773
gcc/config/arm/arm.c
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8
gcc/config/arm/arm.h
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@ -2565,7 +2565,7 @@ extern int making_const_table;
} \
\
default: \
abort(); \
gcc_unreachable (); \
} \
} \
else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC \
@ -2573,8 +2573,7 @@ extern int making_const_table;
{ \
extern enum machine_mode output_memory_reference_mode; \
\
if (GET_CODE (XEXP (X, 0)) != REG) \
abort (); \
gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \
\
if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
asm_fprintf (STREAM, "[%r, #%s%d]!", \
@ -2618,8 +2617,7 @@ extern int making_const_table;
asm_fprintf (STREAM, "%r!", REGNO (XEXP (X, 0))); \
else if (GET_CODE (X) == PLUS) \
{ \
if (GET_CODE (XEXP (X, 0)) != REG) \
abort (); \
gcc_assert (GET_CODE (XEXP (X, 0)) == REG); \
if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
asm_fprintf (STREAM, "[%r, #%wd]", \
REGNO (XEXP (X, 0)), \

51
gcc/config/arm/arm.md
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@ -3614,12 +3614,8 @@
ops[1] = mem;
ops[2] = const0_rtx;
}
if (GET_CODE (ops[1]) != REG)
{
debug_rtx (ops[1]);
abort ();
}
gcc_assert (GET_CODE (ops[1]) == REG);
ops[0] = operands[0];
ops[3] = operands[2];
@ -3634,7 +3630,7 @@
;; We used to have an early-clobber on the scratch register here.
;; However, there's a bug somewhere in reload which means that this
;; can be partially ignored during spill allocation if the memory
;; address also needs reloading; this causes an abort later on when
;; address also needs reloading; this causes us to die later on when
;; we try to verify the operands. Fortunately, we don't really need
;; the early-clobber: we can always use operand 0 if operand 2
;; overlaps the address.
@ -3685,11 +3681,7 @@
ops[2] = const0_rtx;
}
if (GET_CODE (ops[1]) != REG)
{
debug_rtx (ops[1]);
abort ();
}
gcc_assert (GET_CODE (ops[1]) == REG);
ops[0] = operands[0];
if (reg_mentioned_p (operands[2], ops[1]))
@ -3949,10 +3941,9 @@
else
output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
}
else if (GET_CODE (b) != REG)
abort ();
else
{
gcc_assert (GET_CODE (b) == REG);
if (REGNO (b) == REGNO (ops[0]))
{
output_asm_insn (\"ldrb\\t%0, [%2, %1]\", ops);
@ -4032,10 +4023,9 @@
else
output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
}
else if (GET_CODE (b) != REG)
abort ();
else
{
gcc_assert (GET_CODE (b) == REG);
if (REGNO (b) == REGNO (ops[0]))
{
output_asm_insn (\"ldrb\\t%0, [%2, %1]\", ops);
@ -4778,8 +4768,7 @@
{
/* Writing a constant to memory needs a scratch, which should
be handled with SECONDARY_RELOADs. */
if (GET_CODE (operands[0]) != REG)
abort ();
gcc_assert (GET_CODE (operands[0]) == REG);
operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
@ -4821,8 +4810,7 @@
{
/* Writing a constant to memory needs a scratch, which should
be handled with SECONDARY_RELOADs. */
if (GET_CODE (operands[0]) != REG)
abort ();
gcc_assert (GET_CODE (operands[0]) == REG);
operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
@ -4846,7 +4834,7 @@
case 3: return \"mov %0, %1\";
case 4: return \"mov %0, %1\";
case 5: return \"mov %0, %1\";
default: abort ();
default: gcc_unreachable ();
case 1:
/* The stack pointer can end up being taken as an index register.
Catch this case here and deal with it. */
@ -4957,7 +4945,7 @@
(clobber (match_operand:SI 2 "register_operand" "=&l"))]
"TARGET_THUMB"
"*
abort ();"
gcc_unreachable ();"
)
;; We use a DImode scratch because we may occasionally need an additional
@ -5052,8 +5040,7 @@
{
/* Writing a constant to memory needs a scratch, which should
be handled with SECONDARY_RELOADs. */
if (GET_CODE (operands[0]) != REG)
abort ();
gcc_assert (GET_CODE (operands[0]) == REG);
operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
@ -7059,8 +7046,7 @@
(pc)))]
"TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
"*
if (arm_ccfsm_state != 0)
abort ();
gcc_assert (!arm_ccfsm_state);
return \"bvs\\t%l0\;beq\\t%l0\";
"
@ -7076,8 +7062,7 @@
(pc)))]
"TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
"*
if (arm_ccfsm_state != 0)
abort ();
gcc_assert (!arm_ccfsm_state);
return \"bmi\\t%l0\;bgt\\t%l0\";
"
@ -7112,8 +7097,7 @@
(label_ref (match_operand 0 "" ""))))]
"TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
"*
if (arm_ccfsm_state != 0)
abort ();
gcc_assert (!arm_ccfsm_state);
return \"bmi\\t%l0\;bgt\\t%l0\";
"
@ -7129,8 +7113,7 @@
(label_ref (match_operand 0 "" ""))))]
"TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
"*
if (arm_ccfsm_state != 0)
abort ();
gcc_assert (!arm_ccfsm_state);
return \"bvs\\t%l0\;beq\\t%l0\";
"
@ -7286,14 +7269,14 @@
; [(set (match_operand:SI 0 "s_register_operand" "")
; (uneq:SI (match_dup 1) (const_int 0)))]
; "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
; "abort ();"
; "gcc_unreachable ();"
; )
;
; (define_expand "sltgt"
; [(set (match_operand:SI 0 "s_register_operand" "")
; (ltgt:SI (match_dup 1) (const_int 0)))]
; "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_FPA"
; "abort ();"
; "gcc_unreachable ();"
; )
(define_insn "*mov_scc"

4
gcc/config/arm/cirrus.md
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@ -391,7 +391,7 @@
/* Shifting by 0 will just copy %1 into %0. */
case 7: return \"cfsh64%?\\t%V0, %V1, #0\";
default: abort ();
default: gcc_unreachable ();
}
}"
[(set_attr "length" " 8, 8, 8, 8, 8, 4, 4, 4")
@ -468,7 +468,7 @@
case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\";
case 8: return \"cfmvrdl%?\\t%Q0, %V1\;cfmvrdh%?\\t%R0, %V1\";
case 9: return \"cfstrd%?\\t%V1, %0\";
default: abort ();
default: gcc_unreachable ();
}
}"
[(set_attr "type" "load1,store2, *,store2,load1, *, load1, *, *,store2")

28
gcc/config/arm/pe.c
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@ -108,13 +108,11 @@ arm_mark_dllexport (decl)
tree idp;
rtlname = XEXP (DECL_RTL (decl), 0);
if (GET_CODE (rtlname) == SYMBOL_REF)
oldname = XSTR (rtlname, 0);
else if (GET_CODE (rtlname) == MEM
&& GET_CODE (XEXP (rtlname, 0)) == SYMBOL_REF)
oldname = XSTR (XEXP (rtlname, 0), 0);
else
abort ();
if (GET_CODE (rtlname) == MEM)
rtlname = XEXP (rtlname, 0);
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
oldname = XSTR (rtlname, 0);
if (arm_dllimport_name_p (oldname))
oldname += 9;
else if (arm_dllexport_name_p (oldname))
@ -147,17 +145,13 @@ arm_mark_dllimport (decl)
rtlname = XEXP (DECL_RTL (decl), 0);
if (GET_CODE (rtlname) == SYMBOL_REF)
oldname = XSTR (rtlname, 0);
else if (GET_CODE (rtlname) == MEM
&& GET_CODE (XEXP (rtlname, 0)) == SYMBOL_REF)
oldname = XSTR (XEXP (rtlname, 0), 0);
else
abort ();
if (GET_CODE (rtlname) == MEM)
rtlname = XEXP (rtlname, 0);
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
oldname = XSTR (rtlname, 0);
if (arm_dllexport_name_p (oldname))
abort (); /* this shouldn't happen */
else if (arm_dllimport_name_p (oldname))
gcc_assert (!arm_dllexport_name_p (oldname));
if (arm_dllimport_name_p (oldname))
return; /* already done */
/* ??? One can well ask why we're making these checks here,

4
gcc/config/arm/vfp.md
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@ -158,7 +158,7 @@
case 7:
return \"fstd%?\\t%P1, %0\\t%@ int\";
default:
abort ();
gcc_unreachable ();
}
"
[(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarith,f_load,f_store")
@ -217,7 +217,7 @@
case 7:
return \"#\";
default:
abort ();
gcc_unreachable ();
}
}
"