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Make SET_NEXT_INSN/SET_PREV_INSN require an rtx_insn 

gcc/
2014-08-28  David Malcolm  <dmalcolm@redhat.com>

	* rtl.h (SET_PREV_INSN): Strengthen param from rtx to rtx_insn *.
	(SET_NEXT_INSN): Likewise.
	(gen_rtvec_v): Add an overload for param types (int, rtx_insn **).

	* config/c6x/c6x.c (gen_one_bundle): Strengthen param "slot" from
	rtx * to rtx_insn **.  Introduce a new local rtx "seq", using it
	to split out the SEQUENCE from local "bundle", strengthening the
	latter from rtx to rtx_insn * to hold the insn holding the SEQUENCE.
	Strengthen locals "t" and "insn" from rtx to rtx_insn *.
	(c6x_gen_bundles): Strengthen locals "insn", "next", "last_call"
	and the type of the elements of the "slot" array from rtx to
	rtx_insn *.
	(reorg_split_calls): Likewise for locals "insn" and "next", and
	the type of the elements of the "slot" array.

	* config/frv/frv.c (frv_nops): Likewise for the elements of this
	array.
	(frv_function_prologue): Likewise for locals "insn", "next",
	"last_call".
	(frv_register_nop): Introduce a local "nop_insn" to be the
	rtx_insn * containing rtx "nop".

	* config/mep/mep.c (mep_make_bundle): Param "core" is sometimes
	used as an insn and sometimes as a pattern, so rename it to
	"core_insn_or_pat", and introduce local rtx_insn * "core_insn",
	using it where dealing with the core insn.

	* config/picochip/picochip.c (reorder_var_tracking_notes):
	Strengthen locals "insn", "next", "last_insn", "queue",
	"next_queue", "prev" from rtx to rtx_insn *.

	* emit-rtl.c (gen_rtvec_v): Add overloaded implementation for when
	the second param is an rtx_insn ** rather than an rtx **.
	(link_insn_into_chain): Strengthen locals "seq" and "sequence"
	from rtx to rtx_sequence *, and introduce local named "sequence",
	using methods of rtx_sequence to clarify the code.
	(remove_insn): Introduce local rtx_sequence * named "sequence" and
	use its methods.
	(emit_insn_after_1): Strengthen return type from rtx to rtx_insn *.
	Rename param "after" to "uncast_after", reintroducing "after" as a
	local rtx_insn * with a checked cast.
	(emit_pattern_after_noloc): Rename param "after" to "uncast_after",
	reintroducing "after" as a local rtx_insn * with a checked cast.
	Strengthen local "last" from rtx to rtx_insn * and remove the
	now-redundant checked casts.
	(copy_delay_slot_insn): Strengthen return type and param from rtx
	to rtx_insn *.

	* haifa-sched.c (reemit_notes): Strengthen params "insn" and
	"last" from rtx to rtx_insn *.

From-SVN: r214685
This commit is contained in:
David Malcolm 2014-08-28 18:59:13 +00:00 committed by David Malcolm
parent f8f0516ef6
commit e6eda74618
8 changed files with 143 additions and 57 deletions
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53
gcc/ChangeLog
View File

@ -1,3 +1,56 @@
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* rtl.h (SET_PREV_INSN): Strengthen param from rtx to rtx_insn *.
(SET_NEXT_INSN): Likewise.
(gen_rtvec_v): Add an overload for param types (int, rtx_insn **).
* config/c6x/c6x.c (gen_one_bundle): Strengthen param "slot" from
rtx * to rtx_insn **. Introduce a new local rtx "seq", using it
to split out the SEQUENCE from local "bundle", strengthening the
latter from rtx to rtx_insn * to hold the insn holding the SEQUENCE.
Strengthen locals "t" and "insn" from rtx to rtx_insn *.
(c6x_gen_bundles): Strengthen locals "insn", "next", "last_call"
and the type of the elements of the "slot" array from rtx to
rtx_insn *.
(reorg_split_calls): Likewise for locals "insn" and "next", and
the type of the elements of the "slot" array.
* config/frv/frv.c (frv_nops): Likewise for the elements of this
array.
(frv_function_prologue): Likewise for locals "insn", "next",
"last_call".
(frv_register_nop): Introduce a local "nop_insn" to be the
rtx_insn * containing rtx "nop".
* config/mep/mep.c (mep_make_bundle): Param "core" is sometimes
used as an insn and sometimes as a pattern, so rename it to
"core_insn_or_pat", and introduce local rtx_insn * "core_insn",
using it where dealing with the core insn.
* config/picochip/picochip.c (reorder_var_tracking_notes):
Strengthen locals "insn", "next", "last_insn", "queue",
"next_queue", "prev" from rtx to rtx_insn *.
* emit-rtl.c (gen_rtvec_v): Add overloaded implementation for when
the second param is an rtx_insn ** rather than an rtx **.
(link_insn_into_chain): Strengthen locals "seq" and "sequence"
from rtx to rtx_sequence *, and introduce local named "sequence",
using methods of rtx_sequence to clarify the code.
(remove_insn): Introduce local rtx_sequence * named "sequence" and
use its methods.
(emit_insn_after_1): Strengthen return type from rtx to rtx_insn *.
Rename param "after" to "uncast_after", reintroducing "after" as a
local rtx_insn * with a checked cast.
(emit_pattern_after_noloc): Rename param "after" to "uncast_after",
reintroducing "after" as a local rtx_insn * with a checked cast.
Strengthen local "last" from rtx to rtx_insn * and remove the
now-redundant checked casts.
(copy_delay_slot_insn): Strengthen return type and param from rtx
to rtx_insn *.
* haifa-sched.c (reemit_notes): Strengthen params "insn" and
"last" from rtx to rtx_insn *.
2014-08-28 David Malcolm <dmalcolm@redhat.com>
* emit-rtl.h (copy_delay_slot_insn): Strengthen return type and

29
gcc/config/c6x/c6x.c
View File

@ -4591,23 +4591,24 @@ c6x_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
first in the original stream. */
static void
gen_one_bundle (rtx *slot, int n_filled, int real_first)
gen_one_bundle (rtx_insn **slot, int n_filled, int real_first)
{
rtx bundle;
rtx t;
rtx seq;
rtx_insn *bundle;
rtx_insn *t;
int i;
bundle = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec_v (n_filled, slot));
bundle = make_insn_raw (bundle);
seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec_v (n_filled, slot));
bundle = make_insn_raw (seq);
BLOCK_FOR_INSN (bundle) = BLOCK_FOR_INSN (slot[0]);
INSN_LOCATION (bundle) = INSN_LOCATION (slot[0]);
SET_PREV_INSN (bundle) = SET_PREV_INSN (slot[real_first]);
t = NULL_RTX;
t = NULL;
for (i = 0; i < n_filled; i++)
{
rtx insn = slot[i];
rtx_insn *insn = slot[i];
remove_insn (insn);
SET_PREV_INSN (insn) = t ? t : PREV_INSN (bundle);
if (t != NULL_RTX)
@ -4630,14 +4631,14 @@ static void
c6x_gen_bundles (void)
{
basic_block bb;
rtx insn, next, last_call;
rtx_insn *insn, *next, *last_call;
FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
rtx_insn *insn, *next;
/* The machine is eight insns wide. We can have up to six shadow
insns, plus an extra slot for merging the jump shadow. */
rtx slot[15];
rtx_insn *slot[15];
int n_filled = 0;
int first_slot = 0;
@ -4700,7 +4701,7 @@ c6x_gen_bundles (void)
/* Bundling, and emitting nops, can separate
NOTE_INSN_CALL_ARG_LOCATION from the corresponding calls. Fix
that up here. */
last_call = NULL_RTX;
last_call = NULL;
for (insn = get_insns (); insn; insn = next)
{
next = NEXT_INSN (insn);
@ -4855,13 +4856,13 @@ static void
reorg_split_calls (rtx *call_labels)
{
unsigned int reservation_mask = 0;
rtx insn = get_insns ();
rtx_insn *insn = get_insns ();
gcc_assert (NOTE_P (insn));
insn = next_real_insn (insn);
while (insn)
{
int uid;
rtx next = next_real_insn (insn);
rtx_insn *next = next_real_insn (insn);
if (DEBUG_INSN_P (insn))
goto done;
@ -4886,7 +4887,7 @@ reorg_split_calls (rtx *call_labels)
else
{
rtx t;
rtx slot[4];
rtx_insn *slot[4];
emit_label_after (label, insn);
/* Bundle the call and its delay slots into a single

16
gcc/config/frv/frv.c
View File

@ -105,7 +105,7 @@ static unsigned int frv_type_to_unit[TYPE_UNKNOWN + 1];
/* An array of dummy nop INSNs, one for each type of nop that the
target supports. */
static GTY(()) rtx frv_nops[NUM_NOP_PATTERNS];
static GTY(()) rtx_insn *frv_nops[NUM_NOP_PATTERNS];
/* The number of nop instructions in frv_nops[]. */
static unsigned int frv_num_nops;
@ -1405,7 +1405,7 @@ frv_function_contains_far_jump (void)
static void
frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
{
rtx insn, next, last_call;
rtx_insn *insn, *next, *last_call;
/* If no frame was created, check whether the function uses a call
instruction to implement a far jump. If so, save the link in gr3 and
@ -1415,7 +1415,7 @@ frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
a stack frame. */
if (frv_stack_info ()->total_size == 0 && frv_function_contains_far_jump ())
{
rtx insn;
rtx_insn *insn;
/* Just to check that the above comment is true. */
gcc_assert (!df_regs_ever_live_p (GPR_FIRST + 3));
@ -1450,7 +1450,7 @@ frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
/* Locate CALL_ARG_LOCATION notes that have been misplaced
and move them back to where they should be located. */
last_call = NULL_RTX;
last_call = NULL;
for (insn = get_insns (); insn; insn = next)
{
next = NEXT_INSN (insn);
@ -8161,10 +8161,10 @@ frv_reorg_packet (void)
static void
frv_register_nop (rtx nop)
{
nop = make_insn_raw (nop);
SET_NEXT_INSN (nop) = 0;
SET_PREV_INSN (nop) = 0;
frv_nops[frv_num_nops++] = nop;
rtx_insn *nop_insn = make_insn_raw (nop);
SET_NEXT_INSN (nop_insn) = 0;
SET_PREV_INSN (nop_insn) = 0;
frv_nops[frv_num_nops++] = nop_insn;
}
/* Implement TARGET_MACHINE_DEPENDENT_REORG. Divide the instructions

28
gcc/config/mep/mep.c
View File

@ -6804,38 +6804,42 @@ mep_ipipe_ldc_p (rtx_insn *insn)
Emit the bundle in place of COP and return it. */
static rtx_insn *
mep_make_bundle (rtx core, rtx_insn *cop)
mep_make_bundle (rtx core_insn_or_pat, rtx_insn *cop)
{
rtx seq;
rtx_insn *core_insn;
rtx_insn *insn;
/* If CORE is an existing instruction, remove it, otherwise put
the new pattern in an INSN harness. */
if (INSN_P (core))
remove_insn (core);
if (INSN_P (core_insn_or_pat))
{
core_insn = as_a <rtx_insn *> (core_insn_or_pat);
remove_insn (core_insn);
}
else
core = make_insn_raw (core);
core_insn = make_insn_raw (core_insn_or_pat);
/* Generate the bundle sequence and replace COP with it. */
seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (2, core, cop));
seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (2, core_insn, cop));
insn = emit_insn_after (seq, cop);
remove_insn (cop);
/* Set up the links of the insns inside the SEQUENCE. */
SET_PREV_INSN (core) = PREV_INSN (insn);
SET_NEXT_INSN (core) = cop;
SET_PREV_INSN (cop) = core;
SET_PREV_INSN (core_insn) = PREV_INSN (insn);
SET_NEXT_INSN (core_insn) = cop;
SET_PREV_INSN (cop) = core_insn;
SET_NEXT_INSN (cop) = NEXT_INSN (insn);
/* Set the VLIW flag for the coprocessor instruction. */
PUT_MODE (core, VOIDmode);
PUT_MODE (core_insn, VOIDmode);
PUT_MODE (cop, BImode);
/* Derive a location for the bundle. Individual instructions cannot
have their own location because there can be no assembler labels
between CORE and COP. */
INSN_LOCATION (insn) = INSN_LOCATION (INSN_LOCATION (core) ? core : cop);
INSN_LOCATION (core) = 0;
between CORE_INSN and COP. */
INSN_LOCATION (insn) = INSN_LOCATION (INSN_LOCATION (core_insn) ? core_insn : cop);
INSN_LOCATION (core_insn) = 0;
INSN_LOCATION (cop) = 0;
return insn;

10
gcc/config/picochip/picochip.c
View File

@ -3177,8 +3177,8 @@ reorder_var_tracking_notes (void)
FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next, last_insn = NULL_RTX;
rtx queue = NULL_RTX;
rtx_insn *insn, *next, *last_insn = NULL;
rtx_insn *queue = NULL;
/* Iterate through the bb and find the last non-debug insn */
for (insn = BB_HEAD (bb); insn != NEXT_INSN(BB_END (bb)); insn = NEXT_INSN(insn))
@ -3198,7 +3198,7 @@ reorder_var_tracking_notes (void)
{
while (queue)
{
rtx next_queue = PREV_INSN (queue);
rtx_insn *next_queue = PREV_INSN (queue);
SET_PREV_INSN (NEXT_INSN(insn)) = queue;
SET_NEXT_INSN(queue) = NEXT_INSN(insn);
SET_PREV_INSN(queue) = insn;
@ -3215,7 +3215,7 @@ reorder_var_tracking_notes (void)
{
while (queue)
{
rtx next_queue = PREV_INSN (queue);
rtx_insn *next_queue = PREV_INSN (queue);
SET_NEXT_INSN (PREV_INSN(insn)) = queue;
SET_PREV_INSN (queue) = PREV_INSN(insn);
SET_PREV_INSN (insn) = queue;
@ -3226,7 +3226,7 @@ reorder_var_tracking_notes (void)
}
else if (NOTE_P (insn))
{
rtx prev = PREV_INSN (insn);
rtx_insn *prev = PREV_INSN (insn);
SET_PREV_INSN (next) = prev;
SET_NEXT_INSN (prev) = next;
/* Ignore call_arg notes. They are expected to be just after the

57
gcc/emit-rtl.c
View File

@ -933,6 +933,25 @@ gen_rtvec_v (int n, rtx *argp)
return rt_val;
}
rtvec
gen_rtvec_v (int n, rtx_insn **argp)
{
int i;
rtvec rt_val;
/* Don't allocate an empty rtvec... */
if (n == 0)
return NULL_RTVEC;
rt_val = rtvec_alloc (n);
for (i = 0; i < n; i++)
rt_val->elem[i] = *argp++;
return rt_val;
}
/* Return the number of bytes between the start of an OUTER_MODE
in-memory value and the start of an INNER_MODE in-memory value,
@ -3885,22 +3904,25 @@ link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
SET_NEXT_INSN (prev) = insn;
if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
{
rtx sequence = PATTERN (prev);
SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
}
}
if (next != NULL)
{
SET_PREV_INSN (next) = insn;
if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
SET_PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
{
rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
SET_PREV_INSN (sequence->insn (0)) = insn;
}
}
if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
{
rtx sequence = PATTERN (insn);
SET_PREV_INSN (XVECEXP (sequence, 0, 0)) = prev;
SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
SET_PREV_INSN (sequence->insn (0)) = prev;
SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
}
}
@ -4079,8 +4101,8 @@ remove_insn (rtx insn)
SET_NEXT_INSN (prev) = next;
if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
{
rtx sequence = PATTERN (prev);
SET_NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
}
}
else if (get_insns () == insn)
@ -4107,7 +4129,10 @@ remove_insn (rtx insn)
{
SET_PREV_INSN (next) = prev;
if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
SET_PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
{
rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
SET_PREV_INSN (sequence->insn (0)) = prev;
}
}
else if (get_last_insn () == insn)
set_last_insn (prev);
@ -4387,9 +4412,10 @@ emit_label_before (rtx label, rtx before)
/* Helper for emit_insn_after, handles lists of instructions
efficiently. */
static rtx
emit_insn_after_1 (rtx_insn *first, rtx after, basic_block bb)
static rtx_insn *
emit_insn_after_1 (rtx_insn *first, rtx uncast_after, basic_block bb)
{
rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
rtx_insn *last;
rtx_insn *after_after;
if (!bb && !BARRIER_P (after))
@ -4431,15 +4457,16 @@ emit_insn_after_1 (rtx_insn *first, rtx after, basic_block bb)
}
static rtx_insn *
emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
emit_pattern_after_noloc (rtx x, rtx uncast_after, basic_block bb,
rtx_insn *(*make_raw)(rtx))
{
rtx last = after;
rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
rtx_insn *last = after;
gcc_assert (after);
if (x == NULL_RTX)
return safe_as_a <rtx_insn *> (last);
return last;
switch (GET_CODE (x))
{
@ -4465,7 +4492,7 @@ emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
break;
}
return safe_as_a <rtx_insn *> (last);
return last;
}
/* Make X be output after the insn AFTER and set the BB of insn. If

2
gcc/haifa-sched.c
View File

@ -5243,7 +5243,7 @@ reemit_notes (rtx_insn *insn)
/* Move INSN. Reemit notes if needed. Update CFG, if needed. */
static void
move_insn (rtx_insn *insn, rtx last, rtx nt)
move_insn (rtx_insn *insn, rtx_insn *last, rtx nt)
{
if (PREV_INSN (insn) != last)
{

5
gcc/rtl.h
View File

@ -1327,7 +1327,7 @@ inline rtx_insn *PREV_INSN (const_rtx insn)
return safe_as_a <rtx_insn *> (prev);
}
inline rtx& SET_PREV_INSN (rtx insn)
inline rtx& SET_PREV_INSN (rtx_insn *insn)
{
return XEXP (insn, 0);
}
@ -1338,7 +1338,7 @@ inline rtx_insn *NEXT_INSN (const_rtx insn)
return safe_as_a <rtx_insn *> (next);
}
inline rtx& SET_NEXT_INSN (rtx insn)
inline rtx& SET_NEXT_INSN (rtx_insn *insn)
{
return XEXP (insn, 1);
}
@ -2498,6 +2498,7 @@ extern int rtx_equal_p (const_rtx, const_rtx);
/* In emit-rtl.c */
extern rtvec gen_rtvec_v (int, rtx *);
extern rtvec gen_rtvec_v (int, rtx_insn **);
extern rtx gen_reg_rtx (enum machine_mode);
extern rtx gen_rtx_REG_offset (rtx, enum machine_mode, unsigned int, int);
extern rtx gen_reg_rtx_offset (rtx, enum machine_mode, int);