Disable double precision vectorizer for Atom.
gcc/ 2010-09-13 H.J. Lu <hongjiu.lu@intel.com> * config/i386/i386-protos.h (ix86_units_per_simd_word): New. * config/i386/i386.c (initial_ix86_tune_features): Add X86_TUNE_VECTORIZE_DOUBLE. (ix86_units_per_simd_word): New. * config/i386/i386.h (ix86_tune_indices): Add X86_TUNE_VECTORIZE_DOUBLE. (TARGET_VECTORIZE_DOUBLE): New. (UNITS_PER_SIMD_WORD): Defined with ix86_units_per_simd_word. gcc/testsuite/ 2010-09-13 H.J. Lu <hongjiu.lu@intel.com> * gcc.target/i386/fma4-256-vector.c: Add -mtune=generic. * gcc.target/i386/fma4-vector.c: Likewise. * gcc.target/i386/vectorize2.c: Likewise. * gcc.target/i386/vectorize4.c: Likewise. * gcc.target/i386/vectorize5.c: Likewise. * gcc.target/i386/vectorize6.c: Likewise. * gcc.target/i386/vectorize8.c: Likewise. * gcc.target/i386/vect-double-1.c: New. * gcc.target/i386/vect-double-1a.c: Likewise. * gcc.target/i386/vect-double-2.c: Likewise. * gcc.target/i386/vect-double-2a.c: Likewise. * lib/target-supports.exp (check_effective_target_vect_double): Set et_vect_double_saved to 0 when tuning for Atom. From-SVN: r164255
This commit is contained in:
H.J. Lu
H.J. Lu
parent
14694348f1
commit
e72eba8584
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@ -1,3 +1,16 @@
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2010-09-13 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/i386-protos.h (ix86_units_per_simd_word): New.
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* config/i386/i386.c (initial_ix86_tune_features): Add
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X86_TUNE_VECTORIZE_DOUBLE.
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(ix86_units_per_simd_word): New.
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* config/i386/i386.h (ix86_tune_indices): Add
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X86_TUNE_VECTORIZE_DOUBLE.
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(TARGET_VECTORIZE_DOUBLE): New.
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(UNITS_PER_SIMD_WORD): Defined with ix86_units_per_simd_word.
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2010-09-13 Pat Haugen <pthaugen@us.ibm.com>
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* tree-ssa-ter.c (temp_expr_table_d): Add call_cnt field.
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@ -50,6 +50,7 @@ extern bool x86_extended_QIreg_mentioned_p (rtx);
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extern bool x86_extended_reg_mentioned_p (rtx);
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extern bool x86_maybe_negate_const_int (rtx *, enum machine_mode);
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extern enum machine_mode ix86_cc_mode (enum rtx_code, rtx, rtx);
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extern unsigned int ix86_units_per_simd_word (enum machine_mode);
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extern int avx_vpermilp_parallel (rtx par, enum machine_mode mode);
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extern int avx_vperm2f128_parallel (rtx par, enum machine_mode mode);
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@ -1627,6 +1627,10 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
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/* X86_TUNE_OPT_AGU: Optimize for Address Generation Unit. This flag
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will impact LEA instruction selection. */
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m_ATOM,
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/* X86_TUNE_VECTORIZE_DOUBLE: Enable double precision vector
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instructions. */
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~m_ATOM,
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};
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/* Feature tests against the various architecture variations. */
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@ -32334,6 +32338,28 @@ has_dispatch (rtx insn, int action)
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return false;
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}
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/* ??? No autovectorization into MMX or 3DNOW until we can reliably
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place emms and femms instructions. */
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unsigned int
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ix86_units_per_simd_word (enum machine_mode mode)
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{
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/* Disable double precision vectorizer if needed. */
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if (mode == DFmode && !TARGET_VECTORIZE_DOUBLE)
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return UNITS_PER_WORD;
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#if 0
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/* FIXME: AVX has 32byte floating point vector operations and 16byte
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integer vector operations. But vectorizer doesn't support
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different sizes for integer and floating point vectors. We limit
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vector size to 16byte. */
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if (TARGET_AVX)
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return (mode == DFmode || mode == SFmode) ? 32 : 16;
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else
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#endif
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return TARGET_SSE ? 16 : UNITS_PER_WORD;
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}
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/* Initialize the GCC target structure. */
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#undef TARGET_RETURN_IN_MEMORY
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#define TARGET_RETURN_IN_MEMORY ix86_return_in_memory
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@ -312,6 +312,7 @@ enum ix86_tune_indices {
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X86_TUNE_USE_VECTOR_CONVERTS,
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X86_TUNE_FUSE_CMP_AND_BRANCH,
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X86_TUNE_OPT_AGU,
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X86_TUNE_VECTORIZE_DOUBLE,
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X86_TUNE_LAST
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};
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@ -404,6 +405,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST];
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#define TARGET_FUSE_CMP_AND_BRANCH \
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ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH]
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#define TARGET_OPT_AGU ix86_tune_features[X86_TUNE_OPT_AGU]
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#define TARGET_VECTORIZE_DOUBLE \
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ix86_tune_features[X86_TUNE_VECTORIZE_DOUBLE]
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/* Feature tests against the various architecture variations. */
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enum ix86_arch_indices {
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@ -1030,15 +1033,7 @@ enum target_cpu_default
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|| (MODE) == V2SImode || (MODE) == SImode \
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|| (MODE) == V4HImode || (MODE) == V8QImode)
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/* ??? No autovectorization into MMX or 3DNOW until we can reliably
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place emms and femms instructions.
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FIXME: AVX has 32byte floating point vector operations and 16byte
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integer vector operations. But vectorizer doesn't support
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different sizes for integer and floating point vectors. We limit
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vector size to 16byte. */
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#define UNITS_PER_SIMD_WORD(MODE) \
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(TARGET_AVX ? (((MODE) == DFmode || (MODE) == SFmode) ? 16 : 16) \
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: (TARGET_SSE ? 16 : UNITS_PER_WORD))
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#define UNITS_PER_SIMD_WORD(MODE) ix86_units_per_simd_word (MODE)
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#define VALID_DFP_MODE_P(MODE) \
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((MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode)
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@ -1,3 +1,21 @@
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2010-09-13 H.J. Lu <hongjiu.lu@intel.com>
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* gcc.target/i386/fma4-256-vector.c: Add -mtune=generic.
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* gcc.target/i386/fma4-vector.c: Likewise.
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* gcc.target/i386/vectorize2.c: Likewise.
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* gcc.target/i386/vectorize4.c: Likewise.
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* gcc.target/i386/vectorize5.c: Likewise.
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* gcc.target/i386/vectorize6.c: Likewise.
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* gcc.target/i386/vectorize8.c: Likewise.
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* gcc.target/i386/vect-double-1.c: New.
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* gcc.target/i386/vect-double-1a.c: Likewise.
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* gcc.target/i386/vect-double-2.c: Likewise.
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* gcc.target/i386/vect-double-2a.c: Likewise.
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* lib/target-supports.exp (check_effective_target_vect_double):
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Set et_vect_double_saved to 0 when tuning for Atom.
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2010-09-13 Jan Hubicka <jh@suse.cz>
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* gcc.dg/torture/pr23821.c: Drop static keyword.
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@ -3,7 +3,7 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-O2 -mfma4 -ftree-vectorize" } */
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/* { dg-options "-O2 -mfma4 -ftree-vectorize -mtune=generic" } */
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extern void exit (int);
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@ -3,7 +3,7 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-O2 -mfma4 -ftree-vectorize" } */
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/* { dg-options "-O2 -mfma4 -ftree-vectorize -mtune=generic" } */
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extern void exit (int);
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@ -0,0 +1,35 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -ftree-vectorize -mfpmath=sse -march=core2 -fdump-tree-vect-stats" } */
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extern void abort (void);
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#ifndef STATIC
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#define STATIC
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#endif
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#define N 16
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double cb[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
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double ca[N];
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STATIC void
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__attribute__ ((noinline))
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sse2_test (void)
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{
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int i;
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for (i = 0; i < N; i++)
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{
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ca[i] = cb[i];
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}
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/* check results: */
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for (i = 0; i < N; i++)
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{
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if (ca[i] != cb[i])
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abort ();
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}
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}
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/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
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/* { dg-final { cleanup-tree-dump "vect" } } */
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@ -0,0 +1,8 @@
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/* { dg-do run } */
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/* { dg-require-effective-target sse2 } */
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/* { dg-options "-O2 -ftree-vectorize -mfpmath=sse -msse2 -mtune=core2" } */
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#define STATIC static
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#include "vect-double-1.c"
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#include "sse2-check.h"
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@ -0,0 +1,35 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -ftree-vectorize -mfpmath=sse -msse2 -mtune=atom -fdump-tree-vect-stats" } */
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extern void abort (void);
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#ifndef STATIC
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#define STATIC
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#endif
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#define N 16
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double cb[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45};
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double ca[N];
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STATIC void
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__attribute__ ((noinline))
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sse2_test (void)
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{
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int i;
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for (i = 0; i < N; i++)
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{
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ca[i] = cb[i];
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}
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/* check results: */
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for (i = 0; i < N; i++)
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{
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if (ca[i] != cb[i])
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abort ();
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}
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}
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/* { dg-final { scan-tree-dump-not "vectorized 1 loops" "vect" } } */
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/* { dg-final { cleanup-tree-dump "vect" } } */
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@ -0,0 +1,8 @@
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/* { dg-do run } */
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/* { dg-require-effective-target sse2 } */
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/* { dg-options "-O2 -ftree-vectorize -mfpmath=sse -msse2 -mtune=atom" } */
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#define STATIC static
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#include "vect-double-2.c"
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#include "sse2-check.h"
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@ -1,6 +1,6 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2 -mfpmath=sse" } */
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/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2 -mfpmath=sse -mtune=generic" } */
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double a[256];
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int b[256];
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@ -1,6 +1,6 @@
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/* { dg-do compile } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2 --param ggc-min-expand=0 --param ggc-min-heapsize=0" } */
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/* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2 -mtune=generic --param ggc-min-expand=0 --param ggc-min-heapsize=0" } */
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/* This test, tests two thing, we vectorize square root and also we don't crash due to a GC issue. */
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/* { dg-do compile } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-O2 -ftree-vectorize -mveclibabi=acml -ffast-math" } */
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/* { dg-options "-O2 -ftree-vectorize -mveclibabi=acml -ffast-math -mtune=generic" } */
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double x[256];
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -msse2 -ftree-vectorize -mveclibabi=svml -ffast-math" } */
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/* { dg-options "-O2 -msse2 -ftree-vectorize -mveclibabi=svml -ffast-math -mtune=generic" } */
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double x[256];
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/* { dg-do compile } */
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/* { dg-options "-O2 -ftree-vectorize -msse2" } */
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/* { dg-options "-O2 -ftree-vectorize -msse2 -mtune=generic" } */
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unsigned int a[256];
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double b[256];
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@ -2309,8 +2309,17 @@ proc check_effective_target_vect_double { } {
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} else {
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set et_vect_double_saved 0
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if { [istarget i?86-*-*]
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|| [istarget x86_64-*-*]
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|| [istarget spu-*-*] } {
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|| [istarget x86_64-*-*] } {
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if { [check_no_compiler_messages vect_double assembly {
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#ifdef __tune_atom__
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# error No double vectorizer support.
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#endif
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}] } {
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set et_vect_double_saved 1
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} else {
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set et_vect_double_saved 0
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}
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} elseif { [istarget spu-*-*] } {
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set et_vect_double_saved 1
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}
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}
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