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arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb. 

* arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
(MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know
that we have a SImode access, and only then if reload hasn't completed;
for all other cases, use LO_REGS.

From-SVN: r57645
This commit is contained in:
Richard Earnshaw 2002-09-30 11:54:00 +00:00 committed by Richard Earnshaw
parent dda66c57c2
commit e79babc306
2 changed files with 15 additions and 6 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2002-09-30 Richard Earnshaw <rearnsha@arm.com>
* arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
(MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know
that we have a SImode access, and only then if reload hasn't completed;
for all other cases, use LO_REGS.
2002-09-29 David S. Miller <davem@redhat.com>
* config/sparc/linux64.h (STARTFILE_SPEC32, ENDFILE_SPEC32): Kill

14
gcc/config/arm/arm.h
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@ -1093,14 +1093,16 @@ enum reg_class
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
#define BASE_REG_CLASS (TARGET_THUMB ? BASE_REGS : GENERAL_REGS)
#define BASE_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
/* For the Thumb the high registers cannot be used as base
registers when addressing quanitities in QI or HI mode. */
/* For the Thumb the high registers cannot be used as base registers
when addressing quanitities in QI or HI mode; if we don't know the
mode, then we must be conservative. After reload we must also be
conservative, since we can't support SP+reg addressing, and we
can't fix up any bad substitutions. */
#define MODE_BASE_REG_CLASS(MODE) \
(TARGET_ARM ? BASE_REGS : \
(((MODE) == QImode || (MODE) == HImode || (MODE) == VOIDmode) \
? LO_REGS : BASE_REGS))
(TARGET_ARM ? GENERAL_REGS : \
(((MODE) == SImode && !reload_completed) ? BASE_REGS : LO_REGS))
/* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
registers explicitly used in the rtl to be used as spill registers