unconditionally compile most of the delay slot code
gcc/ChangeLog: 2015-10-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * cfgrtl.c (pass_free_cfg::execute): Adjust. * final.c (dbr_sequence_length): Always define. (shorten_branches): Adjust. * genattr-common.c (main): Always define DELAY_SLOTS. * genattr.c (main): Unconditionally declare functions and define macros related to delay slots. * genattrtab.c (write_eligible_delay): Adjust. (main): Always write out delay slot functions. * opts.c (default_options_table): Adjust. * reorg.c (redirect_with_delay_slots_safe_p): Likewise. (redirect_with_delay_list_safe_p): Likewise. (fill_simple_delay_slots): Likewise. (fill_slots_from_thread): Likewise. (make_return_insns): Likewise. (dbr_schedule): Likewise. (rest_of_handle_delay_slots): Likewise. (pass_delay_slots::gate): Likewise. * toplev.c (process_options): Likewise. From-SVN: r229145
This commit is contained in:
parent
0a798c16c1
commit
e90bedf52c
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@ -1,3 +1,24 @@
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2015-10-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
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* cfgrtl.c (pass_free_cfg::execute): Adjust.
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* final.c (dbr_sequence_length): Always define.
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(shorten_branches): Adjust.
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* genattr-common.c (main): Always define DELAY_SLOTS.
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* genattr.c (main): Unconditionally declare functions and define
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macros related to delay slots.
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* genattrtab.c (write_eligible_delay): Adjust.
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(main): Always write out delay slot functions.
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* opts.c (default_options_table): Adjust.
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* reorg.c (redirect_with_delay_slots_safe_p): Likewise.
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(redirect_with_delay_list_safe_p): Likewise.
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(fill_simple_delay_slots): Likewise.
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(fill_slots_from_thread): Likewise.
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(make_return_insns): Likewise.
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(dbr_schedule): Likewise.
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(rest_of_handle_delay_slots): Likewise.
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(pass_delay_slots::gate): Likewise.
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* toplev.c (process_options): Likewise.
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2015-10-21 Richard Henderson <rth@redhat.com>
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* targhooks.c (default_addr_space_pointer_mode): Remove check
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@ -483,15 +483,13 @@ public:
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unsigned int
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pass_free_cfg::execute (function *)
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{
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#ifdef DELAY_SLOTS
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/* The resource.c machinery uses DF but the CFG isn't guaranteed to be
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valid at that point so it would be too late to call df_analyze. */
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if (optimize > 0 && flag_delayed_branch)
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if (DELAY_SLOTS && optimize > 0 && flag_delayed_branch)
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{
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df_note_add_problem ();
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df_analyze ();
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}
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#endif
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if (crtl->has_bb_partition)
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insert_section_boundary_note ();
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12
gcc/final.c
12
gcc/final.c
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@ -297,7 +297,6 @@ app_disable (void)
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delayed branch sequence (we don't count the insn needing the
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delay slot). Zero if not in a delayed branch sequence. */
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#ifdef DELAY_SLOTS
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int
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dbr_sequence_length (void)
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{
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@ -306,7 +305,6 @@ dbr_sequence_length (void)
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else
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return 0;
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}
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#endif
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/* The next two pages contain routines used to compute the length of an insn
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and to shorten branches. */
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@ -1156,11 +1154,11 @@ shorten_branches (rtx_insn *first)
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{
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int i;
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int const_delay_slots;
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#ifdef DELAY_SLOTS
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const_delay_slots = const_num_delay_slots (body_seq->insn (0));
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#else
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const_delay_slots = 0;
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#endif
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if (DELAY_SLOTS)
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const_delay_slots = const_num_delay_slots (body_seq->insn (0));
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else
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const_delay_slots = 0;
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int (*inner_length_fun) (rtx_insn *)
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= const_delay_slots ? length_fun : insn_default_length;
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/* Inside a delay slot sequence, we do not do any branch shortening
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@ -87,11 +87,7 @@ main (int argc, char **argv)
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break;
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case DEFINE_DELAY:
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if (!have_delay)
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{
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printf ("#define DELAY_SLOTS\n");
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have_delay = true;
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}
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have_delay = true;
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break;
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case DEFINE_INSN_RESERVATION:
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@ -105,6 +101,8 @@ main (int argc, char **argv)
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default:
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break;
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}
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printf ("#define DELAY_SLOTS %d\n", have_delay);
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puts ("\n#endif /* GCC_INSN_ATTR_COMMON_H */");
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if (ferror (stdout) || fflush (stdout) || fclose (stdout))
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@ -140,9 +140,8 @@ find_tune_attr (rtx exp)
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int
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main (int argc, char **argv)
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{
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int have_delay = 0;
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int have_annul_true = 0;
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int have_annul_false = 0;
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bool have_annul_true = false;
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bool have_annul_false = false;
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int num_insn_reservations = 0;
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int i;
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@ -172,29 +171,13 @@ main (int argc, char **argv)
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break;
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case DEFINE_DELAY:
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if (! have_delay)
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{
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printf ("extern int num_delay_slots (rtx_insn *);\n");
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printf ("extern int eligible_for_delay (rtx_insn *, int, rtx_insn *, int);\n\n");
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printf ("extern int const_num_delay_slots (rtx_insn *);\n\n");
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have_delay = 1;
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}
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for (i = 0; i < XVECLEN (def, 1); i += 3)
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{
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if (XVECEXP (def, 1, i + 1) && ! have_annul_true)
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{
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printf ("#define ANNUL_IFTRUE_SLOTS\n");
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printf ("extern int eligible_for_annul_true (rtx_insn *, int, rtx_insn *, int);\n");
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have_annul_true = 1;
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}
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if (XVECEXP (def, 1, i + 1))
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have_annul_true = true;
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if (XVECEXP (def, 1, i + 2) && ! have_annul_false)
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{
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printf ("#define ANNUL_IFFALSE_SLOTS\n");
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printf ("extern int eligible_for_annul_false (rtx_insn *, int, rtx_insn *, int);\n");
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have_annul_false = 1;
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}
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if (XVECEXP (def, 1, i + 2))
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have_annul_false = true;
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}
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break;
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@ -208,6 +191,14 @@ main (int argc, char **argv)
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}
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}
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printf ("extern int num_delay_slots (rtx_insn *);\n");
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printf ("extern int eligible_for_delay (rtx_insn *, int, rtx_insn *, int);\n\n");
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printf ("extern int const_num_delay_slots (rtx_insn *);\n\n");
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printf ("#define ANNUL_IFTRUE_SLOTS %d\n", have_annul_true);
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printf ("extern int eligible_for_annul_true (rtx_insn *, int, rtx_insn *, int);\n");
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printf ("#define ANNUL_IFFALSE_SLOTS %d\n", have_annul_false);
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printf ("extern int eligible_for_annul_false (rtx_insn *, int, rtx_insn *, int);\n");
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if (num_insn_reservations > 0)
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{
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bool has_tune_attr
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@ -4449,7 +4449,7 @@ write_eligible_delay (FILE *outf, const char *kind)
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" rtx_insn *candidate_insn, int flags ATTRIBUTE_UNUSED)\n",
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kind);
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fprintf (outf, "{\n");
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fprintf (outf, " rtx_insn *insn;\n");
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fprintf (outf, " rtx_insn *insn ATTRIBUTE_UNUSED;\n");
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fprintf (outf, "\n");
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fprintf (outf, " gcc_assert (slot < %d);\n", max_slots);
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fprintf (outf, "\n");
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}
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/* Expand DEFINE_DELAY information into new attribute. */
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if (num_delays)
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expand_delays ();
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expand_delays ();
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/* Make `insn_alternatives'. */
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int num_insn_codes = get_num_insn_codes ();
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@ -5307,14 +5306,9 @@ main (int argc, char **argv)
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/* Write out delay eligibility information, if DEFINE_DELAY present.
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(The function to compute the number of delay slots will be written
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below.) */
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if (num_delays)
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{
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write_eligible_delay (attr_file, "delay");
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if (have_annul_true)
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write_eligible_delay (attr_file, "annul_true");
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if (have_annul_false)
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write_eligible_delay (attr_file, "annul_false");
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}
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write_eligible_delay (attr_file, "delay");
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write_eligible_delay (attr_file, "annul_true");
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write_eligible_delay (attr_file, "annul_false");
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/* Write out constant delay slot info. */
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write_const_num_delay_slots (attr_file);
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@ -429,7 +429,7 @@ static const struct default_options default_options_table[] =
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{
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/* -O1 optimizations. */
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{ OPT_LEVELS_1_PLUS, OPT_fdefer_pop, NULL, 1 },
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#ifdef DELAY_SLOTS
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#if DELAY_SLOTS
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{ OPT_LEVELS_1_PLUS, OPT_fdelayed_branch, NULL, 1 },
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#endif
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{ OPT_LEVELS_1_PLUS, OPT_fguess_branch_probability, NULL, 1 },
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82
gcc/reorg.c
82
gcc/reorg.c
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@ -131,15 +131,6 @@ along with GCC; see the file COPYING3. If not see
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#include "target.h"
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#include "tree-pass.h"
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#ifdef DELAY_SLOTS
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#ifndef ANNUL_IFTRUE_SLOTS
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#define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
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#endif
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#ifndef ANNUL_IFFALSE_SLOTS
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#define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
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#endif
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/* First, some functions that were used before GCC got a control flow graph.
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These functions are now only used here in reorg.c, and have therefore
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@ -219,9 +210,6 @@ static void add_to_delay_list (rtx_insn *, vec<rtx_insn *> *);
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static rtx_insn *delete_from_delay_slot (rtx_insn *);
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static void delete_scheduled_jump (rtx_insn *);
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static void note_delay_statistics (int, int);
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#if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
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static void optimize_skip (rtx_jump_insn *, vec<rtx_insn *> *);
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#endif
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static int get_jump_flags (const rtx_insn *, rtx);
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static int mostly_true_jump (rtx);
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static rtx get_branch_condition (const rtx_insn *, rtx);
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num_filled_delays[index][slots_filled][reorg_pass_number]++;
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}
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#if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
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/* Optimize the following cases:
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1. When a conditional branch skips over only one instruction,
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@ -818,7 +804,6 @@ optimize_skip (rtx_jump_insn *insn, vec<rtx_insn *> *delay_list)
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INSN_ANNULLED_BRANCH_P (insn) = 1;
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}
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}
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#endif
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/* Encode and return branch direction and prediction information for
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INSN assuming it will jump to LABEL.
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flags = get_jump_flags (jump, newlabel);
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for (i = 1; i < pat->len (); i++)
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if (! (
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#ifdef ANNUL_IFFALSE_SLOTS
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#if ANNUL_IFFALSE_SLOTS
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(INSN_ANNULLED_BRANCH_P (jump)
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&& INSN_FROM_TARGET_P (pat->insn (i)))
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? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
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#endif
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#ifdef ANNUL_IFTRUE_SLOTS
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#if ANNUL_IFTRUE_SLOTS
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(INSN_ANNULLED_BRANCH_P (jump)
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&& ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
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? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
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@ -1005,12 +990,12 @@ redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
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unsigned int i = 0;
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for (; i < delay_insns; i++)
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if (! (
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#ifdef ANNUL_IFFALSE_SLOTS
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#if ANNUL_IFFALSE_SLOTS
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(INSN_ANNULLED_BRANCH_P (jump)
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&& INSN_FROM_TARGET_P (delay_list[i]))
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? eligible_for_annul_false (jump, i, delay_list[i], flags) :
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#endif
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#ifdef ANNUL_IFTRUE_SLOTS
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#if ANNUL_IFTRUE_SLOTS
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(INSN_ANNULLED_BRANCH_P (jump)
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&& ! INSN_FROM_TARGET_P (delay_list[i]))
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? eligible_for_annul_true (jump, i, delay_list[i], flags) :
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@ -2096,8 +2081,8 @@ fill_simple_delay_slots (int non_jumps_p)
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/* If all needed slots haven't been filled, we come here. */
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/* Try to optimize case of jumping around a single insn. */
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#if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
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if (slots_filled != slots_to_fill
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if ((ANNUL_IFTRUE_SLOTS || ANNUL_IFFALSE_SLOTS)
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&& slots_filled != slots_to_fill
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&& delay_list.is_empty ()
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&& JUMP_P (insn)
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&& (condjump_p (insn) || condjump_in_parallel_p (insn))
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@ -2107,7 +2092,6 @@ fill_simple_delay_slots (int non_jumps_p)
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if (!delay_list.is_empty ())
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slots_filled += 1;
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}
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#endif
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/* Try to get insns from beyond the insn needing the delay slot.
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These insns can neither set or reference resources set in insns being
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@ -2494,13 +2478,8 @@ fill_slots_from_thread (rtx_jump_insn *insn, rtx condition,
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goto winner;
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}
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else if (0
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#ifdef ANNUL_IFTRUE_SLOTS
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|| ! thread_if_true
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#endif
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#ifdef ANNUL_IFFALSE_SLOTS
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|| thread_if_true
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#endif
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)
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|| (ANNUL_IFTRUE_SLOTS && ! thread_if_true)
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|| (ANNUL_IFFALSE_SLOTS && thread_if_true))
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{
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old_trial = trial;
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trial = try_split (pat, trial, 0);
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@ -3611,13 +3590,13 @@ make_return_insns (rtx_insn *first)
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{
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for (i = 1; i < XVECLEN (pat, 0); i++)
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if (! (
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#ifdef ANNUL_IFFALSE_SLOTS
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#if ANNUL_IFFALSE_SLOTS
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(INSN_ANNULLED_BRANCH_P (jump_insn)
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&& INSN_FROM_TARGET_P (pat->insn (i)))
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? eligible_for_annul_false (jump_insn, i - 1,
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pat->insn (i), flags) :
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#endif
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#ifdef ANNUL_IFTRUE_SLOTS
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#if ANNUL_IFTRUE_SLOTS
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(INSN_ANNULLED_BRANCH_P (jump_insn)
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&& ! INSN_FROM_TARGET_P (pat->insn (i)))
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? eligible_for_annul_true (jump_insn, i - 1,
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@ -3852,21 +3831,24 @@ dbr_schedule (rtx_insn *first)
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}
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}
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fprintf (dump_file, "\n");
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#if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
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fprintf (dump_file, ";; Reorg annuls: ");
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need_comma = 0;
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for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
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if (ANNUL_IFTRUE_SLOTS || ANNUL_IFFALSE_SLOTS)
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{
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if (total_annul_slots[j])
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fprintf (dump_file, ";; Reorg annuls: ");
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need_comma = 0;
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for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
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{
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if (need_comma)
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fprintf (dump_file, ", ");
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need_comma = 1;
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fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
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if (total_annul_slots[j])
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{
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if (need_comma)
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fprintf (dump_file, ", ");
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need_comma = 1;
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fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
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}
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}
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fprintf (dump_file, "\n");
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}
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fprintf (dump_file, "\n");
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#endif
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fprintf (dump_file, "\n");
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}
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@ -3880,15 +3862,14 @@ dbr_schedule (rtx_insn *first)
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free (uid_to_ruid);
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crtl->dbr_scheduled_p = true;
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}
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#endif /* DELAY_SLOTS */
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/* Run delay slot optimization. */
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static unsigned int
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rest_of_handle_delay_slots (void)
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{
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#ifdef DELAY_SLOTS
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dbr_schedule (get_insns ());
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#endif
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if (DELAY_SLOTS)
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dbr_schedule (get_insns ());
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return 0;
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}
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|
@ -3926,12 +3907,11 @@ public:
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bool
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pass_delay_slots::gate (function *)
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{
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#ifdef DELAY_SLOTS
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/* At -O0 dataflow info isn't updated after RA. */
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return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
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#else
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return 0;
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#endif
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if (DELAY_SLOTS)
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||||
return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
} // anon namespace
|
||||
|
|
|
@ -1317,10 +1317,8 @@ process_options (void)
|
|||
if (flag_schedule_insns || flag_schedule_insns_after_reload)
|
||||
warning (0, "instruction scheduling not supported on this target machine");
|
||||
#endif
|
||||
#ifndef DELAY_SLOTS
|
||||
if (flag_delayed_branch)
|
||||
if (!DELAY_SLOTS && flag_delayed_branch)
|
||||
warning (0, "this target machine does not have delayed branches");
|
||||
#endif
|
||||
|
||||
user_label_prefix = USER_LABEL_PREFIX;
|
||||
if (flag_leading_underscore != -1)
|
||||
|
|
Loading…
Reference in New Issue