rs6000-protos.h (expand_strn_compare): Declare.
* config/rs6000/rs6000-protos.h (expand_strn_compare): Declare. * config/rs6000/rs6000.md (UNSPEC_CMPB): New unspec. (cmpb<mode>3): pattern for generating cmpb. (cmpstrnsi): pattern to expand strncmp (). * config/rs6000/rs6000.opt (mstring-compare-inline-limit): Add a new target option for controlling how much code inline expansion of strncmp() will be allowed to generate. * config/rs6000/rs6000.c (expand_strncmp_align_check): generate code for runtime page crossing check of strncmp () args. (expand_strn_compare): Function to do builtin expansion of strncmp (). From-SVN: r243813
This commit is contained in:
Aaron Sawdey
Aaron Sawdey
parent
f407722285
commit
e9c2033eff
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@ -1,3 +1,16 @@
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2016-12-19 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
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* config/rs6000/rs6000-protos.h (expand_strn_compare): Declare.
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* config/rs6000/rs6000.md (UNSPEC_CMPB): New unspec.
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(cmpb<mode>3): pattern for generating cmpb.
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(cmpstrnsi): pattern to expand strncmp ().
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* config/rs6000/rs6000.opt (mstring-compare-inline-limit): Add a new
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target option for controlling how much code inline expansion of
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strncmp() will be allowed to generate.
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* config/rs6000/rs6000.c (expand_strncmp_align_check): generate code
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for runtime page crossing check of strncmp () args.
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(expand_strn_compare): Function to do builtin expansion of strncmp ().
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2016-12-19 David Malcolm <dmalcolm@redhat.com>
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* print-rtl-function.c (print_rtx_function): Update
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@ -78,6 +78,7 @@ extern void rs6000_scale_v2df (rtx, rtx, int);
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extern int expand_block_clear (rtx[]);
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extern int expand_block_move (rtx[]);
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extern bool expand_block_compare (rtx[]);
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extern bool expand_strn_compare (rtx[]);
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extern const char * rs6000_output_load_multiple (rtx[]);
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extern bool rs6000_is_valid_mask (rtx, int *, int *, machine_mode);
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extern bool rs6000_is_valid_and_mask (rtx, machine_mode);
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@ -18993,7 +18993,6 @@ rs6000_emit_dot_insn (rtx dst, rtx src, int dot, rtx ccreg)
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}
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}
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/* Figure out the correct instructions to generate to load data for
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block compare. MODE is used for the read from memory, and
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data is zero extended if REG is wider than MODE. If LE code
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@ -19430,7 +19429,387 @@ expand_block_compare (rtx operands[])
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return true;
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}
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/* Generate alignment check and branch code to set up for
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strncmp when we don't have DI alignment.
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STRNCMP_LABEL is the label to branch if there is a page crossing.
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SRC is the string pointer to be examined.
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BYTES is the max number of bytes to compare. */
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static void
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expand_strncmp_align_check (rtx strncmp_label, rtx src, HOST_WIDE_INT bytes)
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{
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rtx lab_ref = gen_rtx_LABEL_REF (VOIDmode, strncmp_label);
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rtx src_check = copy_addr_to_reg (XEXP (src, 0));
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if (GET_MODE (src_check) == SImode)
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emit_insn (gen_andsi3 (src_check, src_check, GEN_INT (0xfff)));
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else
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emit_insn (gen_anddi3 (src_check, src_check, GEN_INT (0xfff)));
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rtx cond = gen_reg_rtx (CCmode);
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emit_move_insn (cond, gen_rtx_COMPARE (CCmode, src_check,
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GEN_INT (4096 - bytes)));
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rtx cmp_rtx = gen_rtx_LT (VOIDmode, cond, const0_rtx);
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rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmp_rtx,
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pc_rtx, lab_ref);
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rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse));
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JUMP_LABEL (j) = strncmp_label;
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LABEL_NUSES (strncmp_label) += 1;
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}
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/* Expand a string compare operation with length, and return
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true if successful. Return false if we should let the
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compiler generate normal code, probably a strncmp call.
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OPERANDS[0] is the target (result).
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OPERANDS[1] is the first source.
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OPERANDS[2] is the second source.
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OPERANDS[3] is the length.
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OPERANDS[4] is the alignment in bytes. */
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bool
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expand_strn_compare (rtx operands[])
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{
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rtx target = operands[0];
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rtx orig_src1 = operands[1];
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rtx orig_src2 = operands[2];
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rtx bytes_rtx = operands[3];
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rtx align_rtx = operands[4];
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HOST_WIDE_INT cmp_bytes = 0;
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rtx src1 = orig_src1;
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rtx src2 = orig_src2;
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/* If this is not a fixed size compare, just call strncmp. */
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if (!CONST_INT_P (bytes_rtx))
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return false;
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/* This must be a fixed size alignment. */
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if (!CONST_INT_P (align_rtx))
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return false;
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int base_align = INTVAL (align_rtx);
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int align1 = MEM_ALIGN (orig_src1) / BITS_PER_UNIT;
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int align2 = MEM_ALIGN (orig_src2) / BITS_PER_UNIT;
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/* SLOW_UNALIGNED_ACCESS -- don't do unaligned stuff. */
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if (SLOW_UNALIGNED_ACCESS (word_mode, align1)
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|| SLOW_UNALIGNED_ACCESS (word_mode, align2))
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return false;
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gcc_assert (GET_MODE (target) == SImode);
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HOST_WIDE_INT bytes = INTVAL (bytes_rtx);
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/* If we have an LE target without ldbrx and word_mode is DImode,
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then we must avoid using word_mode. */
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int word_mode_ok = !(!BYTES_BIG_ENDIAN && !TARGET_LDBRX
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&& word_mode == DImode);
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int word_mode_size = GET_MODE_SIZE (word_mode);
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int offset = 0;
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machine_mode load_mode =
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select_block_compare_mode (offset, bytes, base_align, word_mode_ok);
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int load_mode_size = GET_MODE_SIZE (load_mode);
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/* We don't want to generate too much code. Also if bytes is
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4096 or larger we always want the library strncmp anyway. */
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int groups = ROUND_UP (bytes, load_mode_size) / load_mode_size;
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if (bytes >= 4096 || groups > rs6000_string_compare_inline_limit)
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return false;
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rtx result_reg = gen_reg_rtx (word_mode);
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rtx final_move_label = gen_label_rtx ();
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rtx final_label = gen_label_rtx ();
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rtx begin_compare_label = NULL;
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if (base_align < 8)
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{
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/* Generate code that checks distance to 4k boundary for this case. */
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begin_compare_label = gen_label_rtx ();
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rtx strncmp_label = gen_label_rtx ();
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rtx jmp;
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/* Strncmp for power8 in glibc does this:
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rldicl r8,r3,0,52
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cmpldi cr7,r8,4096-16
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bgt cr7,L(pagecross) */
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if (align1 < 8)
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expand_strncmp_align_check (strncmp_label, src1, bytes);
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if (align2 < 8)
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expand_strncmp_align_check (strncmp_label, src2, bytes);
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/* Now generate the following sequence:
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- branch to begin_compare
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- strncmp_label
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- call to strncmp
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- branch to final_label
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- begin_compare_label */
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rtx cmp_ref = gen_rtx_LABEL_REF (VOIDmode, begin_compare_label);
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jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, cmp_ref));
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JUMP_LABEL(jmp) = begin_compare_label;
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LABEL_NUSES (begin_compare_label) += 1;
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emit_barrier ();
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emit_label (strncmp_label);
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if (!REG_P (XEXP (src1, 0)))
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{
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rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0));
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src1 = replace_equiv_address (src1, src1_reg);
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}
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if (!REG_P (XEXP (src2, 0)))
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{
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rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0));
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src2 = replace_equiv_address (src2, src2_reg);
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}
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/* -m32 -mpowerpc64 results in word_mode being DImode even
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though otherwise it is 32-bit. The length arg to strncmp
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is a size_t which will be the same size as pointers. */
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rtx len_rtx;
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if (TARGET_64BIT)
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len_rtx = gen_reg_rtx(DImode);
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else
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len_rtx = gen_reg_rtx(SImode);
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emit_move_insn (len_rtx, bytes_rtx);
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emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, "strncmp"),
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target, LCT_NORMAL, GET_MODE (target), 3,
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force_reg (Pmode, XEXP (src1, 0)), Pmode,
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force_reg (Pmode, XEXP (src2, 0)), Pmode,
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len_rtx, GET_MODE (len_rtx));
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rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label);
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jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, fin_ref));
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JUMP_LABEL (jmp) = final_label;
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LABEL_NUSES (final_label) += 1;
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emit_barrier ();
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emit_label (begin_compare_label);
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}
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rtx cleanup_label = NULL;
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rtx tmp_reg_src1 = gen_reg_rtx (word_mode);
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rtx tmp_reg_src2 = gen_reg_rtx (word_mode);
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/* Generate sequence of ld/ldbrx, cmpb to compare out
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to the length specified. */
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while (bytes > 0)
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{
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/* Compare sequence:
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check each 8B with: ld/ld cmpd bne
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cleanup code at end:
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cmpb get byte that differs
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cmpb look for zero byte
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orc combine
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cntlzd get bit of first zero/diff byte
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subfic convert for rldcl use
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rldcl rldcl extract diff/zero byte
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subf subtract for final result
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The last compare can branch around the cleanup code if the
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result is zero because the strings are exactly equal. */
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int align = compute_current_alignment (base_align, offset);
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if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED)
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load_mode = select_block_compare_mode (offset, bytes, align,
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word_mode_ok);
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else
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load_mode = select_block_compare_mode (0, bytes, align, word_mode_ok);
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load_mode_size = GET_MODE_SIZE (load_mode);
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if (bytes >= load_mode_size)
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cmp_bytes = load_mode_size;
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else if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED)
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{
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/* Move this load back so it doesn't go past the end.
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P8/P9 can do this efficiently. */
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int extra_bytes = load_mode_size - bytes;
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cmp_bytes = bytes;
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if (extra_bytes < offset)
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{
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offset -= extra_bytes;
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cmp_bytes = load_mode_size;
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bytes = cmp_bytes;
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}
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}
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else
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/* P7 and earlier can't do the overlapping load trick fast,
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so this forces a non-overlapping load and a shift to get
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rid of the extra bytes. */
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cmp_bytes = bytes;
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src1 = adjust_address (orig_src1, load_mode, offset);
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src2 = adjust_address (orig_src2, load_mode, offset);
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if (!REG_P (XEXP (src1, 0)))
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{
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rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0));
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src1 = replace_equiv_address (src1, src1_reg);
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}
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set_mem_size (src1, cmp_bytes);
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if (!REG_P (XEXP (src2, 0)))
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{
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rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0));
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src2 = replace_equiv_address (src2, src2_reg);
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}
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set_mem_size (src2, cmp_bytes);
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do_load_for_compare (tmp_reg_src1, src1, load_mode);
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do_load_for_compare (tmp_reg_src2, src2, load_mode);
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/* We must always left-align the data we read, and
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clear any bytes to the right that are beyond the string.
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Otherwise the cmpb sequence won't produce the correct
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results. The beginning of the compare will be done
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with word_mode so will not have any extra shifts or
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clear rights. */
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if (load_mode_size < word_mode_size)
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{
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/* Rotate left first. */
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rtx sh = GEN_INT (BITS_PER_UNIT * (word_mode_size - load_mode_size));
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if (word_mode == DImode)
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{
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emit_insn (gen_rotldi3 (tmp_reg_src1, tmp_reg_src1, sh));
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emit_insn (gen_rotldi3 (tmp_reg_src2, tmp_reg_src2, sh));
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}
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else
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{
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emit_insn (gen_rotlsi3 (tmp_reg_src1, tmp_reg_src1, sh));
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emit_insn (gen_rotlsi3 (tmp_reg_src2, tmp_reg_src2, sh));
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}
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}
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if (cmp_bytes < word_mode_size)
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{
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/* Now clear right. This plus the rotate can be
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turned into a rldicr instruction. */
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HOST_WIDE_INT mb = BITS_PER_UNIT * (word_mode_size - cmp_bytes);
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rtx mask = GEN_INT (HOST_WIDE_INT_M1U << mb);
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if (word_mode == DImode)
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{
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emit_insn (gen_anddi3_mask (tmp_reg_src1, tmp_reg_src1, mask));
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emit_insn (gen_anddi3_mask (tmp_reg_src2, tmp_reg_src2, mask));
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}
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else
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{
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emit_insn (gen_andsi3_mask (tmp_reg_src1, tmp_reg_src1, mask));
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emit_insn (gen_andsi3_mask (tmp_reg_src2, tmp_reg_src2, mask));
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}
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}
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int remain = bytes - cmp_bytes;
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rtx dst_label;
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if (remain > 0)
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{
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if (!cleanup_label)
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cleanup_label = gen_label_rtx ();
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dst_label = cleanup_label;
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}
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else
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dst_label = final_move_label;
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rtx lab_ref = gen_rtx_LABEL_REF (VOIDmode, dst_label);
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rtx cond = gen_reg_rtx (CCmode);
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if (remain == 0)
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{
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/* For the last chunk, subf. also
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generates the zero result we need. */
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rtx tmp = gen_rtx_MINUS (word_mode, tmp_reg_src1, tmp_reg_src2);
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rs6000_emit_dot_insn (result_reg, tmp, 1, cond);
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}
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else
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emit_move_insn (cond, gen_rtx_COMPARE (CCmode,
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tmp_reg_src1, tmp_reg_src2));
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rtx cmp_rtx;
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if (remain > 0)
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cmp_rtx = gen_rtx_NE (VOIDmode, cond, const0_rtx);
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else
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cmp_rtx = gen_rtx_EQ (VOIDmode, cond, const0_rtx);
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rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmp_rtx,
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lab_ref, pc_rtx);
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rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse));
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JUMP_LABEL (j) = dst_label;
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LABEL_NUSES (dst_label) += 1;
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offset += cmp_bytes;
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bytes -= cmp_bytes;
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}
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if (cleanup_label)
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emit_label (cleanup_label);
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/* Generate the final sequence that identifies the differing
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byte and generates the final result, taking into account
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zero bytes:
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cmpb cmpb_result1, src1, src2
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cmpb cmpb_result2, src1, zero
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orc cmpb_result1, cmp_result1, cmpb_result2
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cntlzd get bit of first zero/diff byte
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addi convert for rldcl use
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rldcl rldcl extract diff/zero byte
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subf subtract for final result
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*/
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rtx cmpb_diff = gen_reg_rtx (word_mode);
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rtx cmpb_zero = gen_reg_rtx (word_mode);
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rtx rot_amt = gen_reg_rtx (word_mode);
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rtx zero_reg = gen_reg_rtx (word_mode);
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rtx rot1_1 = gen_reg_rtx(word_mode);
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rtx rot1_2 = gen_reg_rtx(word_mode);
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rtx rot2_1 = gen_reg_rtx(word_mode);
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rtx rot2_2 = gen_reg_rtx(word_mode);
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if (word_mode == SImode)
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{
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emit_insn (gen_cmpbsi3 (cmpb_diff, tmp_reg_src1, tmp_reg_src2));
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emit_insn (gen_movsi (zero_reg, GEN_INT(0)));
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emit_insn (gen_cmpbsi3 (cmpb_zero, tmp_reg_src1, zero_reg));
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emit_insn (gen_one_cmplsi2 (cmpb_diff,cmpb_diff));
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emit_insn (gen_iorsi3 (cmpb_diff, cmpb_diff, cmpb_zero));
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emit_insn (gen_clzsi2 (rot_amt, cmpb_diff));
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emit_insn (gen_addsi3 (rot_amt, rot_amt, GEN_INT (8)));
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emit_insn (gen_rotlsi3 (rot1_1, tmp_reg_src1,
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gen_lowpart (SImode, rot_amt)));
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emit_insn (gen_andsi3_mask (rot1_2, rot1_1, GEN_INT(0xff)));
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emit_insn (gen_rotlsi3 (rot2_1, tmp_reg_src2,
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gen_lowpart (SImode, rot_amt)));
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emit_insn (gen_andsi3_mask (rot2_2, rot2_1, GEN_INT(0xff)));
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emit_insn (gen_subsi3 (result_reg, rot1_2, rot2_2));
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}
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else
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{
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emit_insn (gen_cmpbdi3 (cmpb_diff, tmp_reg_src1, tmp_reg_src2));
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emit_insn (gen_movdi (zero_reg, GEN_INT(0)));
|
||||
emit_insn (gen_cmpbdi3 (cmpb_zero, tmp_reg_src1, zero_reg));
|
||||
emit_insn (gen_one_cmpldi2 (cmpb_diff,cmpb_diff));
|
||||
emit_insn (gen_iordi3 (cmpb_diff, cmpb_diff, cmpb_zero));
|
||||
emit_insn (gen_clzdi2 (rot_amt, cmpb_diff));
|
||||
emit_insn (gen_adddi3 (rot_amt, rot_amt, GEN_INT (8)));
|
||||
emit_insn (gen_rotldi3 (rot1_1, tmp_reg_src1,
|
||||
gen_lowpart (SImode, rot_amt)));
|
||||
emit_insn (gen_anddi3_mask (rot1_2, rot1_1, GEN_INT(0xff)));
|
||||
emit_insn (gen_rotldi3 (rot2_1, tmp_reg_src2,
|
||||
gen_lowpart (SImode, rot_amt)));
|
||||
emit_insn (gen_anddi3_mask (rot2_2, rot2_1, GEN_INT(0xff)));
|
||||
emit_insn (gen_subdi3 (result_reg, rot1_2, rot2_2));
|
||||
}
|
||||
|
||||
emit_label (final_move_label);
|
||||
emit_insn (gen_movsi (target,
|
||||
gen_lowpart (SImode, result_reg)));
|
||||
emit_label (final_label);
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Expand a block move operation, and return 1 if successful. Return 0
|
||||
if we should let the compiler generate normal code.
|
||||
|
||||
|
|
@ -32852,7 +33231,7 @@ power9_sched_reorder2 (rtx_insn **ready, int lastpos)
|
|||
|
||||
3 : 2 vector insns and a vector load have been issued and another
|
||||
vector load has been found and moved to the end of the ready
|
||||
list. */
|
||||
list. */
|
||||
if (type == TYPE_VECLOAD)
|
||||
{
|
||||
/* Issued a vecload. */
|
||||
|
|
|
|||
|
|
@ -117,6 +117,7 @@
|
|||
UNSPEC_BPERM
|
||||
UNSPEC_COPYSIGN
|
||||
UNSPEC_PARITY
|
||||
UNSPEC_CMPB
|
||||
UNSPEC_FCTIW
|
||||
UNSPEC_FCTID
|
||||
UNSPEC_LFIWAX
|
||||
|
|
@ -2316,6 +2317,13 @@
|
|||
"prty<wd> %0,%1"
|
||||
[(set_attr "type" "popcnt")])
|
||||
|
||||
(define_insn "cmpb<mode>3"
|
||||
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
|
||||
(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")
|
||||
(match_operand:GPR 2 "gpc_reg_operand" "r")] UNSPEC_CMPB))]
|
||||
"TARGET_CMPB"
|
||||
"cmpb %0,%1,%2"
|
||||
[(set_attr "type" "cmp")])
|
||||
|
||||
;; Since the hardware zeros the upper part of the register, save generating the
|
||||
;; AND immediate if we are converting to unsigned
|
||||
|
|
@ -8844,7 +8852,28 @@
|
|||
FAIL;
|
||||
}")
|
||||
|
||||
;; String/block compare insn.
|
||||
;; String compare N insn.
|
||||
;; Argument 0 is the target (result)
|
||||
;; Argument 1 is the destination
|
||||
;; Argument 2 is the source
|
||||
;; Argument 3 is the length
|
||||
;; Argument 4 is the alignment
|
||||
|
||||
(define_expand "cmpstrnsi"
|
||||
[(parallel [(set (match_operand:SI 0)
|
||||
(compare:SI (match_operand:BLK 1)
|
||||
(match_operand:BLK 2)))
|
||||
(use (match_operand:SI 3))
|
||||
(use (match_operand:SI 4))])]
|
||||
"TARGET_CMPB && (BYTES_BIG_ENDIAN || TARGET_LDBRX)"
|
||||
{
|
||||
if (expand_strn_compare (operands))
|
||||
DONE;
|
||||
else
|
||||
FAIL;
|
||||
})
|
||||
|
||||
;; Block compare insn.
|
||||
;; Argument 0 is the target (result)
|
||||
;; Argument 1 is the destination
|
||||
;; Argument 2 is the source
|
||||
|
|
|
|||
|
|
@ -337,6 +337,10 @@ mblock-compare-inline-limit=
|
|||
Target Report Var(rs6000_block_compare_inline_limit) Init(5) RejectNegative Joined UInteger Save
|
||||
Specify the maximum number pairs of load instructions that should be generated inline for the compare. If the number needed exceeds the limit, a call to memcmp will be generated instead.
|
||||
|
||||
mstring-compare-inline-limit=
|
||||
Target Report Var(rs6000_string_compare_inline_limit) Init(8) RejectNegative Joined UInteger Save
|
||||
Specify the maximum number pairs of load instructions that should be generated inline for the compare. If the number needed exceeds the limit, a call to strncmp will be generated instead.
|
||||
|
||||
misel
|
||||
Target Report Mask(ISEL) Var(rs6000_isa_flags)
|
||||
Generate isel instructions.
|
||||
|
|
|
|||
Loading…
Reference in New Issue