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S/390: Rename arch12 to z14

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This is a mechanical change not impacting code generation.  With that
patch I try to hide the artificial CPU name arch12 which we had to use
before the announcement of the IBM z14 machine.  arch12 of course
stays a valid option to -march and -mtune.  So this is just about
making the code somewhat easier to read.

gcc/ChangeLog:

2018-10-02  Andreas Krebbel  <krebbel@linux.ibm.com>

	* common/config/s390/s390-common.c: Rename PF_ARCH12 to PF_Z14.
	* config/s390/s390.h (enum processor_flags): Rename PF_ARCH12 to
	PF_Z14.  Rename TARGET_CPU_ARCH12 to TARGET_CPU_Z14,
	TARGET_CPU_ARCH12_P to TARGET_CPU_Z14_P, TARGET_ARCH12 to
	TARGET_Z14, and TARGET_ARCH12_P to TARGET_Z14_P.
	* config/s390/s390.md: Likewise. Rename also the cpu attribute
	value from arch12 to z14.

From-SVN: r264796
This commit is contained in:
Andreas Krebbel 2018-10-02 15:35:52 +00:00 committed by Andreas Krebbel
parent 8dc5696fcd
commit e9e8efc982
4 changed files with 33 additions and 23 deletions
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10
gcc/ChangeLog
View File

@ -1,3 +1,13 @@
2018-10-02 Andreas Krebbel <krebbel@linux.ibm.com>
* common/config/s390/s390-common.c: Rename PF_ARCH12 to PF_Z14.
* config/s390/s390.h (enum processor_flags): Rename PF_ARCH12 to
PF_Z14. Rename TARGET_CPU_ARCH12 to TARGET_CPU_Z14,
TARGET_CPU_ARCH12_P to TARGET_CPU_Z14_P, TARGET_ARCH12 to
TARGET_Z14, and TARGET_ARCH12_P to TARGET_Z14_P.
* config/s390/s390.md: Likewise. Rename also the cpu attribute
value from arch12 to z14.
2018-10-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (fxam<mode>2_i387_with_temp): Remove.

4
gcc/common/config/s390/s390-common.c
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@ -44,9 +44,9 @@ EXPORTED_CONST int processor_flags_table[] =
/* z13 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
| PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
| PF_Z13 | PF_VX,
/* arch12 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
/* z14 */ PF_IEEE_FLOAT | PF_ZARCH | PF_LONG_DISPLACEMENT
| PF_EXTIMM | PF_DFP | PF_Z10 | PF_Z196 | PF_ZEC12 | PF_TX
| PF_Z13 | PF_VX | PF_VXE | PF_ARCH12
| PF_Z13 | PF_VX | PF_VXE | PF_Z14
};
/* Change optimizations to be performed, depending on the

16
gcc/config/s390/s390.h
View File

@ -38,7 +38,7 @@ enum processor_flags
PF_TX = 256,
PF_Z13 = 512,
PF_VX = 1024,
PF_ARCH12 = 2048,
PF_Z14 = 2048,
PF_VXE = 4096
};
@ -90,10 +90,10 @@ enum processor_flags
(s390_arch_flags & PF_VX)
#define TARGET_CPU_VX_P(opts) \
(opts->x_s390_arch_flags & PF_VX)
#define TARGET_CPU_ARCH12 \
(s390_arch_flags & PF_ARCH12)
#define TARGET_CPU_ARCH12_P(opts) \
(opts->x_s390_arch_flags & PF_ARCH12)
#define TARGET_CPU_Z14 \
(s390_arch_flags & PF_Z14)
#define TARGET_CPU_Z14_P(opts) \
(opts->x_s390_arch_flags & PF_Z14)
#define TARGET_CPU_VXE \
(s390_arch_flags & PF_VXE)
#define TARGET_CPU_VXE_P(opts) \
@ -143,9 +143,9 @@ enum processor_flags
(TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_VX_P (opts) \
&& TARGET_OPT_VX_P (opts->x_target_flags) \
&& TARGET_HARD_FLOAT_P (opts->x_target_flags))
#define TARGET_ARCH12 (TARGET_ZARCH && TARGET_CPU_ARCH12)
#define TARGET_ARCH12_P(opts) \
(TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_ARCH12_P (opts))
#define TARGET_Z14 (TARGET_ZARCH && TARGET_CPU_Z14)
#define TARGET_Z14_P(opts) \
(TARGET_ZARCH_P (opts->x_target_flags) && TARGET_CPU_Z14_P (opts))
#define TARGET_VXE \
(TARGET_VX && TARGET_CPU_VXE)
#define TARGET_VXE_P(opts) \

26
gcc/config/s390/s390.md
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@ -506,11 +506,11 @@
;; Processor type. This attribute must exactly match the processor_type
;; enumeration in s390.h.
(define_attr "cpu" "z900,z990,z9_109,z9_ec,z10,z196,zEC12,z13,arch12"
(define_attr "cpu" "z900,z990,z9_109,z9_ec,z10,z196,zEC12,z13,z14"
(const (symbol_ref "s390_tune_attr")))
(define_attr "cpu_facility"
"standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,arch12,vxe"
"standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vx,z13,z14,vxe"
(const_string "standard"))
(define_attr "enabled" ""
@ -560,8 +560,8 @@
(match_test "TARGET_Z13"))
(const_int 1)
(and (eq_attr "cpu_facility" "arch12")
(match_test "TARGET_ARCH12"))
(and (eq_attr "cpu_facility" "z14")
(match_test "TARGET_Z14"))
(const_int 1)
(and (eq_attr "cpu_facility" "vxe")
@ -5866,7 +5866,7 @@
(plus:DI (sign_extend:DI (match_operand:HI 2 "memory_operand" "T"))
(match_operand:DI 1 "register_operand" "0")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARCH12"
"TARGET_Z14"
"agh\t%0,%2"
[(set_attr "op_type" "RXY")])
@ -6275,7 +6275,7 @@
(minus:DI (match_operand:DI 1 "register_operand" "0")
(sign_extend:DI (match_operand:HI 2 "memory_operand" "T"))))
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARCH12"
"TARGET_Z14"
"sgh\t%0,%2"
[(set_attr "op_type" "RXY")])
@ -6656,7 +6656,7 @@
msgfi\t%0,%2"
[(set_attr "op_type" "RRE,RRF,RI,RXY,RIL")
(set_attr "type" "imuldi")
(set_attr "cpu_facility" "*,arch12,*,*,z10")])
(set_attr "cpu_facility" "*,z14,*,*,z10")])
(define_insn "mulditi3"
[(set (match_operand:TI 0 "register_operand" "=d,d")
@ -6664,7 +6664,7 @@
(match_operand:DI 1 "register_operand" "%d,0"))
(sign_extend:TI
(match_operand:DI 2 "nonimmediate_operand" " d,T"))))]
"TARGET_ARCH12"
"TARGET_Z14"
"@
mgrk\t%0,%1,%2
mg\t%0,%2"
@ -6677,7 +6677,7 @@
(match_operand:DI 1 "nonimmediate_operand" "%d,T"))
(sign_extend:TI
(match_operand:DI 2 "register_operand" " d,0"))))]
"TARGET_ARCH12"
"TARGET_Z14"
"@
mgrk\t%0,%1,%2
mg\t%0,%1"
@ -6687,7 +6687,7 @@
[(set (match_operand:DI 0 "register_operand" "=d")
(mult:DI (sign_extend:DI (match_operand:HI 2 "memory_operand" "T"))
(match_operand:DI 1 "register_operand" "0")))]
"TARGET_ARCH12"
"TARGET_Z14"
"mgh\t%0,%2"
[(set_attr "op_type" "RXY")])
@ -6731,7 +6731,7 @@
msfi\t%0,%2"
[(set_attr "op_type" "RRE,RRF,RI,RX,RXY,RIL")
(set_attr "type" "imulsi,*,imulhi,imulsi,imulsi,imulsi")
(set_attr "cpu_facility" "*,arch12,*,*,longdisp,z10")])
(set_attr "cpu_facility" "*,z14,*,*,longdisp,z10")])
;
; mulsidi3 instruction pattern(s).
@ -9352,7 +9352,7 @@
{
if (address_operand (operands[0], GET_MODE (operands[0])))
;
else if (TARGET_ARCH12
else if (TARGET_Z14
&& GET_MODE (operands[0]) == Pmode
&& memory_operand (operands[0], Pmode))
;
@ -9510,7 +9510,7 @@
[(set_attr "op_type" "RR,RXY")
(set_attr "type" "branch")
(set_attr "atype" "agen")
(set_attr "cpu_facility" "*,arch12")])
(set_attr "cpu_facility" "*,z14")])
;
; casesi instruction pattern(s).