Daily bump.
This commit is contained in:
GCC Administrator
parent
e314cfc371
commit
ead235f601
288
gcc/ChangeLog
288
gcc/ChangeLog
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@ -1,3 +1,291 @@
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2021-07-23 Jakub Jelinek <jakub@redhat.com>
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PR rtl-optimization/101562
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* expmed.c (store_integral_bit_field): Only use movstrict_optab
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if the operand isn't paradoxical.
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2021-07-23 Aldy Hernandez <aldyh@redhat.com>
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* gimple-array-bounds.h (class array_bounds_checker): Change
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ranges type to range_query.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vst1_s64_x2): Use
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__builtin_memcpy instead of constructing
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__builtin_aarch64_simd_oi one vector at a time.
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(vst1_u64_x2): Likewise.
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(vst1_f64_x2): Likewise.
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(vst1_s8_x2): Likewise.
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(vst1_p8_x2): Likewise.
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(vst1_s16_x2): Likewise.
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(vst1_p16_x2): Likewise.
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(vst1_s32_x2): Likewise.
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(vst1_u8_x2): Likewise.
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(vst1_u16_x2): Likewise.
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(vst1_u32_x2): Likewise.
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(vst1_f16_x2): Likewise.
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(vst1_f32_x2): Likewise.
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(vst1_p64_x2): Likewise.
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(vst1q_s8_x2): Likewise.
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(vst1q_p8_x2): Likewise.
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(vst1q_s16_x2): Likewise.
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(vst1q_p16_x2): Likewise.
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(vst1q_s32_x2): Likewise.
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(vst1q_s64_x2): Likewise.
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(vst1q_u8_x2): Likewise.
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(vst1q_u16_x2): Likewise.
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(vst1q_u32_x2): Likewise.
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(vst1q_u64_x2): Likewise.
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(vst1q_f16_x2): Likewise.
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(vst1q_f32_x2): Likewise.
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(vst1q_f64_x2): Likewise.
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(vst1q_p64_x2): Likewise.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vst1_s64_x3): Use
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__builtin_memcpy instead of constructing
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__builtin_aarch64_simd_ci one vector at a time.
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(vst1_u64_x3): Likewise.
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(vst1_f64_x3): Likewise.
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(vst1_s8_x3): Likewise.
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(vst1_p8_x3): Likewise.
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(vst1_s16_x3): Likewise.
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(vst1_p16_x3): Likewise.
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(vst1_s32_x3): Likewise.
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(vst1_u8_x3): Likewise.
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(vst1_u16_x3): Likewise.
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(vst1_u32_x3): Likewise.
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(vst1_f16_x3): Likewise.
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(vst1_f32_x3): Likewise.
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(vst1_p64_x3): Likewise.
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(vst1q_s8_x3): Likewise.
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(vst1q_p8_x3): Likewise.
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(vst1q_s16_x3): Likewise.
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(vst1q_p16_x3): Likewise.
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(vst1q_s32_x3): Likewise.
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(vst1q_s64_x3): Likewise.
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(vst1q_u8_x3): Likewise.
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(vst1q_u16_x3): Likewise.
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(vst1q_u32_x3): Likewise.
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(vst1q_u64_x3): Likewise.
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(vst1q_f16_x3): Likewise.
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(vst1q_f32_x3): Likewise.
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(vst1q_f64_x3): Likewise.
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(vst1q_p64_x3): Likewise.
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2021-07-23 H.J. Lu <hjl.tools@gmail.com>
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PR target/101504
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* config/i386/i386.c (ix86_gen_scratch_sse_rtx): Don't return
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hard register when LRA is in progress.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vst1_s8_x4): Use
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__builtin_memcpy instead of using a union.
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(vst1q_s8_x4): Likewise.
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(vst1_s16_x4): Likewise.
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(vst1q_s16_x4): Likewise.
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(vst1_s32_x4): Likewise.
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(vst1q_s32_x4): Likewise.
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(vst1_u8_x4): Likewise.
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(vst1q_u8_x4): Likewise.
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(vst1_u16_x4): Likewise.
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(vst1q_u16_x4): Likewise.
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(vst1_u32_x4): Likewise.
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(vst1q_u32_x4): Likewise.
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(vst1_f16_x4): Likewise.
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(vst1q_f16_x4): Likewise.
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(vst1_f32_x4): Likewise.
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(vst1q_f32_x4): Likewise.
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(vst1_p8_x4): Likewise.
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(vst1q_p8_x4): Likewise.
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(vst1_p16_x4): Likewise.
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(vst1q_p16_x4): Likewise.
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(vst1_s64_x4): Likewise.
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(vst1_u64_x4): Likewise.
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(vst1_p64_x4): Likewise.
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(vst1q_s64_x4): Likewise.
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(vst1q_u64_x4): Likewise.
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(vst1q_p64_x4): Likewise.
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(vst1_f64_x4): Likewise.
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(vst1q_f64_x4): Likewise.
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2021-07-23 Jonathan Wrightt <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vst2_s64): Use __builtin_memcpy
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instead of constructing __builtin_aarch64_simd_oi one vector
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at a time.
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(vst2_u64): Likewise.
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(vst2_f64): Likewise.
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(vst2_s8): Likewise.
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(vst2_p8): Likewise.
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(vst2_s16): Likewise.
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(vst2_p16): Likewise.
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(vst2_s32): Likewise.
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(vst2_u8): Likewise.
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(vst2_u16): Likewise.
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(vst2_u32): Likewise.
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(vst2_f16): Likewise.
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(vst2_f32): Likewise.
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(vst2_p64): Likewise.
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(vst2q_s8): Likewise.
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(vst2q_p8): Likewise.
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(vst2q_s16): Likewise.
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(vst2q_p16): Likewise.
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(vst2q_s32): Likewise.
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(vst2q_s64): Likewise.
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(vst2q_u8): Likewise.
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(vst2q_u16): Likewise.
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(vst2q_u32): Likewise.
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(vst2q_u64): Likewise.
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(vst2q_f16): Likewise.
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(vst2q_f32): Likewise.
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(vst2q_f64): Likewise.
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(vst2q_p64): Likewise.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vst3_s64): Use __builtin_memcpy
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instead of constructing __builtin_aarch64_simd_ci one vector
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at a time.
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(vst3_u64): Likewise.
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(vst3_f64): Likewise.
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(vst3_s8): Likewise.
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(vst3_p8): Likewise.
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(vst3_s16): Likewise.
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(vst3_p16): Likewise.
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(vst3_s32): Likewise.
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(vst3_u8): Likewise.
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(vst3_u16): Likewise.
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(vst3_u32): Likewise.
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(vst3_f16): Likewise.
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(vst3_f32): Likewise.
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(vst3_p64): Likewise.
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(vst3q_s8): Likewise.
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(vst3q_p8): Likewise.
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(vst3q_s16): Likewise.
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(vst3q_p16): Likewise.
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(vst3q_s32): Likewise.
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(vst3q_s64): Likewise.
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(vst3q_u8): Likewise.
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(vst3q_u16): Likewise.
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(vst3q_u32): Likewise.
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(vst3q_u64): Likewise.
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(vst3q_f16): Likewise.
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(vst3q_f32): Likewise.
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(vst3q_f64): Likewise.
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(vst3q_p64): Likewise.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vst4_s64): Use __builtin_memcpy
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instead of constructing __builtin_aarch64_simd_xi one vector
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at a time.
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(vst4_u64): Likewise.
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(vst4_f64): Likewise.
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(vst4_s8): Likewise.
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(vst4_p8): Likewise.
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(vst4_s16): Likewise.
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(vst4_p16): Likewise.
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(vst4_s32): Likewise.
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(vst4_u8): Likewise.
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(vst4_u16): Likewise.
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(vst4_u32): Likewise.
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(vst4_f16): Likewise.
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(vst4_f32): Likewise.
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(vst4_p64): Likewise.
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(vst4q_s8): Likewise.
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(vst4q_p8): Likewise.
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(vst4q_s16): Likewise.
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(vst4q_p16): Likewise.
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(vst4q_s32): Likewise.
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(vst4q_s64): Likewise.
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(vst4q_u8): Likewise.
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(vst4q_u16): Likewise.
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(vst4q_u32): Likewise.
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(vst4q_u64): Likewise.
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(vst4q_f16): Likewise.
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(vst4q_f32): Likewise.
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(vst4q_f64): Likewise.
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(vst4q_p64): Likewise.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vtbx4_s8): Use __builtin_memcpy
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instead of constructing __builtin_aarch64_simd_oi one vector
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at a time.
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(vtbx4_u8): Likewise.
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(vtbx4_p8): Likewise.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vtbl3_s8): Use __builtin_memcpy
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instead of constructing __builtin_aarch64_simd_oi one vector
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at a time.
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(vtbl3_u8): Likewise.
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(vtbl3_p8): Likewise.
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(vtbl4_s8): Likewise.
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(vtbl4_u8): Likewise.
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(vtbl4_p8): Likewise.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vqtbx2_s8): Use __builtin_memcpy
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instead of constructing __builtin_aarch64_simd_oi one vector
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at a time.
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(vqtbx2_u8): Likewise.
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(vqtbx2_p8): Likewise.
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(vqtbx2q_s8): Likewise.
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(vqtbx2q_u8): Likewise.
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(vqtbx2q_p8): Likewise.
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(vqtbx3_s8): Use __builtin_memcpy instead of constructing
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__builtin_aarch64_simd_ci one vector at a time.
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(vqtbx3_u8): Likewise.
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(vqtbx3_p8): Likewise.
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(vqtbx3q_s8): Likewise.
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(vqtbx3q_u8): Likewise.
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(vqtbx3q_p8): Likewise.
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(vqtbx4_s8): Use __builtin_memcpy instead of constructing
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__builtin_aarch64_simd_xi one vector at a time.
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(vqtbx4_u8): Likewise.
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(vqtbx4_p8): Likewise.
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(vqtbx4q_s8): Likewise.
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(vqtbx4q_u8): Likewise.
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(vqtbx4q_p8): Likewise.
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2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
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* config/aarch64/arm_neon.h (vqtbl2_s8): Use __builtin_memcpy
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instead of constructing __builtin_aarch64_simd_oi one vector
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at a time.
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(vqtbl2_u8): Likewise.
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(vqtbl2_p8): Likewise.
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(vqtbl2q_s8): Likewise.
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(vqtbl2q_u8): Likewise.
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(vqtbl2q_p8): Likewise.
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(vqtbl3_s8): Use __builtin_memcpy instead of constructing
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__builtin_aarch64_simd_ci one vector at a time.
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(vqtbl3_u8): Likewise.
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(vqtbl3_p8): Likewise.
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(vqtbl3q_s8): Likewise.
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(vqtbl3q_u8): Likewise.
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(vqtbl3q_p8): Likewise.
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(vqtbl4_s8): Use __builtin_memcpy instead of constructing
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__builtin_aarch64_simd_xi one vector at a time.
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(vqtbl4_u8): Likewise.
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(vqtbl4_p8): Likewise.
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(vqtbl4q_s8): Likewise.
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(vqtbl4q_u8): Likewise.
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(vqtbl4q_p8): Likewise.
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2021-07-23 Haochen Gui <guihaoc@gcc.gnu.org>
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PR target/100952
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* config/rs6000/rs6000.md (cstore<mode>4): Fix wrong fall through.
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2021-07-22 Andrew Pinski <apinski@marvell.com>
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PR tree-optimization/10153
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@ -1 +1 @@
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20210723
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20210724
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@ -1,3 +1,19 @@
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2021-07-23 David Malcolm <dmalcolm@redhat.com>
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* diagnostic-manager.cc
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(class auto_disable_complexity_checks): New.
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(epath_finder::explore_feasible_paths): Use it to disable
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complexity checks whilst processing the worklist.
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* region-model-manager.cc
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(region_model_manager::region_model_manager): Initialize
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m_check_complexity.
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(region_model_manager::reject_if_too_complex): Bail if
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m_check_complexity is false.
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* region-model.h
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(region_model_manager::enable_complexity_check): New.
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(region_model_manager::disable_complexity_check): New.
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(region_model_manager::m_check_complexity): New.
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2021-07-21 David Malcolm <dmalcolm@redhat.com>
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PR analyzer/101547
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|
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@ -1,3 +1,14 @@
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2021-07-23 Jakub Jelinek <jakub@redhat.com>
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* c-lex.c (c_common_has_attribute): Call canonicalize_attr_name also
|
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on attr_id. Return 1 for omp::directive or omp::sequence in C++11
|
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and later.
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|
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2021-07-23 Jakub Jelinek <jakub@redhat.com>
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|
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* c-pragma.h (enum pragma_kind): Add PRAGMA_OMP__START_ and
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PRAGMA_OMP__LAST_ enumerators.
|
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|
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2021-07-21 Thomas Schwinge <thomas@codesourcery.com>
|
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Joseph Myers <joseph@codesourcery.com>
|
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Cesar Philippidis <cesar@codesourcery.com>
|
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|
|
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|
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@ -1,3 +1,19 @@
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2021-07-23 Jakub Jelinek <jakub@redhat.com>
|
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|
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* parser.h (struct cp_parser): Add omp_attrs_forbidden_p member.
|
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* parser.c (cp_parser_handle_statement_omp_attributes): Diagnose
|
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mixing of attribute and pragma syntax directives when seeing
|
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omp::directive if parser->omp_attrs_forbidden_p or if attribute syntax
|
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directives are followed by OpenMP pragma.
|
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(cp_parser_statement): Clear parser->omp_attrs_forbidden_p after
|
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the cp_parser_handle_statement_omp_attributes call.
|
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(cp_parser_omp_structured_block): Add disallow_omp_attrs argument,
|
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if true, set parser->omp_attrs_forbidden_p.
|
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(cp_parser_omp_scan_loop_body, cp_parser_omp_sections_scope): Pass
|
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false as disallow_omp_attrs to cp_parser_omp_structured_block.
|
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(cp_parser_omp_parallel, cp_parser_omp_task): Set
|
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parser->omp_attrs_forbidden_p.
|
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|
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2021-07-21 Thomas Schwinge <thomas@codesourcery.com>
|
||||
Joseph Myers <joseph@codesourcery.com>
|
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Cesar Philippidis <cesar@codesourcery.com>
|
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|
|
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|
|
@ -1,3 +1,9 @@
|
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2021-07-23 Harald Anlauf <anlauf@gmx.de>
|
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|
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PR fortran/101536
|
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* check.c (array_check): Adjust check for the case of CLASS
|
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arrays.
|
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|
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2021-07-21 Thomas Schwinge <thomas@codesourcery.com>
|
||||
Joseph Myers <joseph@codesourcery.com>
|
||||
Cesar Philippidis <cesar@codesourcery.com>
|
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|
|
|
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|
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@ -1,3 +1,85 @@
|
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2021-07-23 Harald Anlauf <anlauf@gmx.de>
|
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|
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PR fortran/101536
|
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* gfortran.dg/pr101536.f90: New test.
|
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|
||||
2021-07-23 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR rtl-optimization/101562
|
||||
* gcc.c-torture/compile/pr101562.c: New test.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
|
||||
tests.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
|
||||
tests.
|
||||
|
||||
2021-07-23 H.J. Lu <hjl.tools@gmail.com>
|
||||
|
||||
PR target/101504
|
||||
* gcc.target/i386/pr101504.c: New test.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
|
||||
tests.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
|
||||
tests.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
|
||||
tests.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: Add new
|
||||
tests.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: New tests.
|
||||
|
||||
2021-07-23 Jonathan Wright <jonathan.wright@arm.com>
|
||||
|
||||
* gcc.target/aarch64/vector_structure_intrinsics.c: New test.
|
||||
|
||||
2021-07-23 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
* c-c++-common/gomp/attrs-1.c: New test.
|
||||
* c-c++-common/gomp/attrs-2.c: New test.
|
||||
* c-c++-common/gomp/attrs-3.c: New test.
|
||||
|
||||
2021-07-23 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
* g++.dg/gomp/attrs-4.C: New test.
|
||||
* g++.dg/gomp/attrs-5.C: New test.
|
||||
|
||||
2021-07-23 Xi Ruoyao <xry111@mengyan1223.wang>
|
||||
|
||||
* gcc.target/mips/mips.exp (mips_option_groups): add
|
||||
-finline and -fno-inline.
|
||||
|
||||
2021-07-23 Xi Ruoyao <xry111@mengyan1223.wang>
|
||||
|
||||
Revert:
|
||||
2021-07-09 Xi Ruoyao <xry111@mengyan1223.wang>
|
||||
|
||||
* gcc.target/mips/cfgcleanup-jalr2.c: Remove -fno-inline and add
|
||||
__attribute__((noinline)).
|
||||
* gcc.target/mips/cfgcleanup-jalr3.c: Likewise.
|
||||
|
||||
2021-07-23 David Malcolm <dmalcolm@redhat.com>
|
||||
|
||||
* gcc.dg/analyzer/feasibility-3.c: New test.
|
||||
|
||||
2021-07-22 Martin Sebor <msebor@redhat.com>
|
||||
|
||||
PR tree-optimization/65178
|
||||
|
|
|
|||
|
|
@ -1,3 +1,12 @@
|
|||
2021-07-23 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
* include/std/future: Include <bits/atomic_base.h> instead of
|
||||
<atomic>.
|
||||
|
||||
2021-07-23 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
* include/bits/stl_relops.h: Update documentation comments.
|
||||
|
||||
2021-07-22 Jonathan Wakely <jwakely@redhat.com>
|
||||
|
||||
PR libstdc++/101583
|
||||
|
|
|
|||
Loading…
Reference in New Issue