sh.h (TARGET_CACHE32, [...]): Delete macro.
* config/sh/sh.h (TARGET_CACHE32, TARGET_HARVARD): Delete macro. (TARGET_SUPERSCALAR): Add TARGET_SH2A. (CACHE_LOG): Use TARGET_HARD_SH4 and TARGET_SH5 instead of TARGET_CACHE32. (TRAMPOLINE_ALIGNMENT): Use TARGET_HARD_SH4 and TARGET_SH5 instead of TARGET_HARVARD. * config/sh/sh.c (sh_trampoline_init): Likewise. From-SVN: r193151
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@ -1,3 +1,13 @@
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2012-11-05 Oleg Endo <olegendo@gcc.gnu.org>
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* config/sh/sh.h (TARGET_CACHE32, TARGET_HARVARD): Delete macro.
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(TARGET_SUPERSCALAR): Add TARGET_SH2A.
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(CACHE_LOG): Use TARGET_HARD_SH4 and TARGET_SH5 instead of
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TARGET_CACHE32.
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(TRAMPOLINE_ALIGNMENT): Use TARGET_HARD_SH4 and TARGET_SH5 instead of
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TARGET_HARVARD.
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* config/sh/sh.c (sh_trampoline_init): Likewise.
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2012-11-05 David Edelsohn <dje.gcc@gmail.com>
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* system.h (loc_t): Poison.
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@ -11545,7 +11545,7 @@ sh_trampoline_init (rtx tramp_mem, tree fndecl, rtx cxt)
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SImode));
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emit_move_insn (adjust_address (tramp_mem, SImode, 8), cxt);
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emit_move_insn (adjust_address (tramp_mem, SImode, 12), fnaddr);
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if (TARGET_HARVARD)
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if (TARGET_HARD_SH4 || TARGET_SH5)
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{
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if (!TARGET_INLINE_IC_INVALIDATE
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|| (!(TARGET_SH4A_ARCH || TARGET_SH4_300) && TARGET_USERMODE))
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@ -58,14 +58,8 @@ extern int code_for_indirect_jump_scratch;
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/* Nonzero if we should generate code using type 3E insns. */
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#define TARGET_SH3E (TARGET_SH3 && TARGET_SH_E)
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/* Nonzero if the cache line size is 32. */
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#define TARGET_CACHE32 (TARGET_HARD_SH4 || TARGET_SH5)
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/* Nonzero if we schedule for a superscalar implementation. */
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#define TARGET_SUPERSCALAR TARGET_HARD_SH4
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/* Nonzero if the target has separate instruction and data caches. */
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#define TARGET_HARVARD (TARGET_HARD_SH4 || TARGET_SH5)
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#define TARGET_SUPERSCALAR (TARGET_HARD_SH4 || TARGET_SH2A)
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/* Nonzero if a double-precision FPU is available. */
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#define TARGET_FPU_DOUBLE \
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@ -461,7 +455,7 @@ extern enum sh_divide_strategy_e sh_div_strategy;
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/* The log (base 2) of the cache line size, in bytes. Processors prior to
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SH2 have no actual cache, but they fetch code in chunks of 4 bytes.
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The SH2/3 have 16 byte cache lines, and the SH4 has a 32 byte cache line */
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#define CACHE_LOG (TARGET_CACHE32 ? 5 : TARGET_SH2 ? 4 : 2)
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#define CACHE_LOG ((TARGET_HARD_SH4 || TARGET_SH5) ? 5 : TARGET_SH2 ? 4 : 2)
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/* ABI given & required minimum allocation boundary (in *bits*) for the
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code of a function. */
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@ -1575,9 +1569,10 @@ struct sh_args {
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/* Length in units of the trampoline for entering a nested function. */
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#define TRAMPOLINE_SIZE (TARGET_SHMEDIA64 ? 40 : TARGET_SH5 ? 24 : 16)
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/* Alignment required for a trampoline in bits . */
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/* Alignment required for a trampoline in bits. */
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#define TRAMPOLINE_ALIGNMENT \
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((CACHE_LOG < 3 || (optimize_size && ! TARGET_HARVARD)) ? 32 \
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((CACHE_LOG < 3 \
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|| (optimize_size && ! (TARGET_HARD_SH4 || TARGET_SH5))) ? 32 \
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: TARGET_SHMEDIA ? 256 : 64)
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/* A C expression whose value is RTL representing the value of the return
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