pa.c (ireg_operand): New function.

* pa.c (ireg_operand): New function.
        * pa.h (PREDICATE_CODES): Handle ireg_operand.
        * pa.md (parallel_addb, parallel_movb): Use ireg_operand.
        Fix out of date comment.

From-SVN: r30375
This commit is contained in:
Jeffrey A Law 1999-11-03 13:25:17 +00:00 committed by Jeff Law
parent 4aa95f0d43
commit eb5a48980d
4 changed files with 21 additions and 11 deletions

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@ -4,6 +4,11 @@ Wed Nov 3 12:12:59 1999 Bernd Schmidt <bernds@cygnus.co.uk>
Wed Nov 3 03:26:28 1999 Jeffrey A Law (law@cygnus.com)
* pa.c (ireg_operand): New function.
* pa.h (PREDICATE_CODES): Handle ireg_operand.
* pa.md (parallel_addb, parallel_movb): Use ireg_operand.
Fix out of date comment.
* pa.md (negdi2): Turn into expander + anonymous pattern.
* reload.c (find_reloads): Fix typos in recent change.

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@ -478,6 +478,15 @@ ireg_or_int5_operand (op, mode)
|| (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32));
}
/* Return nonzero if OP is an integer register, else return zero. */
int
ireg_operand (op, mode)
rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == REG && REGNO (op) > 0 && REGNO (op) < 32);
}
/* Return truth value of whether OP is a integer which fits the
range constraining immediate operands in three-address insns. */

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@ -2307,4 +2307,5 @@ extern struct rtx_def *return_addr_rtx ();
{"shadd_operand", {CONST_INT}}, \
{"basereg_operand", {REG}}, \
{"div_operand", {REG, CONST_INT}}, \
{"ireg_operand", {REG}}, \
{"movb_comparison_operator", {EQ, NE, LT, GE}},

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@ -5389,15 +5389,10 @@
(const_int 8)
(const_int 12)))))])
;; The next several patterns (parallel_addb, parallel_movb, fmpyadd and
;; fmpysub aren't currently used by the FSF sources, but will be soon.
;;
;; They're in the FSF tree for documentation and to make Cygnus<->FSF
;; merging easier.
(define_insn ""
[(set (pc) (label_ref (match_operand 3 "" "" )))
(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (match_operand:SI 1 "register_operand" "r")
(set (match_operand:SI 0 "ireg_operand" "=r")
(plus:SI (match_operand:SI 1 "ireg_operand" "r")
(match_operand:SI 2 "ireg_or_int5_operand" "rL")))]
"(reload_completed && operands[0] == operands[1]) || operands[0] == operands[2]"
"*
@ -5413,7 +5408,7 @@
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
(set (match_operand:SF 0 "register_operand" "=r")
(set (match_operand:SF 0 "ireg_operand" "=r")
(match_operand:SF 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
@ -5429,7 +5424,7 @@
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
(set (match_operand:SI 0 "register_operand" "=r")
(set (match_operand:SI 0 "ireg_operand" "=r")
(match_operand:SI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
@ -5445,7 +5440,7 @@
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
(set (match_operand:HI 0 "register_operand" "=r")
(set (match_operand:HI 0 "ireg_operand" "=r")
(match_operand:HI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*
@ -5461,7 +5456,7 @@
(define_insn ""
[(set (pc) (label_ref (match_operand 2 "" "" )))
(set (match_operand:QI 0 "register_operand" "=r")
(set (match_operand:QI 0 "ireg_operand" "=r")
(match_operand:QI 1 "ireg_or_int5_operand" "rL"))]
"reload_completed"
"*