[ARM] Add -march=armv7ve
gcc/ 2014-01-29 Renlin Li <Renlin.Li@arm.com> * config/arm/arm-arches.def (ARM_ARCH): Add armv7ve arch. * config/arm/arm.c (FL_FOR_ARCH7VE): New. (arm_file_start): Generate correct asm header for armv7ve. * config/arm/bpabi.h: Add multilib support for armv7ve. * config/arm/driver-arm.c: Change the architectures of cortex-a7 and cortex-a15 to armv7ve. * config/arm/t-aprofile: Add multilib support for armv7ve. * doc/invoke.texi: Document -march=armv7ve. gcc/testsuite/ 2014-01-29 Renlin Li <Renlin.Li@arm.com> * gcc.target/arm/ftest-armv7ve-arm.c: New. * gcc.target/arm/ftest-armv7ve-thumb.c: New. * lib/target-supports.exp: New armfunc, armflag and armdef for armv7ve. From-SVN: r207237
This commit is contained in:
Renlin Li
Kyrylo Tkachov
parent
dc9e1b866b
commit
eb6006ad65
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@ -1,3 +1,14 @@
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2014-01-29 Renlin Li <Renlin.Li@arm.com>
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* config/arm/arm-arches.def (ARM_ARCH): Add armv7ve arch.
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* config/arm/arm.c (FL_FOR_ARCH7VE): New.
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(arm_file_start): Generate correct asm header for armv7ve.
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* config/arm/bpabi.h: Add multilib support for armv7ve.
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* config/arm/driver-arm.c: Change the architectures of cortex-a7
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and cortex-a15 to armv7ve.
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* config/arm/t-aprofile: Add multilib support for armv7ve.
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* doc/invoke.texi: Document -march=armv7ve.
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2014-01-29 Richard Biener <rguenther@suse.de>
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PR tree-optimization/58742
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@ -50,6 +50,7 @@ ARM_ARCH("armv6-m", cortexm1, 6M, FL_FOR_ARCH6M)
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ARM_ARCH("armv6s-m", cortexm1, 6M, FL_FOR_ARCH6M)
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ARM_ARCH("armv7", cortexa8, 7, FL_CO_PROC | FL_FOR_ARCH7)
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ARM_ARCH("armv7-a", cortexa8, 7A, FL_CO_PROC | FL_FOR_ARCH7A)
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ARM_ARCH("armv7ve", cortexa8, 7A, FL_CO_PROC | FL_FOR_ARCH7VE)
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ARM_ARCH("armv7-r", cortexr4, 7R, FL_CO_PROC | FL_FOR_ARCH7R)
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ARM_ARCH("armv7-m", cortexm3, 7M, FL_CO_PROC | FL_FOR_ARCH7M)
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ARM_ARCH("armv7e-m", cortexm4, 7EM, FL_CO_PROC | FL_FOR_ARCH7EM)
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@ -764,11 +764,11 @@ static int thumb_call_reg_needed;
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#define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM)
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#define FL_FOR_ARCH7 ((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
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#define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
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#define FL_FOR_ARCH7VE (FL_FOR_ARCH7A | FL_THUMB_DIV | FL_ARM_DIV)
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#define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_THUMB_DIV)
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#define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_THUMB_DIV)
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#define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM)
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#define FL_FOR_ARCH8A (FL_FOR_ARCH7 | FL_ARCH6K | FL_ARCH8 | FL_THUMB_DIV \
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| FL_ARM_DIV | FL_NOTM)
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#define FL_FOR_ARCH8A (FL_FOR_ARCH7VE | FL_ARCH8)
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/* The bits in this mask specify which
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instructions we are allowed to generate. */
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@ -27859,20 +27859,34 @@ arm_file_start (void)
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const char *fpu_name;
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if (arm_selected_arch)
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{
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const char* pos = strchr (arm_selected_arch->name, '+');
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if (pos)
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/* armv7ve doesn't support any extensions. */
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if (strcmp (arm_selected_arch->name, "armv7ve") == 0)
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{
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char buf[15];
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gcc_assert (strlen (arm_selected_arch->name)
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<= sizeof (buf) / sizeof (*pos));
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strncpy (buf, arm_selected_arch->name,
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(pos - arm_selected_arch->name) * sizeof (*pos));
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buf[pos - arm_selected_arch->name] = '\0';
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asm_fprintf (asm_out_file, "\t.arch %s\n", buf);
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asm_fprintf (asm_out_file, "\t.arch_extension %s\n", pos + 1);
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/* Keep backward compatability for assemblers
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which don't support armv7ve. */
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asm_fprintf (asm_out_file, "\t.arch armv7-a\n");
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asm_fprintf (asm_out_file, "\t.arch_extension virt\n");
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asm_fprintf (asm_out_file, "\t.arch_extension idiv\n");
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asm_fprintf (asm_out_file, "\t.arch_extension sec\n");
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asm_fprintf (asm_out_file, "\t.arch_extension mp\n");
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}
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else
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asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name);
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{
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const char* pos = strchr (arm_selected_arch->name, '+');
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if (pos)
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{
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char buf[15];
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gcc_assert (strlen (arm_selected_arch->name)
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<= sizeof (buf) / sizeof (*pos));
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strncpy (buf, arm_selected_arch->name,
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(pos - arm_selected_arch->name) * sizeof (*pos));
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buf[pos - arm_selected_arch->name] = '\0';
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asm_fprintf (asm_out_file, "\t.arch %s\n", buf);
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asm_fprintf (asm_out_file, "\t.arch_extension %s\n", pos + 1);
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}
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else
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asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name);
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}
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}
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else if (strncmp (arm_selected_cpu->name, "generic", 7) == 0)
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asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_cpu->name + 8);
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@ -66,6 +66,7 @@
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|mcpu=cortex-a57 \
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|mcpu=cortex-a57.cortex-a53 \
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|mcpu=generic-armv7-a \
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|march=armv7ve \
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|march=armv7-m|mcpu=cortex-m3 \
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|march=armv7e-m|mcpu=cortex-m4 \
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|march=armv6-m|mcpu=cortex-m0 \
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@ -83,6 +84,7 @@
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|mcpu=cortex-a57.cortex-a53 \
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|mcpu=marvell-pj4 \
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|mcpu=generic-armv7-a \
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|march=armv7ve \
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|march=armv7-m|mcpu=cortex-m3 \
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|march=armv7e-m|mcpu=cortex-m4 \
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|march=armv6-m|mcpu=cortex-m0 \
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@ -37,11 +37,11 @@ static struct vendor_cpu arm_cpu_table[] = {
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{"0xb56", "armv6t2", "arm1156t2-s"},
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{"0xb76", "armv6zk", "arm1176jz-s"},
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{"0xc05", "armv7-a", "cortex-a5"},
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{"0xc07", "armv7-a", "cortex-a7"},
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{"0xc07", "armv7ve", "cortex-a7"},
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{"0xc08", "armv7-a", "cortex-a8"},
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{"0xc09", "armv7-a", "cortex-a9"},
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{"0xc0d", "armv7-a", "cortex-a12"},
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{"0xc0f", "armv7-a", "cortex-a15"},
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{"0xc0d", "armv7ve", "cortex-a12"},
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{"0xc0f", "armv7ve", "cortex-a15"},
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{"0xc14", "armv7-r", "cortex-r4"},
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{"0xc15", "armv7-r", "cortex-r5"},
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{"0xc20", "armv6-m", "cortex-m0"},
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@ -37,12 +37,10 @@ MULTILIB_REUSE =
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# NEON-VFPV4 (simdvfpv4), NEON for ARMv8 (simdv8), or None (.).
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# Float-abi: Soft (.), softfp (softfp), or hard (hardfp).
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# We use the option -mcpu=cortex-a7 because we do not yet have march=armv7ve
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# or march=armv7a+virt as a command line option for the compiler.
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MULTILIB_OPTIONS += mthumb
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MULTILIB_DIRNAMES += thumb
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MULTILIB_OPTIONS += march=armv7-a/mcpu=cortex-a7/march=armv8-a
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MULTILIB_OPTIONS += march=armv7-a/march=armv7ve/march=armv8-a
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MULTILIB_DIRNAMES += v7-a v7ve v8-a
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MULTILIB_OPTIONS += mfpu=vfpv3-d16/mfpu=neon/mfpu=vfpv4-d16/mfpu=neon-vfpv4/mfpu=neon-fp-armv8
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@ -64,12 +62,12 @@ MULTILIB_EXCEPTIONS += mfpu=*
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MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=*
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MULTILIB_EXCEPTIONS += mthumb/mfpu=*
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MULTILIB_EXCEPTIONS += *march=armv7-a/mfloat-abi=*
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MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/mfloat-abi=*
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MULTILIB_EXCEPTIONS += *march=armv7ve/mfloat-abi=*
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MULTILIB_EXCEPTIONS += *march=armv8-a/mfloat-abi=*
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# Ensure the correct FPU variants apply to the correct base architectures.
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MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/*mfpu=vfpv3-d16*
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MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/*mfpu=neon/*
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MULTILIB_EXCEPTIONS += *march=armv7ve/*mfpu=vfpv3-d16*
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MULTILIB_EXCEPTIONS += *march=armv7ve/*mfpu=neon/*
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MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=vfpv3-d16*
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MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=neon/*
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MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=vfpv4-d16*
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@ -77,14 +75,14 @@ MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=neon-vfpv4*
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MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=vfpv4-d16*
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MULTILIB_EXCEPTIONS += *march=armv8-a/*mfpu=neon-vfpv4*
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MULTILIB_EXCEPTIONS += *march=armv7-a/*mfpu=neon-fp-armv8*
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MULTILIB_EXCEPTIONS += *mcpu=cortex-a7/*mfpu=neon-fp-armv8*
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MULTILIB_EXCEPTIONS += *march=armv7ve/*mfpu=neon-fp-armv8*
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# CPU Matches
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MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a8
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MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a9
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MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a5
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MULTILIB_MATCHES += mcpu?cortex-a7=mcpu?cortex-a15=mcpu?cortex-a12
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MULTILIB_MATCHES += mcpu?cortex-a7=mcpu?cortex-a15.cortex-a7
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MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15=mcpu?cortex-a12
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MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15.cortex-a7
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MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a53
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MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57
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MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57.cortex-a53
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@ -105,8 +103,8 @@ MULTILIB_MATCHES += mfpu?neon-fp-armv8=mfpu?crypto-neon-fp-armv8
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# This applies to any similar combination at the v7ve and v8-a arch
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# levels.
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard
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@ -117,8 +115,8 @@ MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7
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MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.vfpv4/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=mcpu.cortex-a7/mfpu.neon/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.neon/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7ve/mfpu.neon/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7ve/mfpu.neon/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv8-a/mfpu.neon/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv8-a/mfpu.neon/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard
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@ -127,25 +125,25 @@ MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mf
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MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.hard
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.softfp
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4/mfloat-abi.hard
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv7ve/mfpu.fp-armv8/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv7ve/mfpu.fp-armv8/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.hard
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MULTILIB_REUSE += mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp
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MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard
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MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp
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# And again for mthumb.
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.hard
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.vfpv3-d16/mfloat-abi.softfp
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard
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@ -156,8 +154,8 @@ MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthu
|
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MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.vfpv4/mfloat-abi.softfp
|
||||
|
||||
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.neon/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.neon/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard
|
||||
|
|
@ -166,15 +164,15 @@ MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/ma
|
|||
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp
|
||||
|
||||
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.fp-armv8/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.fp-armv8/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.fp-armv8/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp
|
||||
|
||||
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/mcpu.cortex-a7/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/mcpu.cortex-a7/mfpu.neon-fp-armv8/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard
|
||||
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp
|
||||
|
|
|
|||
|
|
@ -12301,10 +12301,13 @@ of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
|
|||
@samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
|
||||
@samp{armv6}, @samp{armv6j},
|
||||
@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
|
||||
@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m},
|
||||
@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7ve},
|
||||
@samp{armv8-a}, @samp{armv8-a+crc},
|
||||
@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
|
||||
|
||||
@option{-march=armv7ve} is the armv7-a architecture with virtualization
|
||||
extensions.
|
||||
|
||||
@option{-march=armv8-a+crc} enables code generation for the ARMv8-A
|
||||
architecture together with the optional CRC32 extensions.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2014-01-29 Renlin Li <Renlin.Li@arm.com>
|
||||
|
||||
* gcc.target/arm/ftest-armv7ve-arm.c: New.
|
||||
* gcc.target/arm/ftest-armv7ve-thumb.c: New.
|
||||
* lib/target-supports.exp: New armfunc, armflag and armdef for armv7ve.
|
||||
|
||||
2014-01-29 Paolo Carlini <paolo.carlini@oracle.com>
|
||||
|
||||
PR c++/58702
|
||||
|
|
|
|||
|
|
@ -0,0 +1,40 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7ve" } } */
|
||||
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-mthumb" } { "" } } */
|
||||
/* { dg-options "-marm" } */
|
||||
/* { dg-add-options arm_arch_v7ve } */
|
||||
|
||||
#define NEED_ARM_ARCH
|
||||
#define VALUE_ARM_ARCH 7
|
||||
|
||||
#define NEED_ARM_ARCH_ISA_ARM
|
||||
#define VALUE_ARM_ARCH_ISA_ARM 1
|
||||
|
||||
#define NEED_ARM_ARCH_ISA_THUMB
|
||||
#define VALUE_ARM_ARCH_ISA_THUMB 2
|
||||
|
||||
#define NEED_ARM_ARCH_PROFILE
|
||||
#define VALUE_ARM_ARCH_PROFILE 'A'
|
||||
|
||||
#define NEED_ARM_FEATURE_UNALIGNED
|
||||
#define VALUE_ARM_FEATURE_UNALIGNED 1
|
||||
|
||||
#define NEED_ARM_FEATURE_LDREX
|
||||
#define VALUE_ARM_FEATURE_LDREX 15
|
||||
|
||||
#define NEED_ARM_FEATURE_CLZ
|
||||
#define VALUE_ARM_FEATURE_CLZ 1
|
||||
|
||||
#define NEED_ARM_FEATURE_DSP
|
||||
#define VALUE_ARM_FEATURE_DSP 1
|
||||
|
||||
#define NEED_ARM_FEATURE_SIMD32
|
||||
#define VALUE_ARM_FEATURE_SIMD32 1
|
||||
|
||||
#define NEED_ARM_FEATURE_QBIT
|
||||
#define VALUE_ARM_FEATURE_QBIT 1
|
||||
|
||||
#define NEED_ARM_FEATURE_SAT
|
||||
#define VALUE_ARM_FEATURE_SAT 1
|
||||
|
||||
#include "ftest-support.h"
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv7ve" } } */
|
||||
/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-marm" } { "" } } */
|
||||
/* { dg-options "-mthumb" } */
|
||||
/* { dg-add-options arm_arch_v7ve } */
|
||||
|
||||
#define NEED_ARM_ARCH
|
||||
#define VALUE_ARM_ARCH 7
|
||||
|
||||
#define NEED_ARM_ARCH_ISA_ARM
|
||||
#define VALUE_ARM_ARCH_ISA_ARM 1
|
||||
|
||||
#define NEED_ARM_ARCH_ISA_THUMB
|
||||
#define VALUE_ARM_ARCH_ISA_THUMB 2
|
||||
|
||||
#define NEED_ARM_ARCH_PROFILE
|
||||
#define VALUE_ARM_ARCH_PROFILE 'A'
|
||||
|
||||
#define NEED_ARM_FEATURE_UNALIGNED
|
||||
#define VALUE_ARM_FEATURE_UNALIGNED 1
|
||||
|
||||
#define NEED_ARM_FEATURE_LDREX
|
||||
#define VALUE_ARM_FEATURE_LDREX 15
|
||||
|
||||
#define NEED_ARM_FEATURE_CLZ
|
||||
#define VALUE_ARM_FEATURE_CLZ 1
|
||||
|
||||
#define NEED_ARM_FEATURE_DSP
|
||||
#define VALUE_ARM_FEATURE_DSP 1
|
||||
|
||||
#define NEED_ARM_FEATURE_SIMD32
|
||||
#define VALUE_ARM_FEATURE_SIMD32 1
|
||||
|
||||
#define NEED_ARM_FEATURE_QBIT
|
||||
#define VALUE_ARM_FEATURE_QBIT 1
|
||||
|
||||
#define NEED_ARM_FEATURE_SAT
|
||||
#define VALUE_ARM_FEATURE_SAT 1
|
||||
|
||||
#include "ftest-support.h"
|
||||
|
|
@ -2630,6 +2630,7 @@ foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
|
|||
v6z "-march=armv6z" __ARM_ARCH_6Z__
|
||||
v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
|
||||
v7a "-march=armv7-a" __ARM_ARCH_7A__
|
||||
v7ve "-march=armv7ve" __ARM_ARCH_7A__
|
||||
v7r "-march=armv7-r" __ARM_ARCH_7R__
|
||||
v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
|
||||
v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
|
||||
|
|
|
|||
Loading…
Reference in New Issue