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alias.c (rtx_equal_for_memref_p): Use predicates to test rtx classes and new rtx class codes... 

2004-02-07  Paolo Bonzini  <bonzini@gnu.org>

	* alias.c (rtx_equal_for_memref_p): Use predicates
	to test rtx classes and new rtx class codes, possibly
	splitting conditionals that tested against '<' and 'o'.
	* caller-save.c (save_call_clobbered_regs): Likewise.
	* combine.c (contains_muldiv, find_split_point, subst,
	combine_simplify_rtx, simplify_if_then_else,
	simplify_set, simplify_logical, expand_compound_operation,
	make_compound_operation, if_then_else_cond, known_cond,
	apply_distributive_law, cached_nonzero_bits,
	cached_num_sign_bit_copies, simplify_shift_const,
	gen_binary, simplify_comparison, update_table_tick,
	record_value_for_reg, get_lsat_value_validate): Likewise.
	* cse.c (mention_regs, find_best_addr, find_comparison_args,
	fold_rtx, cse_insn, invalidate_memory, cse_basic_block):
	Likewise.
	* emit-rtl.c (copy_insn_1): Likewise.
	* expr.c (force_operand): Likewise.
	* final.c (final_scan_insn, get_mem_expr_from_op): Likewise.
	* flow.c (notice_stack_pointer_modification_1,
	invalidate_mems_from_autoinc, ior_reg_cond, not_reg_cond,
	and_reg_cond, elim_reg_cond): Likewise.
	* function.c (update_epilogue_consts): Likewise.
	* genattrtab.c (attr_rtx_1): Likewise.
	* genopinit.c (gen_insn): Likewise.
	* integrate.c (subst_constants): Likewise.
	* jump.c (reversed_comparison_code_parts,
	reversed_comparison_code, delete_related_insns,
	rtx_renumbered_equal_p): Likewise.
	* local-alloc.c (block_alloc): Likewise.
	* loop.c (rtx_equal_for_prefetch_p, maybe_eliminate_biv,
	canonicalize_condition): Likewise.
	* loop-iv.c (simplify_using_conditions, iv_number_of_iterations):
	Likewise.
	* optabs.c (add_equal_node, expand_binop): Likewise.
	* predict.c (estimate_probability): Likewise.
	* ra-debug.c (ra_print_rtx_2op, ra_print_rtx): Likewise.
	* recog.c (validate_replace_rtx_1, comparison_operator,
	offsettable_address_p, constrain_operands): Likewise.
	* reg-stack.c (swap_rtx_condition_1, subst_stack_regs_pat):
	Likewise.
	* regclass.c (scan_one_insn): Likewise.
	* regmove.c (stable_and_no_regs_but_for_p): Likewise.
	* regrename.c (kill_autoinc_value): Likewise.
	* reload.c (find_reusable_reload, find_reloads,
	reg_overlap_mentioned_for_reload_p): Likewise.
	* reload1.c (gen_reload, delete_address_reloads_1): Likewise.
	* rtl.c (copy_rtx): Likewise.
	* rtl.h (CONSTANT_P, INSN_P): Likewise.
	* rtlanal.c (commutative_operand_precedence): Likewise.
	* sched-deps.c (conditions_mutex_p): Likewise.
	* sched-rgn.c (is_cfg_nonregular): Likewise.
	* simplify-rtx.c (simplify_gen_binary,
	simplify_gen_relational, simplify_replace_rtx,
	simplify_unary_operation, simplify_binary_operation,
	simplify_ternary_operation, simplify_rtx): Likewise.
	* unroll.c (reg_dead_after_loop): Likewise.
	* config/alpha/alpha.c (alpha_swapped_comparison_operator,
	print_operand): Likewise.
	* config/arc/arc.c (proper_comparison_operator): Likewise.
	* config/arm/arm.c (arm_arm_address_cost, arm_select_cc_mode):
	Likewise.
	* config/avr/avr.c (_reg_unused_after): Likewise.
	* config/frv/frv.c (frv_ifcvt_modify_tests,
	frv_ifcvt_modify_insn, frv_pack_insn): Likewise.
	* config/i386/i386.c (ix86_comparison_operator,
	ix86_carry_flag_operator, fcmov_comparison_operator,
	arith_or_logical_operator, print_operand,
	ix86_expand_binary_operator, ix86_binary_operator_ok):
	Likewise.
	* config/i386/i386.md: Likewise.
	* config/ia64/ia64.c (not_postinc_memory_operand,
	ia64_print_operand, update_set_flags, errata_emit_nops):
	Likewise.
	* config/ia64/ia64.h (PREFERRED_RELOAD_CLASS,
	CONSTRAINT_OK_FOR_S): Likewise.
	* config/ip2k/ip2k.c (mdr_resequence_xy_yx,
	mdr_try_move_dp_reload, ip2k_check_can_adjust_stack_ref,
	ip2k_xexp_not_uses_reg_for_mem, ip2k_xexp_not_uses_reg_p,
	ip2k_composite_xexp_not_uses_reg_p, ip2k_unary_operator):
	Likewise.
	* config/iq2000/iq2000.c (cmp_op, symbolic_expression_p,
	eqne_comparison_operator, signed_comparison_operator):
	Likewise.
	* config/mips/mips.c (cmp_op, symbolic_expression_p):
	Likewise.
	* config/mmix/mmix (mmix_foldable_comparison_operator,
	mmix_comparison_operator): Likewise.
	* config/pa/pa.c (hppa_legitimize_address): Likewise.
	* config/rs6000/rs6000.c (stmw_operation,
	branch_comparison_operator, trap_comparison_operator,
	ccr_bit): Likewise.
	* config/rs6000/rs6000.h (SELECT_CC_MODE): Likewise.
	* config/s390/s390.c (s390_alc_comparison,
	s390_slb_comparison):L Likewise.
	* config/sh/sh.c (gen_block_redirect, reg_unused_after):
	Likewise.
	* config/sparc/sparc.c (eq_or_neq, normal_comp_operator,
	noov_compare_op, noov_compare64_op, v9_regcmp_op,
	emit_hard_tfmode_operation, reg_unused_after)
	* doc/md.texi, doc/rtl.texi: Likewise.

	* ra-debug.c: Add 2004 to list of copyright years.
	* unroll.c: Likewise.

	* combine.c (simplify_logical): Remove dummy test,
	(apply_distributive_law): Fix typo in comment.
	GET_CODE (x) == AND so x is a commutative binary op.
	* jump.c (delete_related_insns): simplify loop
	condition, move testing of RTX codes inside the loop.
	(rtx_renumbered_equal_p): do not use RTX_CODE.
	* rtl.c (rtx_class): Declare as enum rtx_class.
	* rtl.def (EQ, NE, UNEQ, LTGT, UNORDERED, ORDERED):
	Move to RTX_COMM_COMPARE class.
	(HIGH, SYMBOL_REF, LABEL_REF, CONST, CONST_INT, CONST_DOUBLE):
	Move to RTX_CONST_OBJ class.
	* rtl.h (enum rtx_class): New declaration,
	(RTX_OBJ_MASK, RTX_OBJ_RESULT, RTX_COMPARE_MASK,
	RTX_COMPARE_RESULT, RTX_ARITHMETIC_MASK, RTX_ARITHMETIC_RESULT,
	RTX_BINARY_MASK, RTX_BINARY_RESULT, RTX_COMMUTATIVE_MASK,
	RTX_COMMUTATIVE_RESULT, RTX_NON_COMMUTATIVE_RESULT,
	RTX_EXPR_FIRST, RTX_EXPR_LAST, UNARY_P, BINARY_P,
	ARITHMETIC_P, COMMUTATIVE_ARITHMETIC_P, COMPARISON_P,
	SWAPPABLE_OPERANDS_P, NON_COMMUTATIVE_P, COMMUTATIVE_P,
	OBJECT_P): New macros.
	* config/sparc/sparc.c (noov_compare_op): Remove register
	from parameter.

From-SVN: r78824
This commit is contained in:
Paolo Bonzini 2004-03-03 08:35:33 +00:00 committed by Paolo Bonzini
parent a841ab8b3e
commit ec8e098d3d
57 changed files with 931 additions and 696 deletions
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129
gcc/ChangeLog
View File

@ -1,3 +1,132 @@
2004-03-03 Paolo Bonzini <bonzini@gnu.org>
* alias.c (rtx_equal_for_memref_p): Use predicates
to test rtx classes and new rtx class codes, possibly
splitting conditionals that tested against '<' and 'o'.
* caller-save.c (save_call_clobbered_regs): Likewise.
* combine.c (contains_muldiv, find_split_point, subst,
combine_simplify_rtx, simplify_if_then_else,
simplify_set, simplify_logical, expand_compound_operation,
make_compound_operation, if_then_else_cond, known_cond,
apply_distributive_law, cached_nonzero_bits,
cached_num_sign_bit_copies, simplify_shift_const,
gen_binary, simplify_comparison, update_table_tick,
record_value_for_reg, get_lsat_value_validate): Likewise.
* cse.c (mention_regs, find_best_addr, find_comparison_args,
fold_rtx, cse_insn, invalidate_memory, cse_basic_block):
Likewise.
* emit-rtl.c (copy_insn_1): Likewise.
* expr.c (force_operand): Likewise.
* final.c (final_scan_insn, get_mem_expr_from_op): Likewise.
* flow.c (notice_stack_pointer_modification_1,
invalidate_mems_from_autoinc, ior_reg_cond, not_reg_cond,
and_reg_cond, elim_reg_cond): Likewise.
* function.c (update_epilogue_consts): Likewise.
* genattrtab.c (attr_rtx_1): Likewise.
* genopinit.c (gen_insn): Likewise.
* integrate.c (subst_constants): Likewise.
* jump.c (reversed_comparison_code_parts,
reversed_comparison_code, delete_related_insns,
rtx_renumbered_equal_p): Likewise.
* local-alloc.c (block_alloc): Likewise.
* loop.c (rtx_equal_for_prefetch_p, maybe_eliminate_biv,
canonicalize_condition): Likewise.
* loop-iv.c (simplify_using_conditions, iv_number_of_iterations):
Likewise.
* optabs.c (add_equal_node, expand_binop): Likewise.
* predict.c (estimate_probability): Likewise.
* ra-debug.c (ra_print_rtx_2op, ra_print_rtx): Likewise.
* recog.c (validate_replace_rtx_1, comparison_operator,
offsettable_address_p, constrain_operands): Likewise.
* reg-stack.c (swap_rtx_condition_1, subst_stack_regs_pat):
Likewise.
* regclass.c (scan_one_insn): Likewise.
* regmove.c (stable_and_no_regs_but_for_p): Likewise.
* regrename.c (kill_autoinc_value): Likewise.
* reload.c (find_reusable_reload, find_reloads,
reg_overlap_mentioned_for_reload_p): Likewise.
* reload1.c (gen_reload, delete_address_reloads_1): Likewise.
* rtl.c (copy_rtx): Likewise.
* rtl.h (CONSTANT_P, INSN_P): Likewise.
* rtlanal.c (commutative_operand_precedence): Likewise.
* sched-deps.c (conditions_mutex_p): Likewise.
* sched-rgn.c (is_cfg_nonregular): Likewise.
* simplify-rtx.c (simplify_gen_binary,
simplify_gen_relational, simplify_replace_rtx,
simplify_unary_operation, simplify_binary_operation,
simplify_ternary_operation, simplify_rtx): Likewise.
* unroll.c (reg_dead_after_loop): Likewise.
* config/alpha/alpha.c (alpha_swapped_comparison_operator,
print_operand): Likewise.
* config/arc/arc.c (proper_comparison_operator): Likewise.
* config/arm/arm.c (arm_arm_address_cost, arm_select_cc_mode):
Likewise.
* config/avr/avr.c (_reg_unused_after): Likewise.
* config/frv/frv.c (frv_ifcvt_modify_tests,
frv_ifcvt_modify_insn, frv_pack_insn): Likewise.
* config/i386/i386.c (ix86_comparison_operator,
ix86_carry_flag_operator, fcmov_comparison_operator,
arith_or_logical_operator, print_operand,
ix86_expand_binary_operator, ix86_binary_operator_ok):
Likewise.
* config/i386/i386.md: Likewise.
* config/ia64/ia64.c (not_postinc_memory_operand,
ia64_print_operand, update_set_flags, errata_emit_nops):
Likewise.
* config/ia64/ia64.h (PREFERRED_RELOAD_CLASS,
CONSTRAINT_OK_FOR_S): Likewise.
* config/ip2k/ip2k.c (mdr_resequence_xy_yx,
mdr_try_move_dp_reload, ip2k_check_can_adjust_stack_ref,
ip2k_xexp_not_uses_reg_for_mem, ip2k_xexp_not_uses_reg_p,
ip2k_composite_xexp_not_uses_reg_p, ip2k_unary_operator):
Likewise.
* config/iq2000/iq2000.c (cmp_op, symbolic_expression_p,
eqne_comparison_operator, signed_comparison_operator):
Likewise.
* config/mips/mips.c (cmp_op, symbolic_expression_p):
Likewise.
* config/mmix/mmix (mmix_foldable_comparison_operator,
mmix_comparison_operator): Likewise.
* config/pa/pa.c (hppa_legitimize_address): Likewise.
* config/rs6000/rs6000.c (stmw_operation,
branch_comparison_operator, trap_comparison_operator,
ccr_bit): Likewise.
* config/rs6000/rs6000.h (SELECT_CC_MODE): Likewise.
* config/s390/s390.c (s390_alc_comparison,
s390_slb_comparison):L Likewise.
* config/sh/sh.c (gen_block_redirect, reg_unused_after):
Likewise.
* config/sparc/sparc.c (eq_or_neq, normal_comp_operator,
noov_compare_op, noov_compare64_op, v9_regcmp_op,
emit_hard_tfmode_operation, reg_unused_after)
* doc/md.texi, doc/rtl.texi: Likewise.
* ra-debug.c: Add 2004 to list of copyright years.
* unroll.c: Likewise.
* combine.c (simplify_logical): Remove dummy test,
(apply_distributive_law): Fix typo in comment.
GET_CODE (x) == AND so x is a commutative binary op.
* jump.c (delete_related_insns): simplify loop
condition, move testing of RTX codes inside the loop.
(rtx_renumbered_equal_p): do not use RTX_CODE.
* rtl.c (rtx_class): Declare as enum rtx_class.
* rtl.def (EQ, NE, UNEQ, LTGT, UNORDERED, ORDERED):
Move to RTX_COMM_COMPARE class.
(HIGH, SYMBOL_REF, LABEL_REF, CONST, CONST_INT, CONST_DOUBLE):
Move to RTX_CONST_OBJ class.
* rtl.h (enum rtx_class): New declaration,
(RTX_OBJ_MASK, RTX_OBJ_RESULT, RTX_COMPARE_MASK,
RTX_COMPARE_RESULT, RTX_ARITHMETIC_MASK, RTX_ARITHMETIC_RESULT,
RTX_BINARY_MASK, RTX_BINARY_RESULT, RTX_COMMUTATIVE_MASK,
RTX_COMMUTATIVE_RESULT, RTX_NON_COMMUTATIVE_RESULT,
RTX_EXPR_FIRST, RTX_EXPR_LAST, UNARY_P, BINARY_P,
ARITHMETIC_P, COMMUTATIVE_ARITHMETIC_P, COMPARISON_P,
SWAPPABLE_OPERANDS_P, NON_COMMUTATIVE_P, COMMUTATIVE_P,
OBJECT_P): New macros.
* config/sparc/sparc.c (noov_compare_op): Remove register
from parameter.
2004-03-03 Kazu Hirata <kazu@cs.umass.edu>
* target.h: Remove texi jargons in comments.

8
gcc/alias.c
View File

@ -1173,7 +1173,7 @@ rtx_equal_for_memref_p (rtx x, rtx y)
&& rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
/* For commutative operations, the RTX match if the operand match in any
order. Also handle the simple binary and unary cases without a loop. */
if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
if (COMMUTATIVE_P (x))
{
rtx xop0 = canon_rtx (XEXP (x, 0));
rtx yop0 = canon_rtx (XEXP (y, 0));
@ -1184,14 +1184,14 @@ rtx_equal_for_memref_p (rtx x, rtx y)
|| (rtx_equal_for_memref_p (xop0, yop1)
&& rtx_equal_for_memref_p (canon_rtx (XEXP (x, 1)), yop0)));
}
else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
else if (NON_COMMUTATIVE_P (x))
{
return (rtx_equal_for_memref_p (canon_rtx (XEXP (x, 0)),
canon_rtx (XEXP (y, 0)))
&& rtx_equal_for_memref_p (canon_rtx (XEXP (x, 1)),
canon_rtx (XEXP (y, 1))));
}
else if (GET_RTX_CLASS (code) == '1')
else if (UNARY_P (x))
return rtx_equal_for_memref_p (canon_rtx (XEXP (x, 0)),
canon_rtx (XEXP (y, 0)));
@ -1261,7 +1261,7 @@ find_symbolic_term (rtx x)
code = GET_CODE (x);
if (code == SYMBOL_REF || code == LABEL_REF)
return x;
if (GET_RTX_CLASS (code) == 'o')
if (OBJECT_P (x))
return 0;
fmt = GET_RTX_FORMAT (code);

2
gcc/caller-save.c
View File

@ -384,7 +384,7 @@ save_call_clobbered_regs (void)
if (chain->is_caller_save_insn)
abort ();
if (GET_RTX_CLASS (code) == 'i')
if (INSN_P (insn))
{
/* If some registers have been saved, see if INSN references
any of them. We must restore them before the insn if so. */

239
gcc/combine.c
View File

@ -1340,18 +1340,14 @@ contains_muldiv (rtx x)
return ! (GET_CODE (XEXP (x, 1)) == CONST_INT
&& exact_log2 (INTVAL (XEXP (x, 1))) >= 0);
default:
switch (GET_RTX_CLASS (GET_CODE (x)))
{
case 'c': case '<': case '2':
return contains_muldiv (XEXP (x, 0))
if (BINARY_P (x))
return contains_muldiv (XEXP (x, 0))
|| contains_muldiv (XEXP (x, 1));
case '1':
return contains_muldiv (XEXP (x, 0));
if (UNARY_P (x))
return contains_muldiv (XEXP (x, 0));
default:
return 0;
}
return 0;
}
}
@ -2959,10 +2955,9 @@ find_split_point (rtx *loc, rtx insn)
This will occur on machines that just support REG + CONST
and have a constant moved through some previous computation. */
else if (GET_RTX_CLASS (GET_CODE (XEXP (XEXP (x, 0), 0))) != 'o'
else if (!OBJECT_P (XEXP (XEXP (x, 0), 0))
&& ! (GET_CODE (XEXP (XEXP (x, 0), 0)) == SUBREG
&& (GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (XEXP (x, 0), 0))))
== 'o')))
&& OBJECT_P (SUBREG_REG (XEXP (XEXP (x, 0), 0)))))
return &XEXP (XEXP (x, 0), 0);
}
break;
@ -2977,9 +2972,9 @@ find_split_point (rtx *loc, rtx insn)
if (SET_DEST (x) == cc0_rtx
&& GET_CODE (SET_SRC (x)) != COMPARE
&& GET_CODE (SET_SRC (x)) != ZERO_EXTRACT
&& GET_RTX_CLASS (GET_CODE (SET_SRC (x))) != 'o'
&& !OBJECT_P (SET_SRC (x))
&& ! (GET_CODE (SET_SRC (x)) == SUBREG
&& GET_RTX_CLASS (GET_CODE (SUBREG_REG (SET_SRC (x)))) == 'o'))
&& OBJECT_P (SUBREG_REG (SET_SRC (x)))))
return &SET_SRC (x);
#endif
@ -3170,14 +3165,11 @@ find_split_point (rtx *loc, rtx insn)
/* See if this is a simple operation with a constant as the second
operand. It might be that this constant is out of range and hence
could be used as a split point. */
if ((GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '2'
|| GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == 'c'
|| GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '<')
if (BINARY_P (SET_SRC (x))
&& CONSTANT_P (XEXP (SET_SRC (x), 1))
&& (GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (x), 0))) == 'o'
&& (OBJECT_P (XEXP (SET_SRC (x), 0))
|| (GET_CODE (XEXP (SET_SRC (x), 0)) == SUBREG
&& (GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (SET_SRC (x), 0))))
== 'o'))))
&& OBJECT_P (SUBREG_REG (XEXP (SET_SRC (x), 0))))))
return &XEXP (SET_SRC (x), 1);
/* Finally, see if this is a simple operation with its first operand
@ -3185,10 +3177,7 @@ find_split_point (rtx *loc, rtx insn)
register, so return it as a split point. We can always do this
because if the first operand were another operation, we would have
already found it as a split point. */
if ((GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '2'
|| GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == 'c'
|| GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '<'
|| GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '1')
if ((BINARY_P (SET_SRC (x)) || UNARY_P (SET_SRC (x)))
&& ! register_operand (XEXP (SET_SRC (x), 0), VOIDmode))
return &XEXP (SET_SRC (x), 0);
@ -3228,20 +3217,21 @@ find_split_point (rtx *loc, rtx insn)
/* Otherwise, select our actions depending on our rtx class. */
switch (GET_RTX_CLASS (code))
{
case 'b': /* This is ZERO_EXTRACT and SIGN_EXTRACT. */
case '3':
case RTX_BITFIELD_OPS: /* This is ZERO_EXTRACT and SIGN_EXTRACT. */
case RTX_TERNARY:
split = find_split_point (&XEXP (x, 2), insn);
if (split)
return split;
/* ... fall through ... */
case '2':
case 'c':
case '<':
case RTX_BIN_ARITH:
case RTX_COMM_ARITH:
case RTX_COMPARE:
case RTX_COMM_COMPARE:
split = find_split_point (&XEXP (x, 1), insn);
if (split)
return split;
/* ... fall through ... */
case '1':
case RTX_UNARY:
/* Some machines have (and (shift ...) ...) insns. If X is not
an AND, but XEXP (X, 0) is, use it as our split point. */
if (GET_CODE (x) != AND && GET_CODE (XEXP (x, 0)) == AND)
@ -3251,10 +3241,11 @@ find_split_point (rtx *loc, rtx insn)
if (split)
return split;
return loc;
}
/* Otherwise, we don't have a split point. */
return 0;
default:
/* Otherwise, we don't have a split point. */
return 0;
}
}
/* Throughout X, replace FROM with TO, and return the result.
@ -3313,7 +3304,7 @@ subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy)
/* If this is an object, we are done unless it is a MEM or LO_SUM, both
of which may contain things that can be combined. */
if (code != MEM && code != LO_SUM && GET_RTX_CLASS (code) == 'o')
if (code != MEM && code != LO_SUM && OBJECT_P (x))
return x;
/* It is possible to have a subexpression appear twice in the insn.
@ -3560,7 +3551,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
/* If this is a commutative operation, put a constant last and a complex
expression first. We don't need to do this for comparisons here. */
if (GET_RTX_CLASS (code) == 'c'
if (COMMUTATIVE_ARITH_P (x)
&& swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
{
temp = XEXP (x, 0);
@ -3616,21 +3607,17 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
Don't do anything if all operands are very simple. */
if (((GET_RTX_CLASS (code) == '2' || GET_RTX_CLASS (code) == 'c'
|| GET_RTX_CLASS (code) == '<')
&& ((GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) != 'o'
if ((BINARY_P (x)
&& ((!OBJECT_P (XEXP (x, 0))
&& ! (GET_CODE (XEXP (x, 0)) == SUBREG
&& (GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (x, 0))))
== 'o')))
|| (GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) != 'o'
&& OBJECT_P (SUBREG_REG (XEXP (x, 0)))))
|| (!OBJECT_P (XEXP (x, 1))
&& ! (GET_CODE (XEXP (x, 1)) == SUBREG
&& (GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (x, 1))))
== 'o')))))
|| (GET_RTX_CLASS (code) == '1'
&& ((GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) != 'o'
&& OBJECT_P (SUBREG_REG (XEXP (x, 1)))))))
|| (UNARY_P (x)
&& (!OBJECT_P (XEXP (x, 0))
&& ! (GET_CODE (XEXP (x, 0)) == SUBREG
&& (GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (x, 0))))
== 'o'))))))
&& OBJECT_P (SUBREG_REG (XEXP (x, 0)))))))
{
rtx cond, true_rtx, false_rtx;
@ -3638,14 +3625,13 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
if (cond != 0
/* If everything is a comparison, what we have is highly unlikely
to be simpler, so don't use it. */
&& ! (GET_RTX_CLASS (code) == '<'
&& (GET_RTX_CLASS (GET_CODE (true_rtx)) == '<'
|| GET_RTX_CLASS (GET_CODE (false_rtx)) == '<')))
&& ! (COMPARISON_P (x)
&& (COMPARISON_P (true_rtx) || COMPARISON_P (false_rtx))))
{
rtx cop1 = const0_rtx;
enum rtx_code cond_code = simplify_comparison (NE, &cond, &cop1);
if (cond_code == NE && GET_RTX_CLASS (GET_CODE (cond)) == '<')
if (cond_code == NE && COMPARISON_P (cond))
return x;
/* Simplify the alternative arms; this may collapse the true and
@ -3711,12 +3697,13 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
temp = 0;
switch (GET_RTX_CLASS (code))
{
case '1':
case RTX_UNARY:
if (op0_mode == VOIDmode)
op0_mode = GET_MODE (XEXP (x, 0));
temp = simplify_unary_operation (code, mode, XEXP (x, 0), op0_mode);
break;
case '<':
case RTX_COMPARE:
case RTX_COMM_COMPARE:
{
enum machine_mode cmp_mode = GET_MODE (XEXP (x, 0));
if (cmp_mode == VOIDmode)
@ -3739,15 +3726,17 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
}
#endif
break;
case 'c':
case '2':
case RTX_COMM_ARITH:
case RTX_BIN_ARITH:
temp = simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
break;
case 'b':
case '3':
case RTX_BITFIELD_OPS:
case RTX_TERNARY:
temp = simplify_ternary_operation (code, mode, op0_mode, XEXP (x, 0),
XEXP (x, 1), XEXP (x, 2));
break;
default:
break;
}
if (temp)
@ -3785,7 +3774,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
/* Make sure we pass the constant operand if any as the second
one if this is a commutative operation. */
if (CONSTANT_P (inner_op0) && GET_RTX_CLASS (code) == 'c')
if (CONSTANT_P (inner_op0) && COMMUTATIVE_ARITH_P (x))
{
rtx tem = inner_op0;
inner_op0 = inner_op1;
@ -3798,7 +3787,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
/* For commutative operations, try the other pair if that one
didn't simplify. */
if (inner == 0 && GET_RTX_CLASS (code) == 'c')
if (inner == 0 && COMMUTATIVE_ARITH_P (x))
{
other = XEXP (XEXP (x, 0), 1);
inner = simplify_binary_operation (code, mode,
@ -4006,7 +3995,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
but it works even if the comparison is done in a mode larger
than HOST_BITS_PER_WIDE_INT. */
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
&& COMPARISON_P (XEXP (x, 0))
&& ((HOST_WIDE_INT) STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0)
return gen_lowpart (mode, XEXP (x, 0));
@ -4016,7 +4005,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
&& ((HOST_WIDE_INT) STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0
&& (temp = get_last_value (XEXP (x, 0)))
&& GET_RTX_CLASS (GET_CODE (temp)) == '<')
&& COMPARISON_P (temp))
return gen_lowpart (mode, XEXP (x, 0));
break;
@ -4182,7 +4171,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
C is 1 and STORE_FLAG_VALUE is -1 or if C is -1 and STORE_FLAG_VALUE
is 1. This produces better code than the alternative immediately
below. */
if (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
if (COMPARISON_P (XEXP (x, 0))
&& ((STORE_FLAG_VALUE == -1 && XEXP (x, 1) == const1_rtx)
|| (STORE_FLAG_VALUE == 1 && XEXP (x, 1) == constm1_rtx))
&& (reversed = reversed_comparison (XEXP (x, 0), mode,
@ -4232,7 +4221,7 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int last,
by reversing the comparison code if valid. */
if (STORE_FLAG_VALUE == 1
&& XEXP (x, 0) == const1_rtx
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) == '<'
&& COMPARISON_P (XEXP (x, 1))
&& (reversed = reversed_comparison (XEXP (x, 1), mode,
XEXP (XEXP (x, 1), 0),
XEXP (XEXP (x, 1), 1))))
@ -4625,7 +4614,7 @@ simplify_if_then_else (rtx x)
rtx true_rtx = XEXP (x, 1);
rtx false_rtx = XEXP (x, 2);
enum rtx_code true_code = GET_CODE (cond);
int comparison_p = GET_RTX_CLASS (true_code) == '<';
int comparison_p = COMPARISON_P (cond);
rtx temp;
int i;
enum rtx_code false_code;
@ -4710,11 +4699,9 @@ simplify_if_then_else (rtx x)
|| (CONSTANT_P (true_rtx)
&& GET_CODE (false_rtx) != CONST_INT && false_rtx != pc_rtx)
|| true_rtx == const0_rtx
|| (GET_RTX_CLASS (GET_CODE (true_rtx)) == 'o'
&& GET_RTX_CLASS (GET_CODE (false_rtx)) != 'o')
|| (GET_CODE (true_rtx) == SUBREG
&& GET_RTX_CLASS (GET_CODE (SUBREG_REG (true_rtx))) == 'o'
&& GET_RTX_CLASS (GET_CODE (false_rtx)) != 'o')
|| (OBJECT_P (true_rtx) && !OBJECT_P (false_rtx))
|| (GET_CODE (true_rtx) == SUBREG && OBJECT_P (SUBREG_REG (true_rtx))
&& !OBJECT_P (false_rtx))
|| reg_mentioned_p (true_rtx, false_rtx)
|| rtx_equal_p (false_rtx, XEXP (cond, 0))))
{
@ -4731,7 +4718,7 @@ simplify_if_then_else (rtx x)
/* It is possible that the conditional has been simplified out. */
true_code = GET_CODE (cond);
comparison_p = GET_RTX_CLASS (true_code) == '<';
comparison_p = COMPARISON_P (cond);
}
/* If the two arms are identical, we don't need the comparison. */
@ -4984,7 +4971,7 @@ simplify_set (rtx x)
|| CC0_P (dest))
&& (cc_use = find_single_use (dest, subst_insn, &other_insn)) != 0
&& (undobuf.other_insn == 0 || other_insn == undobuf.other_insn)
&& GET_RTX_CLASS (GET_CODE (*cc_use)) == '<'
&& COMPARISON_P (*cc_use)
&& rtx_equal_p (XEXP (*cc_use, 0), dest))
{
enum rtx_code old_code = GET_CODE (*cc_use);
@ -5147,7 +5134,7 @@ simplify_set (rtx x)
as long as M1 and M2 have the same number of words. */
if (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)
&& GET_RTX_CLASS (GET_CODE (SUBREG_REG (src))) != 'o'
&& !OBJECT_P (SUBREG_REG (src))
&& (((GET_MODE_SIZE (GET_MODE (src)) + (UNITS_PER_WORD - 1))
/ UNITS_PER_WORD)
== ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
@ -5351,9 +5338,8 @@ simplify_logical (rtx x, int last)
if (GET_CODE (x) != AND)
return x;
if (GET_RTX_CLASS (GET_CODE (x)) == 'c'
|| GET_RTX_CLASS (GET_CODE (x)) == '2')
op0 = XEXP (x, 0), op1 = XEXP (x, 1);
op0 = XEXP (x, 0);
op1 = XEXP (x, 1);
}
/* Convert (A | B) & A to A. */
@ -5548,7 +5534,7 @@ simplify_logical (rtx x, int last)
comparison if STORE_FLAG_VALUE is 1. */
if (STORE_FLAG_VALUE == 1
&& op1 == const1_rtx
&& GET_RTX_CLASS (GET_CODE (op0)) == '<'
&& COMPARISON_P (op0)
&& (reversed = reversed_comparison (op0, mode, XEXP (op0, 0),
XEXP (op0, 1))))
return reversed;
@ -5570,7 +5556,7 @@ simplify_logical (rtx x, int last)
&& ((STORE_FLAG_VALUE & GET_MODE_MASK (mode))
== (unsigned HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1))
&& op1 == const_true_rtx
&& GET_RTX_CLASS (GET_CODE (op0)) == '<'
&& COMPARISON_P (op0)
&& (reversed = reversed_comparison (op0, mode, XEXP (op0, 0),
XEXP (op0, 1))))
return reversed;
@ -5734,7 +5720,7 @@ expand_compound_operation (rtx x)
than HOST_WIDE_INT. */
if (GET_CODE (XEXP (x, 0)) == TRUNCATE
&& GET_MODE (XEXP (XEXP (x, 0), 0)) == GET_MODE (x)
&& GET_RTX_CLASS (GET_CODE (XEXP (XEXP (x, 0), 0))) == '<'
&& COMPARISON_P (XEXP (XEXP (x, 0), 0))
&& (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
<= HOST_BITS_PER_WIDE_INT)
&& ((HOST_WIDE_INT) STORE_FLAG_VALUE
@ -5745,7 +5731,7 @@ expand_compound_operation (rtx x)
if (GET_CODE (XEXP (x, 0)) == SUBREG
&& GET_MODE (SUBREG_REG (XEXP (x, 0))) == GET_MODE (x)
&& subreg_lowpart_p (XEXP (x, 0))
&& GET_RTX_CLASS (GET_CODE (SUBREG_REG (XEXP (x, 0)))) == '<'
&& COMPARISON_P (SUBREG_REG (XEXP (x, 0)))
&& (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
<= HOST_BITS_PER_WIDE_INT)
&& ((HOST_WIDE_INT) STORE_FLAG_VALUE
@ -6426,7 +6412,7 @@ make_compound_operation (rtx x, enum rtx_code in_code)
but once inside, go back to our default of SET. */
next_code = (code == MEM || code == PLUS || code == MINUS ? MEM
: ((code == COMPARE || GET_RTX_CLASS (code) == '<')
: ((code == COMPARE || COMPARISON_P (x))
&& XEXP (x, 1) == const0_rtx) ? COMPARE
: in_code == COMPARE ? SET : in_code);
@ -6592,9 +6578,9 @@ make_compound_operation (rtx x, enum rtx_code in_code)
also do this for some cases of SIGN_EXTRACT, but it doesn't
seem worth the effort; the case checked for occurs on Alpha. */
if (GET_RTX_CLASS (GET_CODE (lhs)) != 'o'
if (!OBJECT_P (lhs)
&& ! (GET_CODE (lhs) == SUBREG
&& (GET_RTX_CLASS (GET_CODE (SUBREG_REG (lhs))) == 'o'))
&& (OBJECT_P (SUBREG_REG (lhs))))
&& GET_CODE (rhs) == CONST_INT
&& INTVAL (rhs) < HOST_BITS_PER_WIDE_INT
&& (new = extract_left_shift (lhs, INTVAL (rhs))) != 0)
@ -7277,7 +7263,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse)
/* If this is a unary operation whose operand has one of two values, apply
our opcode to compute those values. */
else if (GET_RTX_CLASS (code) == '1'
else if (UNARY_P (x)
&& (cond0 = if_then_else_cond (XEXP (x, 0), &true0, &false0)) != 0)
{
*ptrue = simplify_gen_unary (code, mode, true0, GET_MODE (XEXP (x, 0)));
@ -7294,8 +7280,7 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse)
/* If this is a binary operation, see if either side has only one of two
values. If either one does or if both do and they are conditional on
the same value, compute the new true and false values. */
else if (GET_RTX_CLASS (code) == 'c' || GET_RTX_CLASS (code) == '2'
|| GET_RTX_CLASS (code) == '<')
else if (BINARY_P (x))
{
cond0 = if_then_else_cond (XEXP (x, 0), &true0, &false0);
cond1 = if_then_else_cond (XEXP (x, 1), &true1, &false1);
@ -7331,8 +7316,8 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse)
cond0 = XEXP (XEXP (x, 0), 0);
cond1 = XEXP (XEXP (x, 1), 0);
if (GET_RTX_CLASS (GET_CODE (cond0)) == '<'
&& GET_RTX_CLASS (GET_CODE (cond1)) == '<'
if (COMPARISON_P (cond0)
&& COMPARISON_P (cond1)
&& ((GET_CODE (cond0) == combine_reversed_comparison_code (cond1)
&& rtx_equal_p (XEXP (cond0, 0), XEXP (cond1, 0))
&& rtx_equal_p (XEXP (cond0, 1), XEXP (cond1, 1)))
@ -7362,8 +7347,8 @@ if_then_else_cond (rtx x, rtx *ptrue, rtx *pfalse)
cond0 = XEXP (XEXP (x, 0), 0);
cond1 = XEXP (XEXP (x, 1), 0);
if (GET_RTX_CLASS (GET_CODE (cond0)) == '<'
&& GET_RTX_CLASS (GET_CODE (cond1)) == '<'
if (COMPARISON_P (cond0)
&& COMPARISON_P (cond1)
&& ((GET_CODE (cond0) == combine_reversed_comparison_code (cond1)
&& rtx_equal_p (XEXP (cond0, 0), XEXP (cond1, 0))
&& rtx_equal_p (XEXP (cond0, 1), XEXP (cond1, 1)))
@ -7497,14 +7482,14 @@ known_cond (rtx x, enum rtx_code cond, rtx reg, rtx val)
/* The only other cases we handle are MIN, MAX, and comparisons if the
operands are the same as REG and VAL. */
else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == 'c')
else if (COMPARISON_P (x) || COMMUTATIVE_ARITH_P (x))
{
if (rtx_equal_p (XEXP (x, 0), val))
cond = swap_condition (cond), temp = val, val = reg, reg = temp;
if (rtx_equal_p (XEXP (x, 0), reg) && rtx_equal_p (XEXP (x, 1), val))
{
if (GET_RTX_CLASS (code) == '<')
if (COMPARISON_P (x))
{
if (comparison_dominates_p (cond, code))
return const_true_rtx;
@ -7796,8 +7781,7 @@ apply_distributive_law (rtx x)
/* If either operand is a primitive we can't do anything, so get out
fast. */
if (GET_RTX_CLASS (GET_CODE (lhs)) == 'o'
|| GET_RTX_CLASS (GET_CODE (rhs)) == 'o')
if (OBJECT_P (lhs) || OBJECT_P (rhs))
return x;
lhs = expand_compound_operation (lhs);
@ -7859,15 +7843,15 @@ apply_distributive_law (rtx x)
/* Set LHS and RHS to the inner operands (A and B in the example
above) and set OTHER to the common operand (C in the example).
These is only one way to do this unless the inner operation is
There is only one way to do this unless the inner operation is
commutative. */
if (GET_RTX_CLASS (inner_code) == 'c'
if (COMMUTATIVE_ARITH_P (lhs)
&& rtx_equal_p (XEXP (lhs, 0), XEXP (rhs, 0)))
other = XEXP (lhs, 0), lhs = XEXP (lhs, 1), rhs = XEXP (rhs, 1);
else if (GET_RTX_CLASS (inner_code) == 'c'
else if (COMMUTATIVE_ARITH_P (lhs)
&& rtx_equal_p (XEXP (lhs, 0), XEXP (rhs, 1)))
other = XEXP (lhs, 0), lhs = XEXP (lhs, 1), rhs = XEXP (rhs, 0);
else if (GET_RTX_CLASS (inner_code) == 'c'
else if (COMMUTATIVE_ARITH_P (lhs)
&& rtx_equal_p (XEXP (lhs, 1), XEXP (rhs, 0)))
other = XEXP (lhs, 1), lhs = XEXP (lhs, 0), rhs = XEXP (rhs, 1);
else if (rtx_equal_p (XEXP (lhs, 1), XEXP (rhs, 1)))
@ -8036,8 +8020,7 @@ cached_nonzero_bits (rtx x, enum machine_mode mode, rtx known_x,
nonzero_bits1 on X with the subexpressions as KNOWN_X and the
precomputed value for the subexpression as KNOWN_RET. */
if (GET_RTX_CLASS (GET_CODE (x)) == '2'
|| GET_RTX_CLASS (GET_CODE (x)) == 'c')
if (ARITHMETIC_P (x))
{
rtx x0 = XEXP (x, 0);
rtx x1 = XEXP (x, 1);
@ -8048,14 +8031,12 @@ cached_nonzero_bits (rtx x, enum machine_mode mode, rtx known_x,
nonzero_bits_with_known (x0, mode));
/* Check the second level. */
if ((GET_RTX_CLASS (GET_CODE (x0)) == '2'
|| GET_RTX_CLASS (GET_CODE (x0)) == 'c')
if (ARITHMETIC_P (x0)
&& (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
return nonzero_bits1 (x, mode, x1, mode,
nonzero_bits_with_known (x1, mode));
if ((GET_RTX_CLASS (GET_CODE (x1)) == '2'
|| GET_RTX_CLASS (GET_CODE (x1)) == 'c')
if (ARITHMETIC_P (x1)
&& (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
return nonzero_bits1 (x, mode, x0, mode,
nonzero_bits_with_known (x0, mode));
@ -8565,8 +8546,7 @@ cached_num_sign_bit_copies (rtx x, enum machine_mode mode, rtx known_x,
num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
the precomputed value for the subexpression as KNOWN_RET. */
if (GET_RTX_CLASS (GET_CODE (x)) == '2'
|| GET_RTX_CLASS (GET_CODE (x)) == 'c')
if (ARITHMETIC_P (x))
{
rtx x0 = XEXP (x, 0);
rtx x1 = XEXP (x, 1);
@ -8578,15 +8558,13 @@ cached_num_sign_bit_copies (rtx x, enum machine_mode mode, rtx known_x,
num_sign_bit_copies_with_known (x0, mode));
/* Check the second level. */
if ((GET_RTX_CLASS (GET_CODE (x0)) == '2'
|| GET_RTX_CLASS (GET_CODE (x0)) == 'c')
if (ARITHMETIC_P (x0)
&& (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
return
num_sign_bit_copies1 (x, mode, x1, mode,
num_sign_bit_copies_with_known (x1, mode));
if ((GET_RTX_CLASS (GET_CODE (x1)) == '2'
|| GET_RTX_CLASS (GET_CODE (x1)) == 'c')
if (ARITHMETIC_P (x1)
&& (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
return
num_sign_bit_copies1 (x, mode, x0, mode,
@ -9801,7 +9779,7 @@ simplify_shift_const (rtx x, enum rtx_code code,
If we were passed a value for X, see if we can use any pieces of
it. If not, make new rtx. */
if (x && GET_RTX_CLASS (GET_CODE (x)) == '2'
if (x && GET_RTX_CLASS (GET_CODE (x)) == RTX_BIN_ARITH
&& GET_CODE (XEXP (x, 1)) == CONST_INT
&& (unsigned HOST_WIDE_INT) INTVAL (XEXP (x, 1)) == count)
const_rtx = XEXP (x, 1);
@ -9860,7 +9838,7 @@ simplify_shift_const (rtx x, enum rtx_code code,
/* This means that we have determined that the result is
equivalent to a constant. This should be rare. */
x = GEN_INT (outer_const);
else if (GET_RTX_CLASS (outer_op) == '1')
else if (GET_RTX_CLASS (outer_op) == RTX_UNARY)
x = simplify_gen_unary (outer_op, result_mode, x, result_mode);
else
x = gen_binary (outer_op, result_mode, x, GEN_INT (outer_const));
@ -10069,7 +10047,7 @@ gen_lowpart_for_combine (enum machine_mode mode, rtx x)
/* If X is a comparison operator, rewrite it in a new mode. This
probably won't match, but may allow further simplifications. */
else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
else if (COMPARISON_P (x))
return gen_rtx_fmt_ee (GET_CODE (x), mode, XEXP (x, 0), XEXP (x, 1));
/* If we couldn't simplify X any other way, just enclose it in a
@ -10110,11 +10088,12 @@ gen_binary (enum rtx_code code, enum machine_mode mode, rtx op0, rtx op1)
else if (GET_CODE (op1) == CLOBBER)
return op1;
if (GET_RTX_CLASS (code) == 'c'
if (GET_RTX_CLASS (code) == RTX_COMM_ARITH
&& swap_commutative_operands_p (op0, op1))
tem = op0, op0 = op1, op1 = tem;
if (GET_RTX_CLASS (code) == '<')
if (GET_RTX_CLASS (code) == RTX_COMPARE
|| GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
{
enum machine_mode op_mode = GET_MODE (op0);
@ -10138,7 +10117,7 @@ gen_binary (enum rtx_code code, enum machine_mode mode, rtx op0, rtx op1)
return result;
/* Put complex operands first and constants second. */
if (GET_RTX_CLASS (code) == 'c'
if (GET_RTX_CLASS (code) == RTX_COMM_ARITH
&& swap_commutative_operands_p (op0, op1))
return gen_rtx_fmt_ee (code, mode, op1, op0);
@ -10338,8 +10317,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
if (GET_MODE_CLASS (mode) != MODE_INT
&& ! (mode == VOIDmode
&& (GET_CODE (op0) == COMPARE
|| GET_RTX_CLASS (GET_CODE (op0)) == '<')))
&& (GET_CODE (op0) == COMPARE || COMPARISON_P (op0))))
break;
/* Get the constant we are comparing against and turn off all bits
@ -10914,9 +10892,9 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1)
mask = ((INTVAL (XEXP (op0, 1)) & GET_MODE_MASK (mode))
<< INTVAL (XEXP (XEXP (op0, 0), 1)));
if ((~STORE_FLAG_VALUE & mask) == 0
&& (GET_RTX_CLASS (GET_CODE (XEXP (XEXP (op0, 0), 0))) == '<'
&& (COMPARISON_P (XEXP (XEXP (op0, 0), 0))
|| ((tem = get_last_value (XEXP (XEXP (op0, 0), 0))) != 0
&& GET_RTX_CLASS (GET_CODE (tem)) == '<')))
&& COMPARISON_P (tem))))
{
op0 = XEXP (XEXP (op0, 0), 0);
continue;
@ -11396,9 +11374,7 @@ update_table_tick (rtx x)
/* Check for identical subexpressions. If x contains
identical subexpression we only have to traverse one of
them. */
if (i == 0
&& (GET_RTX_CLASS (code) == '2'
|| GET_RTX_CLASS (code) == 'c'))
if (i == 0 && ARITHMETIC_P (x))
{
/* Note that at this point x1 has already been
processed. */
@ -11413,15 +11389,13 @@ update_table_tick (rtx x)
/* If x0 is identical to a subexpression of x1 then while
processing x1, x0 has already been processed. Thus we
are done with x. */
if ((GET_RTX_CLASS (GET_CODE (x1)) == '2'
|| GET_RTX_CLASS (GET_CODE (x1)) == 'c')
if (ARITHMETIC_P (x1)
&& (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
break;
/* If x1 is identical to a subexpression of x0 then we
still have to process the rest of x0. */
if ((GET_RTX_CLASS (GET_CODE (x0)) == '2'
|| GET_RTX_CLASS (GET_CODE (x0)) == 'c')
if (ARITHMETIC_P (x0)
&& (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
{
update_table_tick (XEXP (x0, x1 == XEXP (x0, 0) ? 1 : 0));
@ -11464,8 +11438,7 @@ record_value_for_reg (rtx reg, rtx insn, rtx value)
if (tem)
{
if ((GET_RTX_CLASS (GET_CODE (tem)) == '2'
|| GET_RTX_CLASS (GET_CODE (tem)) == 'c')
if (ARITHMETIC_P (tem)
&& GET_CODE (XEXP (tem, 0)) == CLOBBER
&& GET_CODE (XEXP (tem, 1)) == CLOBBER)
tem = XEXP (tem, 0);
@ -11775,9 +11748,7 @@ get_last_value_validate (rtx *loc, rtx insn, int tick, int replace)
/* Check for identical subexpressions. If x contains
identical subexpression we only have to traverse one of
them. */
if (i == 1
&& (GET_RTX_CLASS (GET_CODE (x)) == '2'
|| GET_RTX_CLASS (GET_CODE (x)) == 'c'))
if (i == 1 && ARITHMETIC_P (x))
{
/* Note that at this point x0 has already been checked
and found valid. */
@ -11791,15 +11762,13 @@ get_last_value_validate (rtx *loc, rtx insn, int tick, int replace)
/* If x1 is identical to a subexpression of x0 then
while checking x0, x1 has already been checked. Thus
it is valid and so as x. */
if ((GET_RTX_CLASS (GET_CODE (x0)) == '2'
|| GET_RTX_CLASS (GET_CODE (x0)) == 'c')
if (ARITHMETIC_P (x0)
&& (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
return 1;
/* If x0 is identical to a subexpression of x1 then x is
valid iff the rest of x1 is valid. */
if ((GET_RTX_CLASS (GET_CODE (x1)) == '2'
|| GET_RTX_CLASS (GET_CODE (x1)) == 'c')
if (ARITHMETIC_P (x1)
&& (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
return
get_last_value_validate (&XEXP (x1,

8
gcc/config/alpha/alpha.c
View File

@ -1134,13 +1134,13 @@ alpha_zero_comparison_operator (rtx op, enum machine_mode mode)
int
alpha_swapped_comparison_operator (rtx op, enum machine_mode mode)
{
enum rtx_code code = GET_CODE (op);
enum rtx_code code;
if ((mode != GET_MODE (op) && mode != VOIDmode)
|| GET_RTX_CLASS (code) != '<')
|| COMPARISON_P (op));
return 0;
code = swap_condition (code);
code = swap_condition (GET_CODE (op));
return (code == EQ || code == LE || code == LT
|| code == LEU || code == LTU);
}
@ -5637,7 +5637,7 @@ print_operand (FILE *file, rtx x, int code)
{
enum rtx_code c = GET_CODE (x);
if (GET_RTX_CLASS (c) != '<')
if (!COMPARISON_P (x))
output_operand_lossage ("invalid %%C value");
else if (code == 'D')

6
gcc/config/arc/arc.c
View File

@ -709,11 +709,11 @@ const_uint32_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
int
proper_comparison_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
enum rtx_code code = GET_CODE (op);
if (GET_RTX_CLASS (code) != '<')
enum rtx_code code;
if (!COMPARISON_P (op))
return 0;
code = GET_CODE (op);
if (GET_MODE (XEXP (op, 0)) == CCZNmode)
return (code == EQ || code == NE);
if (GET_MODE (XEXP (op, 0)) == CCZNCmode)

17
gcc/config/arm/arm.c
View File

@ -3938,13 +3938,10 @@ arm_arm_address_cost (rtx x)
if (c == PLUS || c == MINUS)
{
char cl0 = GET_RTX_CLASS (GET_CODE (XEXP (x, 0)));
char cl1 = GET_RTX_CLASS (GET_CODE (XEXP (x, 1)));
if (GET_CODE (XEXP (x, 0)) == CONST_INT)
return 2;
if (cl0 == '2' || cl0 == 'c' || cl1 == '2' || cl1 == 'c')
if (ARITHMETIC_P (XEXP (x, 0)) || ARITHMETIC_P (XEXP (x, 1)))
return 3;
return 4;
@ -6175,21 +6172,21 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y)
if (GET_CODE (x) == IF_THEN_ELSE
&& (XEXP (x, 2) == const0_rtx
|| XEXP (x, 2) == const1_rtx)
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) == '<')
&& COMPARISON_P (XEXP (x, 0))
&& COMPARISON_P (XEXP (x, 1)))
return arm_select_dominance_cc_mode (XEXP (x, 0), XEXP (x, 1),
INTVAL (XEXP (x, 2)));
/* Alternate canonicalizations of the above. These are somewhat cleaner. */
if (GET_CODE (x) == AND
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) == '<')
&& COMPARISON_P (XEXP (x, 0))
&& COMPARISON_P (XEXP (x, 1)))
return arm_select_dominance_cc_mode (XEXP (x, 0), XEXP (x, 1),
DOM_CC_X_AND_Y);
if (GET_CODE (x) == IOR
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == '<'
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) == '<')
&& COMPARISON_P (XEXP (x, 0))
&& COMPARISON_P (XEXP (x, 1)))
return arm_select_dominance_cc_mode (XEXP (x, 0), XEXP (x, 1),
DOM_CC_X_OR_Y);

21
gcc/config/avr/avr.c
View File

@ -4251,6 +4251,7 @@ _reg_unused_after (rtx insn, rtx reg)
while ((insn = NEXT_INSN (insn)))
{
rtx set;
code = GET_CODE (insn);
#if 0
@ -4263,6 +4264,9 @@ _reg_unused_after (rtx insn, rtx reg)
/* else */
#endif
if (!INSN_P (insn))
continue;
if (code == JUMP_INSN)
return 0;
@ -4320,17 +4324,14 @@ _reg_unused_after (rtx insn, rtx reg)
return 1;
}
if (GET_RTX_CLASS (code) == 'i')
{
rtx set = single_set (insn);
set = single_set (insn);
if (set && reg_overlap_mentioned_p (reg, SET_SRC (set)))
return 0;
if (set && reg_overlap_mentioned_p (reg, SET_DEST (set)))
return GET_CODE (SET_DEST (set)) != MEM;
if (set == 0 && reg_overlap_mentioned_p (reg, PATTERN (insn)))
return 0;
}
if (set && reg_overlap_mentioned_p (reg, SET_SRC (set)))
return 0;
if (set && reg_overlap_mentioned_p (reg, SET_DEST (set)))
return GET_CODE (SET_DEST (set)) != MEM;
if (set == 0 && reg_overlap_mentioned_p (reg, PATTERN (insn)))
return 0;
}
return 1;
}

10
gcc/config/frv/frv.c
View File

@ -6831,7 +6831,7 @@ frv_ifcvt_modify_tests (ce_if_block_t *ce_info, rtx *p_true, rtx *p_false)
else if (CR_P (regno)
&& (src_code == IF_THEN_ELSE
|| GET_RTX_CLASS (src_code) == '<'))
|| COMPARISON_P (src)))
skip_nested_if = TRUE;
}
}
@ -7371,9 +7371,7 @@ frv_ifcvt_modify_insn (ce_if_block_t *ce_info,
enum machine_mode mode = GET_MODE (dest);
/* Check for normal binary operators. */
if (mode == SImode
&& (GET_RTX_CLASS (GET_CODE (src)) == '2'
|| GET_RTX_CLASS (GET_CODE (src)) == 'c'))
if (mode == SImode && ARITHMETIC_P (src))
{
op0 = XEXP (src, 0);
op1 = XEXP (src, 1);
@ -7486,7 +7484,7 @@ frv_ifcvt_modify_insn (ce_if_block_t *ce_info,
/* Rewrite a nested set cccr in terms of IF_THEN_ELSE. Also deal with
rewriting the CC register to be the same as the paired CC/CR register
for nested ifs. */
else if (mode == CC_CCRmode && GET_RTX_CLASS (GET_CODE (src)) == '<')
else if (mode == CC_CCRmode && COMPARISON_P (src))
{
int regno = REGNO (XEXP (src, 0));
rtx if_else;
@ -8830,7 +8828,7 @@ frv_pack_insns (void)
}
/* Things like labels reset everything. */
if (GET_RTX_CLASS (code) != 'i')
if (!INSN_P (insn))
{
next_start_vliw_p = TRUE;
continue;

23
gcc/config/i386/i386.c
View File

@ -4006,7 +4006,7 @@ ix86_comparison_operator (rtx op, enum machine_mode mode)
enum rtx_code code = GET_CODE (op);
if (mode != VOIDmode && GET_MODE (op) != mode)
return 0;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return 0;
inmode = GET_MODE (XEXP (op, 0));
@ -4048,7 +4048,7 @@ ix86_carry_flag_operator (rtx op, enum machine_mode mode)
if (mode != VOIDmode && GET_MODE (op) != mode)
return 0;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return 0;
inmode = GET_MODE (XEXP (op, 0));
if (GET_CODE (XEXP (op, 0)) != REG
@ -4080,7 +4080,7 @@ fcmov_comparison_operator (rtx op, enum machine_mode mode)
if (mode != VOIDmode && GET_MODE (op) != mode)
return 0;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return 0;
inmode = GET_MODE (XEXP (op, 0));
if (inmode == CCFPmode || inmode == CCFPUmode)
@ -4199,8 +4199,7 @@ int
arith_or_logical_operator (rtx op, enum machine_mode mode)
{
return ((mode == VOIDmode || GET_MODE (op) == mode)
&& (GET_RTX_CLASS (GET_CODE (op)) == 'c'
|| GET_RTX_CLASS (GET_CODE (op)) == '2'));
&& ARITHMETIC_P (op));
}
/* Returns 1 if OP is memory operand with a displacement. */
@ -7416,7 +7415,7 @@ print_operand (FILE *file, rtx x, int code)
case 'c':
/* Check to see if argument to %c is really a constant
and not a condition code which needs to be reversed. */
if (GET_RTX_CLASS (GET_CODE (x)) != '<')
if (!COMPARISON_P (x))
{
output_operand_lossage ("operand is neither a constant nor a condition code, invalid operand code 'c'");
return;
@ -8439,7 +8438,7 @@ ix86_expand_binary_operator (enum rtx_code code, enum machine_mode mode,
src2 = operands[2];
/* Recognize <var1> = <value> <op> <var1> for commutative operators */
if (GET_RTX_CLASS (code) == 'c'
if (GET_RTX_CLASS (code) == RTX_COMM_ARITH
&& (rtx_equal_p (dst, src2)
|| immediate_operand (src1, mode)))
{
@ -8455,7 +8454,7 @@ ix86_expand_binary_operator (enum rtx_code code, enum machine_mode mode,
{
if (rtx_equal_p (dst, src1))
matching_memory = 1;
else if (GET_RTX_CLASS (code) == 'c'
else if (GET_RTX_CLASS (code) == RTX_COMM_ARITH
&& rtx_equal_p (dst, src2))
matching_memory = 2;
else
@ -8475,7 +8474,7 @@ ix86_expand_binary_operator (enum rtx_code code, enum machine_mode mode,
or non-matching memory. */
if ((CONSTANT_P (src1)
|| (!matching_memory && GET_CODE (src1) == MEM))
&& GET_RTX_CLASS (code) != 'c')
&& GET_RTX_CLASS (code) != RTX_COMM_ARITH)
src1 = force_reg (mode, src1);
/* If optimizing, copy to regs to improve CSE */
@ -8523,18 +8522,18 @@ ix86_binary_operator_ok (enum rtx_code code,
if (GET_CODE (operands[1]) == MEM && GET_CODE (operands[2]) == MEM)
return 0;
/* If the operation is not commutable, source 1 cannot be a constant. */
if (CONSTANT_P (operands[1]) && GET_RTX_CLASS (code) != 'c')
if (CONSTANT_P (operands[1]) && GET_RTX_CLASS (code) != RTX_COMM_ARITH)
return 0;
/* If the destination is memory, we must have a matching source operand. */
if (GET_CODE (operands[0]) == MEM
&& ! (rtx_equal_p (operands[0], operands[1])
|| (GET_RTX_CLASS (code) == 'c'
|| (GET_RTX_CLASS (code) == RTX_COMM_ARITH
&& rtx_equal_p (operands[0], operands[2]))))
return 0;
/* If the operation is not commutable and the source 1 is memory, we must
have a matching destination. */
if (GET_CODE (operands[1]) == MEM
&& GET_RTX_CLASS (code) != 'c'
&& GET_RTX_CLASS (code) != RTX_COMM_ARITH
&& ! rtx_equal_p (operands[0], operands[1]))
return 0;
return 1;

28
gcc/config/i386/i386.md
View File

@ -14300,7 +14300,7 @@
[(match_operand:SF 1 "nonimmediate_operand" "%0")
(match_operand:SF 2 "nonimmediate_operand" "fm")]))]
"TARGET_80387 && !TARGET_SSE_MATH
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'
&& COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14315,7 +14315,7 @@
[(match_operand:SF 1 "nonimmediate_operand" "%0,0")
(match_operand:SF 2 "nonimmediate_operand" "fm#x,xm#f")]))]
"TARGET_80387 && TARGET_SSE_MATH && TARGET_MIX_SSE_I387
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'
&& COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14333,7 +14333,7 @@
(match_operator:SF 3 "binary_fp_operator"
[(match_operand:SF 1 "nonimmediate_operand" "%0")
(match_operand:SF 2 "nonimmediate_operand" "xm")]))]
"TARGET_SSE_MATH && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'
"TARGET_SSE_MATH && COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14348,7 +14348,7 @@
[(match_operand:DF 1 "nonimmediate_operand" "%0")
(match_operand:DF 2 "nonimmediate_operand" "fm")]))]
"TARGET_80387 && (!TARGET_SSE2 || !TARGET_SSE_MATH)
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'
&& COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14363,7 +14363,7 @@
[(match_operand:DF 1 "nonimmediate_operand" "%0,0")
(match_operand:DF 2 "nonimmediate_operand" "fm#Y,Ym#f")]))]
"TARGET_80387 && TARGET_SSE_MATH && TARGET_SSE2 && TARGET_MIX_SSE_I387
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'
&& COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14382,7 +14382,7 @@
[(match_operand:DF 1 "nonimmediate_operand" "%0")
(match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
"TARGET_SSE2 && TARGET_SSE_MATH
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'
&& COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14397,7 +14397,7 @@
[(match_operand:XF 1 "register_operand" "%0")
(match_operand:XF 2 "register_operand" "f")]))]
"TARGET_80387
&& GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
&& COMMUTATIVE_ARITH_P (operands[3])"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
(if_then_else (match_operand:XF 3 "mult_operator" "")
@ -14411,7 +14411,7 @@
[(match_operand:SF 1 "nonimmediate_operand" "0,fm")
(match_operand:SF 2 "nonimmediate_operand" "fm,0")]))]
"TARGET_80387 && !TARGET_SSE_MATH
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& !COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14429,7 +14429,7 @@
[(match_operand:SF 1 "nonimmediate_operand" "0,fm,0")
(match_operand:SF 2 "nonimmediate_operand" "fm,0,xm#f")]))]
"TARGET_80387 && TARGET_SSE_MATH && TARGET_MIX_SSE_I387
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& !COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14455,7 +14455,7 @@
[(match_operand:SF 1 "register_operand" "0")
(match_operand:SF 2 "nonimmediate_operand" "xm")]))]
"TARGET_SSE_MATH
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
&& !COMMUTATIVE_ARITH_P (operands[3])"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
(cond [(match_operand:SF 3 "mult_operator" "")
@ -14509,7 +14509,7 @@
[(match_operand:DF 1 "nonimmediate_operand" "0,fm")
(match_operand:DF 2 "nonimmediate_operand" "fm,0")]))]
"TARGET_80387 && (!TARGET_SSE2 || !TARGET_SSE_MATH)
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& !COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14528,7 +14528,7 @@
[(match_operand:DF 1 "nonimmediate_operand" "0,fm,0")
(match_operand:DF 2 "nonimmediate_operand" "fm,0,Ym#f")]))]
"TARGET_80387 && TARGET_SSE2 && TARGET_SSE_MATH && TARGET_MIX_SSE_I387
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
&& !COMMUTATIVE_ARITH_P (operands[3])
&& (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
@ -14554,7 +14554,7 @@
[(match_operand:DF 1 "register_operand" "0")
(match_operand:DF 2 "nonimmediate_operand" "Ym")]))]
"TARGET_SSE2 && TARGET_SSE_MATH
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
&& !COMMUTATIVE_ARITH_P (operands[3])"
"* return output_387_binary_op (insn, operands);"
[(set_attr "mode" "DF")
(set (attr "type")
@ -14660,7 +14660,7 @@
[(match_operand:XF 1 "register_operand" "0,f")
(match_operand:XF 2 "register_operand" "f,0")]))]
"TARGET_80387
&& GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
&& !COMMUTATIVE_ARITH_P (operands[3])"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
(cond [(match_operand:XF 3 "mult_operator" "")

10
gcc/config/ia64/ia64.c
View File

@ -863,7 +863,7 @@ int
not_postinc_memory_operand (rtx op, enum machine_mode mode)
{
return (memory_operand (op, mode)
&& GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != 'a');
&& GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC);
}
/* Return 1 if this is a comparison operator, which accepts a normal 8-bit
@ -4356,7 +4356,7 @@ ia64_print_operand (FILE * file, rtx x, int code)
case MEM:
{
rtx addr = XEXP (x, 0);
if (GET_RTX_CLASS (GET_CODE (addr)) == 'a')
if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
addr = XEXP (addr, 0);
fprintf (file, "[%s]", reg_names [REGNO (addr)]);
break;
@ -5159,7 +5159,7 @@ update_set_flags (rtx x, struct reg_flags *pflags, int *ppred, rtx *pcond)
/* ... fall through ... */
default:
if (GET_RTX_CLASS (GET_CODE (src)) == '<'
if (COMPARISON_P (src)
&& GET_MODE_CLASS (GET_MODE (XEXP (src, 0))) == MODE_FLOAT)
/* Set pflags->is_fp to 1 so that we know we're dealing
with a floating point comparison when processing the
@ -5883,8 +5883,8 @@ errata_emit_nops (rtx insn)
|| GET_CODE (XEXP (SET_SRC (set), 0)) != POST_MODIFY)
&& GENERAL_REGNO_P (REGNO (SET_DEST (set))))
{
if (GET_RTX_CLASS (GET_CODE (cond)) != '<'
|| ! REG_P (XEXP (cond, 0)))
if (!COMPARISON_P (cond)
|| !REG_P (XEXP (cond, 0)))
abort ();
if (TEST_HARD_REG_BIT (prev_group->p_reg_set, REGNO (XEXP (cond, 0))))

8
gcc/config/ia64/ia64.h
View File

@ -1021,7 +1021,7 @@ enum reg_class
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
(CLASS == FR_REGS && GET_CODE (X) == MEM && MEM_VOLATILE_P (X) ? NO_REGS \
: CLASS == FR_REGS && GET_CODE (X) == CONST_DOUBLE ? NO_REGS \
: GET_RTX_CLASS (GET_CODE (X)) != 'o' \
: !OBJECT_P (X) \
&& (CLASS == AR_M_REGS || CLASS == AR_I_REGS) ? NO_REGS \
: CLASS)
@ -1124,9 +1124,9 @@ enum reg_class
#define CONSTRAINT_OK_FOR_R(VALUE) \
(GET_CODE (VALUE) == CONST_INT && INTVAL (VALUE) >= 1 && INTVAL (VALUE) <= 4)
/* Non-post-inc memory for asms and other unsavory creatures. */
#define CONSTRAINT_OK_FOR_S(VALUE) \
(GET_CODE (VALUE) == MEM \
&& GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != 'a' \
#define CONSTRAINT_OK_FOR_S(VALUE) \
(GET_CODE (VALUE) == MEM \
&& GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != RTX_AUTOINC \
&& (reload_in_progress || memory_operand ((VALUE), VOIDmode)))
/* Symbol ref to small-address-area: */
#define CONSTRAINT_OK_FOR_T(VALUE) \

65
gcc/config/ip2k/ip2k.c
View File

@ -3428,7 +3428,7 @@ mdr_resequence_xy_yx (first_insn)
appropriate, try to do the same thing with the second operand.
Of course there are fewer operations that can match here
because they must be commutative. */
if (GET_RTX_CLASS (GET_CODE (XEXP (set, 1))) == 'c'
if (GET_RTX_CLASS (GET_CODE (XEXP (set, 1))) == RTX_COMM_ARITH
&& (GET_CODE (XEXP (XEXP (set, 1), 1)) == REG
|| GET_CODE (XEXP (XEXP (set, 1), 1)) == MEM)
&& rtx_equal_p (XEXP (set2, 0), XEXP (XEXP (set, 1), 1))
@ -4104,12 +4104,11 @@ mdr_try_move_dp_reload (first_insn)
static int
ip2k_check_can_adjust_stack_ref (rtx x, int offset)
{
if (GET_RTX_CLASS (GET_CODE (x)) == '2'
|| GET_RTX_CLASS (GET_CODE (x)) == 'c')
if (ARITHMETIC_P (x))
return (ip2k_check_can_adjust_stack_ref (XEXP (x, 0), offset)
&& ip2k_check_can_adjust_stack_ref (XEXP (x, 1), offset));
if (GET_RTX_CLASS (GET_CODE (x)) == '1')
if (UNARY_P (x))
return ip2k_check_can_adjust_stack_ref (XEXP (x, 0), offset);
switch (GET_CODE (x))
@ -4150,15 +4149,14 @@ ip2k_check_can_adjust_stack_ref (rtx x, int offset)
static void
ip2k_adjust_stack_ref (rtx *x, int offset)
{
if (GET_RTX_CLASS (GET_CODE (*x)) == '2'
|| GET_RTX_CLASS (GET_CODE (*x)) == 'c')
if (ARITHMETIC_P (*x))
{
ip2k_adjust_stack_ref (&XEXP (*x, 0), offset);
ip2k_adjust_stack_ref (&XEXP (*x, 1), offset);
return;
}
if (GET_RTX_CLASS (GET_CODE (*x)) == '1')
if (UNARY_P (*x))
{
ip2k_adjust_stack_ref (&XEXP (*x, 0), offset);
return;
@ -4642,21 +4640,6 @@ ip2k_xexp_not_uses_reg_for_mem (rtx x, unsigned int regno)
if (regno & 1)
regno &= 0xfffffffe;
if (GET_RTX_CLASS (GET_CODE (x)) == 'b')
return (ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 0), regno)
&& ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 1), regno)
&& ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 2), regno));
if (GET_RTX_CLASS (GET_CODE (x)) == '2'
|| GET_RTX_CLASS (GET_CODE (x)) == 'c'
|| GET_RTX_CLASS (GET_CODE (x)) == '<')
return (ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 0), regno)
&& ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 1), regno));
if (GET_RTX_CLASS (GET_CODE (x)) == '1'
|| GET_RTX_CLASS (GET_CODE (x)) == '3')
return ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 0), regno);
switch (GET_CODE (x))
{
case REG:
@ -4682,6 +4665,19 @@ ip2k_xexp_not_uses_reg_for_mem (rtx x, unsigned int regno)
return 1;
default:
if (GET_RTX_CLASS (GET_CODE (x)) == RTX_BITFIELD_OPS)
return (ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 0), regno)
&& ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 1), regno)
&& ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 2), regno));
if (BINARY_P (x))
return (ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 0), regno)
&& ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 1), regno));
if (UNARY_P (x)
|| GET_RTX_CLASS (GET_CODE (x)) == '3')
return ip2k_xexp_not_uses_reg_for_mem (XEXP (x, 0), regno);
return 0;
}
}
@ -5972,19 +5968,17 @@ ip2k_xexp_not_uses_reg_p (rtx x, unsigned int r, int rsz)
int
ip2k_composite_xexp_not_uses_reg_p (rtx x, unsigned int r, int rsz)
{
if (GET_RTX_CLASS (GET_CODE (x)) == 'b')
if (GET_RTX_CLASS (GET_CODE (x)) == RTX_BITFIELD_OPS)
return (ip2k_composite_xexp_not_uses_reg_p (XEXP (x, 0), r, rsz)
&& ip2k_composite_xexp_not_uses_reg_p (XEXP (x, 1), r, rsz)
&& ip2k_composite_xexp_not_uses_reg_p (XEXP (x, 2), r, rsz));
if (GET_RTX_CLASS (GET_CODE (x)) == '2'
|| GET_RTX_CLASS (GET_CODE (x)) == 'c'
|| GET_RTX_CLASS (GET_CODE (x)) == '<')
if (BINARY_P (x)
return (ip2k_composite_xexp_not_uses_reg_p (XEXP (x, 0), r, rsz)
&& ip2k_composite_xexp_not_uses_reg_p (XEXP (x, 1), r, rsz));
if (GET_RTX_CLASS (GET_CODE (x)) == '1'
|| GET_RTX_CLASS (GET_CODE (x)) == '3')
if (UNARY_P (x)
|| GET_RTX_CLASS (GET_CODE (x)) == RTX_TERNARY)
return ip2k_composite_xexp_not_uses_reg_p (XEXP (x, 0), r, rsz);
return ip2k_xexp_not_uses_reg_p (x, r, rsz);
@ -5996,19 +5990,17 @@ ip2k_composite_xexp_not_uses_reg_p (rtx x, unsigned int r, int rsz)
int
ip2k_composite_xexp_not_uses_cc0_p (rtx x)
{
if (GET_RTX_CLASS (GET_CODE (x)) == 'b')
if (GET_RTX_CLASS (GET_CODE (x)) == RTX_BITFIELD_OPS)
return (ip2k_composite_xexp_not_uses_cc0_p (XEXP (x, 0))
&& ip2k_composite_xexp_not_uses_cc0_p (XEXP (x, 1))
&& ip2k_composite_xexp_not_uses_cc0_p (XEXP (x, 2)));
if (GET_RTX_CLASS (GET_CODE (x)) == '2'
|| GET_RTX_CLASS (GET_CODE (x)) == 'c'
|| GET_RTX_CLASS (GET_CODE (x)) == '<')
if (BINARY_P (x))
return (ip2k_composite_xexp_not_uses_cc0_p (XEXP (x, 0))
&& ip2k_composite_xexp_not_uses_cc0_p (XEXP (x, 1)));
if (GET_RTX_CLASS (GET_CODE (x)) == '1'
|| GET_RTX_CLASS (GET_CODE (x)) == '3')
if (UNARY_P (x)
|| GET_RTX_CLASS (GET_CODE (x)) == RTX_TERNARY)
return ip2k_composite_xexp_not_uses_cc0_p (XEXP (x, 0));
return GET_CODE (x) != CC0;
@ -6158,15 +6150,14 @@ int
ip2k_unary_operator (rtx op, enum machine_mode mode)
{
return ((mode == VOIDmode || GET_MODE (op) == mode)
&& GET_RTX_CLASS (GET_CODE (op)) == '1');
&& UNARY_P (op);
}
int
ip2k_binary_operator (rtx op, enum machine_mode mode)
{
return ((mode == VOIDmode || GET_MODE (op) == mode)
&& (GET_RTX_CLASS (GET_CODE (op)) == 'c'
|| GET_RTX_CLASS (GET_CODE (op)) == '2'));
&& ARITHMETIC_P (op);
}
int

7
gcc/config/iq2000/iq2000.c
View File

@ -357,7 +357,7 @@ cmp_op (rtx op, enum machine_mode mode)
if (mode != GET_MODE (op))
return 0;
return GET_RTX_CLASS (GET_CODE (op)) == '<';
return COMPARISON_P (op);
}
/* Return nonzero if the operand is either the PC or a label_ref. */
@ -2583,11 +2583,10 @@ symbolic_expression_p (rtx x)
if (GET_CODE (x) == CONST)
return symbolic_expression_p (XEXP (x, 0));
if (GET_RTX_CLASS (GET_CODE (x)) == '1')
if (UNARY_P (x))
return symbolic_expression_p (XEXP (x, 0));
if (GET_RTX_CLASS (GET_CODE (x)) == 'c'
|| GET_RTX_CLASS (GET_CODE (x)) == '2')
if (ARITHMETIC_P (x))
return (symbolic_expression_p (XEXP (x, 0))
|| symbolic_expression_p (XEXP (x, 1)));

9
gcc/config/m32r/m32r.c
View File

@ -908,8 +908,6 @@ eqne_comparison_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
enum rtx_code code = GET_CODE (op);
if (GET_RTX_CLASS (code) != '<')
return 0;
return (code == EQ || code == NE);
}
@ -920,10 +918,9 @@ signed_comparison_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
enum rtx_code code = GET_CODE (op);
if (GET_RTX_CLASS (code) != '<')
return 0;
return (code == EQ || code == NE
|| code == LT || code == LE || code == GT || code == GE);
return (COMPARISON_P (op)
&& (code == EQ || code == NE
|| code == LT || code == LE || code == GT || code == GE);
}
/* Return 1 if OP is (mem (reg ...)).

7
gcc/config/mips/mips.c
View File

@ -1465,7 +1465,7 @@ cmp_op (rtx op, enum machine_mode mode)
if (mode != GET_MODE (op))
return 0;
return GET_RTX_CLASS (GET_CODE (op)) == '<';
return COMPARISON_P (op);
}
/* Return nonzero if the code is a relational operation suitable for a
@ -7213,11 +7213,10 @@ symbolic_expression_p (rtx x)
if (GET_CODE (x) == CONST)
return symbolic_expression_p (XEXP (x, 0));
if (GET_RTX_CLASS (GET_CODE (x)) == '1')
if (UNARY_P (x))
return symbolic_expression_p (XEXP (x, 0));
if (GET_RTX_CLASS (GET_CODE (x)) == 'c'
|| GET_RTX_CLASS (GET_CODE (x)) == '2')
if (ARITHMETIC_P (x))
return (symbolic_expression_p (XEXP (x, 0))
|| symbolic_expression_p (XEXP (x, 1)));

6
gcc/config/mmix/mmix.c
View File

@ -2498,7 +2498,7 @@ mmix_foldable_comparison_operator (rtx op, enum machine_mode mode)
if (mode == VOIDmode)
mode = GET_MODE (op);
if (mode == VOIDmode && GET_RTX_CLASS (GET_CODE (op)) == '<')
if (mode == VOIDmode && COMPARISON_P (op))
mode = GET_MODE (XEXP (op, 0));
return ((mode == CCmode || mode == DImode)
@ -2526,13 +2526,13 @@ mmix_comparison_operator (rtx op, enum machine_mode mode)
mode = GET_MODE (op);
/* Get the mode from the first operand if we don't have one. */
if (mode == VOIDmode && GET_RTX_CLASS (GET_CODE (op)) == '<')
if (mode == VOIDmode && COMPARISON_P (op))
mode = GET_MODE (XEXP (op, 0));
/* FIXME: This needs to be kept in sync with the tables in
mmix_output_condition. */
return
(mode == VOIDmode && GET_RTX_CLASS (GET_CODE (op)) == '<')
(mode == VOIDmode && COMPARISON_P (op))
|| (mode == CC_FUNmode
&& (code == ORDERED || code == UNORDERED))
|| (mode == CC_FPmode

2
gcc/config/pa/pa.c
View File

@ -1100,7 +1100,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
&& shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1)))
&& (GET_RTX_CLASS (GET_CODE (XEXP (x, 1))) == 'o'
&& (OBJECT_P (XEXP (x, 1))
|| GET_CODE (XEXP (x, 1)) == SUBREG)
&& GET_CODE (XEXP (x, 1)) != CONST)
{

9
gcc/config/rs6000/rs6000.c
View File

@ -8105,7 +8105,8 @@ stmw_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
static void
validate_condition_mode (enum rtx_code code, enum machine_mode mode)
{
if (GET_RTX_CLASS (code) != '<'
if ((GET_RTX_CLASS (code) != RTX_COMPARE
&& GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
|| GET_MODE_CLASS (mode) != MODE_CC)
abort ();
@ -8149,7 +8150,7 @@ branch_comparison_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
enum rtx_code code = GET_CODE (op);
enum machine_mode cc_mode;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return 0;
cc_mode = GET_MODE (XEXP (op, 0));
@ -8194,7 +8195,7 @@ trap_comparison_operator (rtx op, enum machine_mode mode)
{
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
return GET_RTX_CLASS (GET_CODE (op)) == '<';
return COMPARISON_P (op);
}
int
@ -8574,7 +8575,7 @@ ccr_bit (rtx op, int scc_p)
int base_bit;
rtx reg;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return -1;
reg = XEXP (op, 0);

2
gcc/config/rs6000/rs6000.h
View File

@ -2287,7 +2287,7 @@ do { \
#define SELECT_CC_MODE(OP,X,Y) \
(GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
: (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
: (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
: (((OP) == EQ || (OP) == NE) && COMPARISON_P (X) \
? CCEQmode : CCmode))
/* Can the condition code MODE be safely reversed? This is safe in

4
gcc/config/s390/s390.c
View File

@ -467,7 +467,7 @@ s390_alc_comparison (rtx op, enum machine_mode mode)
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
if (GET_RTX_CLASS (GET_CODE (op)) != '<')
if (!COMPARISON_P (op))
return 0;
if (GET_CODE (XEXP (op, 0)) != REG
@ -509,7 +509,7 @@ s390_slb_comparison (rtx op, enum machine_mode mode)
if (mode != VOIDmode && mode != GET_MODE (op))
return 0;
if (GET_RTX_CLASS (GET_CODE (op)) != '<')
if (!COMPARISON_P (op))
return 0;
if (GET_CODE (XEXP (op, 0)) != REG

23
gcc/config/sh/sh.c
View File

@ -3514,7 +3514,7 @@ gen_block_redirect (rtx jump, int addr, int need_block)
if (INSN_DELETED_P (scan))
continue;
code = GET_CODE (scan);
if (GET_RTX_CLASS (code) == 'i')
if (INSN_P (scan))
{
used |= regs_used (PATTERN (scan), 0);
if (code == CALL_INSN)
@ -7667,6 +7667,10 @@ reg_unused_after (rtx reg, rtx insn)
while ((insn = NEXT_INSN (insn)))
{
rtx set;
if (!INSN_P (insn))
continue;
code = GET_CODE (insn);
#if 0
@ -7723,17 +7727,14 @@ reg_unused_after (rtx reg, rtx insn)
else if (code == JUMP_INSN)
return 0;
}
else if (GET_RTX_CLASS (code) == 'i')
{
rtx set = single_set (insn);
if (set && reg_overlap_mentioned_p (reg, SET_SRC (set)))
return 0;
if (set && reg_overlap_mentioned_p (reg, SET_DEST (set)))
return GET_CODE (SET_DEST (set)) != MEM;
if (set == 0 && reg_overlap_mentioned_p (reg, PATTERN (insn)))
return 0;
}
set = single_set (insn);
if (set && reg_overlap_mentioned_p (reg, SET_SRC (set)))
return 0;
if (set && reg_overlap_mentioned_p (reg, SET_DEST (set)))
return GET_CODE (SET_DEST (set)) != MEM;
if (set == 0 && reg_overlap_mentioned_p (reg, PATTERN (insn)))
return 0;
if (code == CALL_INSN && call_used_regs[REGNO (reg)])
return 1;

28
gcc/config/sparc/sparc.c
View File

@ -958,15 +958,16 @@ eq_or_neq (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
int
normal_comp_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
enum rtx_code code = GET_CODE (op);
enum rtx_code code;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return 0;
if (GET_MODE (XEXP (op, 0)) == CCFPmode
|| GET_MODE (XEXP (op, 0)) == CCFPEmode)
return 1;
code = GET_CODE (op);
return (code != NE && code != EQ && code != GEU && code != LTU);
}
@ -974,13 +975,14 @@ normal_comp_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
MATCH_OPERATOR to recognize all the branch insns. */
int
noov_compare_op (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
noov_compare_op (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
enum rtx_code code = GET_CODE (op);
enum rtx_code code;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return 0;
code = GET_CODE (op);
if (GET_MODE (XEXP (op, 0)) == CC_NOOVmode
|| GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
/* These are the only branches which work with CC_NOOVmode. */
@ -994,14 +996,15 @@ noov_compare_op (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
int
noov_compare64_op (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
enum rtx_code code = GET_CODE (op);
enum rtx_code code;
if (! TARGET_V9)
return 0;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op));
return 0;
code = GET_CODE (op);
if (GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
/* These are the only branches which work with CCX_NOOVmode. */
return (code == EQ || code == NE || code == GE || code == LT);
@ -1012,13 +1015,14 @@ noov_compare64_op (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
conditional move or branch on register contents instructions. */
int
v9_regcmp_op (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
v9_regcmp_op (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{
enum rtx_code code = GET_CODE (op);
enum rtx_code code;
if (GET_RTX_CLASS (code) != '<')
if (!COMPARISON_P (op))
return 0;
code = GET_CODE (op);
return v9_regcmp_p (code);
}
@ -2687,7 +2691,7 @@ emit_hard_tfmode_operation (enum rtx_code code, rtx *operands)
{
rtx op, dest;
if (GET_RTX_CLASS (code) == '1')
if (GET_RTX_CLASS (code) == RTX_UNARY)
{
operands[1] = force_reg (GET_MODE (operands[1]), operands[1]);
op = gen_rtx_fmt_e (code, GET_MODE (operands[0]), operands[1]);
@ -3073,7 +3077,7 @@ reg_unused_after (rtx reg, rtx insn)
if (GET_CODE (insn) == CODE_LABEL)
return 1;
if (GET_RTX_CLASS (code) == 'i')
if (INSN_P (insn))
{
rtx set = single_set (insn);
int in_src = set && reg_overlap_mentioned_p (reg, SET_SRC (set));

57
gcc/cse.c
View File

@ -1214,7 +1214,7 @@ mention_regs (rtx x)
call that expensive function in the most common case where the only
use of the register is in the comparison. */
if (code == COMPARE || GET_RTX_CLASS (code) == '<')
if (code == COMPARE || COMPARISON_P (x))
{
if (GET_CODE (XEXP (x, 0)) == REG
&& ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
@ -2953,8 +2953,7 @@ find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
code on the Alpha for unaligned byte stores. */
if (flag_expensive_optimizations
&& (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
|| GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
&& ARITHMETIC_P (*loc)
&& GET_CODE (XEXP (*loc, 0)) == REG)
{
rtx op1 = XEXP (*loc, 1);
@ -3068,7 +3067,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
/* If ARG1 is a comparison operator and CODE is testing for
STORE_FLAG_VALUE, get the inner arguments. */
else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
else if (COMPARISON_P (arg1))
{
#ifdef FLOAT_STORE_FLAG_VALUE
REAL_VALUE_TYPE fsfv;
@ -3157,7 +3156,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
REAL_VALUE_NEGATIVE (fsfv)))
#endif
)
&& GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
&& COMPARISON_P (p->exp)))
{
x = p->exp;
break;
@ -3177,7 +3176,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
REAL_VALUE_NEGATIVE (fsfv)))
#endif
)
&& GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
&& COMPARISON_P (p->exp))
{
reverse_code = 1;
x = p->exp;
@ -3210,7 +3209,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
else
code = reversed;
}
else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
else if (COMPARISON_P (x))
code = GET_CODE (x);
arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
}
@ -3391,9 +3390,9 @@ fold_rtx (rtx x, rtx insn)
enum rtx_code eltcode = GET_CODE (elt->exp);
/* Just check for unary and binary operations. */
if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
&& GET_CODE (elt->exp) != SIGN_EXTEND
&& GET_CODE (elt->exp) != ZERO_EXTEND
if (UNARY_P (elt->exp)
&& eltcode != SIGN_EXTEND
&& eltcode != ZERO_EXTEND
&& GET_CODE (XEXP (elt->exp, 0)) == SUBREG
&& GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
&& (GET_MODE_CLASS (mode)
@ -3409,8 +3408,7 @@ fold_rtx (rtx x, rtx insn)
new = simplify_unary_operation (GET_CODE (elt->exp), mode,
op0, mode);
}
else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
|| GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
else if (ARITHMETIC_P (elt->exp)
&& eltcode != DIV && eltcode != MOD
&& eltcode != UDIV && eltcode != UMOD
&& eltcode != ASHIFTRT && eltcode != LSHIFTRT
@ -3768,9 +3766,8 @@ fold_rtx (rtx x, rtx insn)
if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
break;
if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
|| code == LTGT || code == UNEQ || code == ORDERED
|| code == UNORDERED)
if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
|| GET_RTX_CLASS (code) == RTX_COMM_ARITH)
{
validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
@ -3802,9 +3799,7 @@ fold_rtx (rtx x, rtx insn)
operand unless the first operand is also a constant integer. Otherwise,
place any constant second unless the first operand is also a constant. */
if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
|| code == LTGT || code == UNEQ || code == ORDERED
|| code == UNORDERED)
if (COMMUTATIVE_P (x))
{
if (must_swap
|| swap_commutative_operands_p (const_arg0 ? const_arg0
@ -3834,7 +3829,7 @@ fold_rtx (rtx x, rtx insn)
switch (GET_RTX_CLASS (code))
{
case '1':
case RTX_UNARY:
{
int is_const = 0;
@ -3857,7 +3852,8 @@ fold_rtx (rtx x, rtx insn)
}
break;
case '<':
case RTX_COMPARE:
case RTX_COMM_COMPARE:
/* See what items are actually being compared and set FOLDED_ARG[01]
to those values and CODE to the actual comparison code. If any are
constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
@ -4039,8 +4035,8 @@ fold_rtx (rtx x, rtx insn)
#endif
break;
case '2':
case 'c':
case RTX_BIN_ARITH:
case RTX_COMM_ARITH:
switch (code)
{
case PLUS:
@ -4245,7 +4241,7 @@ fold_rtx (rtx x, rtx insn)
const_arg1 ? const_arg1 : folded_arg1);
break;
case 'o':
case RTX_OBJ:
/* (lo_sum (high X) X) is simply X. */
if (code == LO_SUM && const_arg0 != 0
&& GET_CODE (const_arg0) == HIGH
@ -4253,15 +4249,15 @@ fold_rtx (rtx x, rtx insn)
return const_arg1;
break;
case '3':
case 'b':
case RTX_TERNARY:
case RTX_BITFIELD_OPS:
new = simplify_ternary_operation (code, mode, mode_arg0,
const_arg0 ? const_arg0 : folded_arg0,
const_arg1 ? const_arg1 : folded_arg1,
const_arg2 ? const_arg2 : XEXP (x, 2));
break;
case 'x':
case RTX_EXTRA:
/* Eliminate CONSTANT_P_RTX if its constant. */
if (code == CONSTANT_P_RTX)
{
@ -4271,6 +4267,9 @@ fold_rtx (rtx x, rtx insn)
return const0_rtx;
}
break;
default:
break;
}
return new ? new : x;
@ -5647,7 +5646,7 @@ cse_insn (rtx insn, rtx libcall_insn)
#ifdef PUSH_ROUNDING
/* Stack pushes invalidate the stack pointer. */
rtx addr = XEXP (dest, 0);
if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
&& XEXP (addr, 0) == stack_pointer_rtx)
invalidate (stack_pointer_rtx, Pmode);
#endif
@ -6313,7 +6312,7 @@ invalidate_memory (void)
static int
addr_affects_sp_p (rtx addr)
{
if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
&& GET_CODE (XEXP (addr, 0)) == REG
&& REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
{
@ -7193,7 +7192,7 @@ cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
if (GET_MODE (insn) == QImode)
PUT_MODE (insn, VOIDmode);
if (GET_RTX_CLASS (code) == 'i')
if (GET_RTX_CLASS (code) == RTX_INSN)
{
rtx p;

4
gcc/doc/md.texi
View File

@ -367,14 +367,14 @@ commutative arithmetic operators of RTL and whose mode is @var{mode}:
@smallexample
int
commutative_operator (x, mode)
commutative_integer_operator (x, mode)
rtx x;
enum machine_mode mode;
@{
enum rtx_code code = GET_CODE (x);
if (GET_MODE (x) != mode)
return 0;
return (GET_RTX_CLASS (code) == 'c'
return (GET_RTX_CLASS (code) == RTX_COMM_ARITH
|| code == EQ || code == NE);
@}
@end smallexample

41
gcc/doc/rtl.texi
View File

@ -140,58 +140,67 @@ of an RTX code with the macro @code{GET_RTX_CLASS (@var{code})}.
Currently, @file{rtx.def} defines these classes:
@table @code
@item o
@item RTX_OBJ
An RTX code that represents an actual object, such as a register
(@code{REG}) or a memory location (@code{MEM}, @code{SYMBOL_REF}).
Constants and basic transforms on objects (@code{ADDRESSOF},
@code{HIGH}, @code{LO_SUM}) are also included. Note that @code{SUBREG}
and @code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
@code{LO_SUM}) is also included; instead, @code{SUBREG} and
@code{STRICT_LOW_PART} are not in this class, but in class @code{x}.
@item <
An RTX code for a comparison, such as @code{NE} or @code{LT}.
@item RTX_CONST_OBJ
An RTX code that represents a constant object. @code{HIGH} is also
included in this class.
@item 1
@item RTX_COMPARE
An RTX code for a non-symmetric comparison, such as @code{GEU} or
@code{LT}.
@item RTX_COMM_COMPARE
An RTX code for a symmetric (commutative) comparison, such as @code{EQ}
or @code{ORDERED}.
@item RTX_UNARY
An RTX code for a unary arithmetic operation, such as @code{NEG},
@code{NOT}, or @code{ABS}. This category also includes value extension
(sign or zero) and conversions between integer and floating point.
@item c
@item RTX_COMM_ARITH
An RTX code for a commutative binary operation, such as @code{PLUS} or
@code{AND}. @code{NE} and @code{EQ} are comparisons, so they have class
@code{<}.
@item 2
@item RTX_BIN_ARITH
An RTX code for a non-commutative binary operation, such as @code{MINUS},
@code{DIV}, or @code{ASHIFTRT}.
@item b
@item RTX_BITFIELD_OPS
An RTX code for a bit-field operation. Currently only
@code{ZERO_EXTRACT} and @code{SIGN_EXTRACT}. These have three inputs
and are lvalues (so they can be used for insertion as well).
@xref{Bit-Fields}.
@item 3
@item RTX_TERNARY
An RTX code for other three input operations. Currently only
@code{IF_THEN_ELSE}.
@code{IF_THEN_ELSE} and @code{VEC_MERGE}.
@item i
@item RTX_INSN
An RTX code for an entire instruction: @code{INSN}, @code{JUMP_INSN}, and
@code{CALL_INSN}. @xref{Insns}.
@item m
@item RTX_MATCH
An RTX code for something that matches in insns, such as
@code{MATCH_DUP}. These only occur in machine descriptions.
@item a
@item RTX_AUTOINC
An RTX code for an auto-increment addressing mode, such as
@code{POST_INC}.
@item x
@item RTX_EXTRA
All other RTX codes. This category includes the remaining codes used
only in machine descriptions (@code{DEFINE_*}, etc.). It also includes
all the codes describing side effects (@code{SET}, @code{USE},
@code{CLOBBER}, etc.) and the non-insns that may appear on an insn
chain, such as @code{NOTE}, @code{BARRIER}, and @code{CODE_LABEL}.
@code{SUBREG} is also part of this class.
@end table
@cindex RTL format

2
gcc/emit-rtl.c
View File

@ -4982,7 +4982,7 @@ copy_insn_1 (rtx orig)
RTX_FLAG (copy, used) = 0;
/* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
if (GET_RTX_CLASS (code) == 'i')
if (INSN_P (orig))
{
RTX_FLAG (copy, jump) = 0;
RTX_FLAG (copy, call) = 0;

4
gcc/expr.c
View File

@ -5624,7 +5624,7 @@ force_operand (rtx value, rtx target)
return target;
}
if (GET_RTX_CLASS (code) == '2' || GET_RTX_CLASS (code) == 'c')
if (ARITHMETIC_P (value))
{
op2 = XEXP (value, 1);
if (!CONSTANT_P (op2) && !(GET_CODE (op2) == REG && op2 != subtarget))
@ -5693,7 +5693,7 @@ force_operand (rtx value, rtx target)
target, 1, OPTAB_LIB_WIDEN);
}
}
if (GET_RTX_CLASS (code) == '1')
if (UNARY_P (value))
{
op1 = force_operand (XEXP (value, 0), NULL_RTX);
return expand_simple_unop (GET_MODE (value), code, op1, target, 0);

6
gcc/final.c
View File

@ -2217,7 +2217,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
&& GET_CODE (body) == SET
&& SET_DEST (body) == pc_rtx
&& GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
&& GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
&& COMPARISON_P (XEXP (SET_SRC (body), 0))
&& XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
/* This is done during prescan; it is not done again
in final scan when prescan has been done. */
@ -2845,8 +2845,8 @@ get_mem_expr_from_op (rtx op, int *paddressp)
&& (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
return expr;
while (GET_RTX_CLASS (GET_CODE (op)) == '1'
|| GET_RTX_CLASS (GET_CODE (op)) == '2')
while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
|| GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
op = XEXP (op, 0);
expr = get_mem_expr_from_op (op, &inner_addressp);

16
gcc/flow.c
View File

@ -914,7 +914,7 @@ notice_stack_pointer_modification_1 (rtx x, rtx pat ATTRIBUTE_UNUSED,
of a push until later in flow. See the comments in rtl.texi
regarding Embedded Side-Effects on Addresses. */
|| (GET_CODE (x) == MEM
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == 'a'
&& GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == RTX_AUTOINC
&& XEXP (XEXP (x, 0), 0) == stack_pointer_rtx))
current_function_sp_is_unchanging = 0;
}
@ -2439,7 +2439,7 @@ invalidate_mems_from_autoinc (rtx *px, void *data)
rtx x = *px;
struct propagate_block_info *pbi = data;
if (GET_RTX_CLASS (GET_CODE (x)) == 'a')
if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
{
invalidate_mems_from_set (pbi, XEXP (x, 0));
return -1;
@ -3054,9 +3054,9 @@ ior_reg_cond (rtx old, rtx x, int add)
{
rtx op0, op1;
if (GET_RTX_CLASS (GET_CODE (old)) == '<')
if (COMPARISON_P (old))
{
if (GET_RTX_CLASS (GET_CODE (x)) == '<'
if (COMPARISON_P (x))
&& REVERSE_CONDEXEC_PREDICATES_P (GET_CODE (x), GET_CODE (old))
&& REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0)))
return const1_rtx;
@ -3149,7 +3149,7 @@ not_reg_cond (rtx x)
x_code = GET_CODE (x);
if (x_code == NOT)
return XEXP (x, 0);
if (GET_RTX_CLASS (x_code) == '<'
if (COMPARISON_P (x)
&& GET_CODE (XEXP (x, 0)) == REG)
{
if (XEXP (x, 1) != const0_rtx)
@ -3166,9 +3166,9 @@ and_reg_cond (rtx old, rtx x, int add)
{
rtx op0, op1;
if (GET_RTX_CLASS (GET_CODE (old)) == '<')
if (COMPARISON_P (old))
{
if (GET_RTX_CLASS (GET_CODE (x)) == '<'
if (COMPARISON_P (x))
&& GET_CODE (x) == reverse_condition (GET_CODE (old))
&& REGNO (XEXP (x, 0)) == REGNO (XEXP (old, 0)))
return const0_rtx;
@ -3259,7 +3259,7 @@ elim_reg_cond (rtx x, unsigned int regno)
{
rtx op0, op1;
if (GET_RTX_CLASS (GET_CODE (x)) == '<')
if (COMPARISON_P (x))
{
if (REGNO (XEXP (x, 0)) == regno)
return const0_rtx;

3
gcc/function.c
View File

@ -7677,8 +7677,7 @@ update_epilogue_consts (rtx dest, rtx x, void *data)
/* If this is a binary operation between a register we have been tracking
and a constant, see if we can compute a new constant value. */
else if ((GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == 'c'
|| GET_RTX_CLASS (GET_CODE (SET_SRC (x))) == '2')
else if (ARITHMETIC_P (SET_SRC (x))
&& GET_CODE (XEXP (SET_SRC (x), 0)) == REG
&& REGNO (XEXP (SET_SRC (x), 0)) < FIRST_PSEUDO_REGISTER
&& p->const_equiv[REGNO (XEXP (SET_SRC (x), 0))] != 0

9
gcc/genattrtab.c
View File

@ -565,7 +565,7 @@ attr_rtx_1 (enum rtx_code code, va_list p)
Use that entry if one is found; otherwise create a new RTL and add it
to the table. */
if (GET_RTX_CLASS (code) == '1')
if (GET_RTX_CLASS (code) == RTX_UNARY)
{
rtx arg0 = va_arg (p, rtx);
@ -591,9 +591,10 @@ attr_rtx_1 (enum rtx_code code, va_list p)
XEXP (rt_val, 0) = arg0;
}
}
else if (GET_RTX_CLASS (code) == 'c'
|| GET_RTX_CLASS (code) == '2'
|| GET_RTX_CLASS (code) == '<')
else if (GET_RTX_CLASS (code) == RTX_BIN_ARITH
|| GET_RTX_CLASS (code) == RTX_COMM_ARITH
|| GET_RTX_CLASS (code) == RTX_COMPARE
|| GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
{
rtx arg0 = va_arg (p, rtx);
rtx arg1 = va_arg (p, rtx);

4
gcc/genopinit.c
View File

@ -222,7 +222,9 @@ gen_insn (rtx insn)
/* We have to be concerned about matching "gt" and
missing "gtu", e.g., so verify we have reached the
end of thing we are to match. */
if (*p == 0 && *q == 0 && GET_RTX_CLASS(op) == '<')
if (*p == 0 && *q == 0
&& (GET_RTX_CLASS (op) == RTX_COMPARE
|| GET_RTX_CLASS (op) == RTX_COMM_COMPARE))
break;
}

21
gcc/integrate.c
View File

@ -2711,7 +2711,8 @@ subst_constants (rtx *loc, rtx insn, struct inline_remap *map, int memonly)
/* If this is a commutative operation, move a constant to the second
operand unless the second operand is already a CONST_INT. */
if (! memonly
&& (GET_RTX_CLASS (code) == 'c' || code == NE || code == EQ)
&& (GET_RTX_CLASS (code) == RTX_COMM_ARITH
|| GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
&& CONSTANT_P (XEXP (x, 0)) && GET_CODE (XEXP (x, 1)) != CONST_INT)
{
rtx tem = XEXP (x, 0);
@ -2723,14 +2724,15 @@ subst_constants (rtx *loc, rtx insn, struct inline_remap *map, int memonly)
if (! memonly)
switch (GET_RTX_CLASS (code))
{
case '1':
case RTX_UNARY:
if (op0_mode == MAX_MACHINE_MODE)
abort ();
new = simplify_unary_operation (code, GET_MODE (x),
XEXP (x, 0), op0_mode);
break;
case '<':
case RTX_COMPARE:
case RTX_COMM_COMPARE:
{
enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
@ -2757,14 +2759,14 @@ subst_constants (rtx *loc, rtx insn, struct inline_remap *map, int memonly)
break;
}
case '2':
case 'c':
case RTX_BIN_ARITH:
case RTX_COMM_ARITH:
new = simplify_binary_operation (code, GET_MODE (x),
XEXP (x, 0), XEXP (x, 1));
break;
case 'b':
case '3':
case RTX_BITFIELD_OPS:
case RTX_TERNARY:
if (op0_mode == MAX_MACHINE_MODE)
abort ();
@ -2772,7 +2774,7 @@ subst_constants (rtx *loc, rtx insn, struct inline_remap *map, int memonly)
{
rtx op0 = XEXP (x, 0);
if (GET_RTX_CLASS (GET_CODE (op0)) == '<'
if (COMPARISON_P (op0)
&& GET_MODE (op0) == VOIDmode
&& ! side_effects_p (op0)
&& XEXP (op0, 0) == map->compare_src
@ -2797,6 +2799,9 @@ subst_constants (rtx *loc, rtx insn, struct inline_remap *map, int memonly)
XEXP (x, 0), XEXP (x, 1),
XEXP (x, 2));
break;
default:
break;
}
if (new)

26
gcc/jump.c
View File

@ -637,7 +637,8 @@ reversed_comparison_code_parts (enum rtx_code code, rtx arg0, rtx arg1, rtx insn
enum machine_mode mode;
/* If this is not actually a comparison, we can't reverse it. */
if (GET_RTX_CLASS (code) != '<')
if (GET_RTX_CLASS (code) != RTX_COMPARE
&& GET_RTX_CLASS (code) != RTX_COMM_COMPARE)
return UNKNOWN;
mode = GET_MODE (arg0);
@ -748,7 +749,7 @@ reversed_comparison_code_parts (enum rtx_code code, rtx arg0, rtx arg1, rtx insn
enum rtx_code
reversed_comparison_code (rtx comparison, rtx insn)
{
if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
if (!COMPARISON_P (comparison))
return UNKNOWN;
return reversed_comparison_code_parts (GET_CODE (comparison),
XEXP (comparison, 0),
@ -1764,24 +1765,24 @@ delete_related_insns (rtx insn)
if (was_code_label && prev && GET_CODE (prev) == BARRIER)
{
RTX_CODE code;
while (next != 0
&& (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
|| code == NOTE || code == BARRIER
|| (code == CODE_LABEL && INSN_DELETED_P (next))))
enum rtx_code code;
while (next)
{
code = GET_CODE (next);
if (code == NOTE
&& NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
next = NEXT_INSN (next);
/* Keep going past other deleted labels to delete what follows. */
else if (code == CODE_LABEL && INSN_DELETED_P (next))
next = NEXT_INSN (next);
else
else if (code == BARRIER || INSN_P (next))
/* Note: if this deletes a jump, it can cause more
deletion of unreachable code, after a different label.
As long as the value from this recursive call is correct,
this invocation functions correctly. */
next = delete_related_insns (next);
else
break;
}
}
@ -2186,7 +2187,7 @@ int
rtx_renumbered_equal_p (rtx x, rtx y)
{
int i;
RTX_CODE code = GET_CODE (x);
enum rtx_code code = GET_CODE (x);
const char *fmt;
if (x == y)
@ -2296,16 +2297,15 @@ rtx_renumbered_equal_p (rtx x, rtx y)
order. Also handle the simple binary and unary cases without a loop.
??? Don't consider PLUS a commutative operator; see comments above. */
if ((code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
&& code != PLUS)
if (COMMUTATIVE_P (x) && code != PLUS)
return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
&& rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
|| (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
&& rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
else if (NON_COMMUTATIVE_P (x))
return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
&& rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
else if (GET_RTX_CLASS (code) == '1')
else if (UNARY_P (x))
return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
/* Compare the elements. If any pair of corresponding elements

4
gcc/local-alloc.c
View File

@ -1392,9 +1392,7 @@ block_alloc (int b)
/* Here we care if the operation to be computed is
commutative. */
else if ((GET_CODE (XEXP (note, 0)) == EQ
|| GET_CODE (XEXP (note, 0)) == NE
|| GET_RTX_CLASS (GET_CODE (XEXP (note, 0))) == 'c')
else if (COMMUTATIVE_P (XEXP (note, 0))
&& (r1 = XEXP (XEXP (note, 0), 1),
(GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG))
&& no_conflict_p (insn, r0, r1))

4
gcc/loop-iv.c
View File

@ -1469,7 +1469,7 @@ simplify_using_condition (rtx cond, rtx *expr, regset altered)
{
rtx rev, reve, exp = *expr;
if (GET_RTX_CLASS (GET_CODE (*expr)) != '<')
if (!COMPARISON_P (exp))
return;
/* If some register gets altered later, we do not really speak about its
@ -1894,7 +1894,7 @@ iv_number_of_iterations (struct loop *loop, rtx insn, rtx condition,
desc->niter_max = 0;
cond = GET_CODE (condition);
if (GET_RTX_CLASS (cond) != '<')
if (!COMPARISON_P (condition))
abort ();
mode = GET_MODE (XEXP (condition, 0));

16
gcc/loop.c
View File

@ -3678,15 +3678,14 @@ rtx_equal_for_prefetch_p (rtx x, rtx y)
if (code != GET_CODE (y))
return 0;
code = GET_CODE (x);
if (GET_RTX_CLASS (code) == 'c')
if (COMMUTATIVE_ARITH_P (x))
{
return ((rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 0))
&& rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 1)))
|| (rtx_equal_for_prefetch_p (XEXP (x, 0), XEXP (y, 1))
&& rtx_equal_for_prefetch_p (XEXP (x, 1), XEXP (y, 0))));
}
/* Compare the elements. If any pair of corresponding elements fails to
match, return 0 for the whole thing. */
@ -8607,7 +8606,7 @@ maybe_eliminate_biv (const struct loop *loop, struct iv_class *bl,
rtx note;
/* If this is a libcall that sets a giv, skip ahead to its end. */
if (GET_RTX_CLASS (code) == 'i')
if (INSN_P (p))
{
note = find_reg_note (p, REG_LIBCALL, NULL_RTX);
@ -9222,7 +9221,8 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
in cse.c */
while (GET_RTX_CLASS (code) == '<'
while ((GET_RTX_CLASS (code) == RTX_COMPARE
|| GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
&& op1 == CONST0_RTX (GET_MODE (op0))
&& op0 != want_reg)
{
@ -9312,7 +9312,7 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
REAL_VALUE_NEGATIVE (fsfv)))
#endif
))
&& GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'))
&& COMPARISON_P (SET_SRC (set))))
&& (((GET_MODE_CLASS (mode) == MODE_CC)
== (GET_MODE_CLASS (inner_mode) == MODE_CC))
|| mode == VOIDmode || inner_mode == VOIDmode))
@ -9332,7 +9332,7 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
REAL_VALUE_NEGATIVE (fsfv)))
#endif
))
&& GET_RTX_CLASS (GET_CODE (SET_SRC (set))) == '<'
&& COMPARISON_P (SET_SRC (set))
&& (((GET_MODE_CLASS (mode) == MODE_CC)
== (GET_MODE_CLASS (inner_mode) == MODE_CC))
|| mode == VOIDmode || inner_mode == VOIDmode))
@ -9351,7 +9351,7 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
if (x)
{
if (GET_RTX_CLASS (GET_CODE (x)) == '<')
if (COMPARISON_P (x))
code = GET_CODE (x);
if (reverse_code)
{

11
gcc/optabs.c
View File

@ -153,8 +153,11 @@ add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
|| NEXT_INSN (insns) == NULL_RTX)
abort ();
if (GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
&& GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
if (GET_RTX_CLASS (code) != RTX_COMM_ARITH
&& GET_RTX_CLASS (code) != RTX_BIN_ARITH
&& GET_RTX_CLASS (code) != RTX_COMM_COMPARE
&& GET_RTX_CLASS (code) != RTX_COMPARE
&& GET_RTX_CLASS (code) != RTX_UNARY)
return 1;
if (GET_CODE (target) == ZERO_EXTRACT)
@ -190,7 +193,7 @@ add_equal_note (rtx insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
}
}
if (GET_RTX_CLASS (code) == '1')
if (GET_RTX_CLASS (code) == RTX_UNARY)
note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
else
note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
@ -718,7 +721,7 @@ expand_binop (enum machine_mode mode, optab binoptab, rtx op0, rtx op1,
try to make the first operand a register.
Even better, try to make it the same as the target.
Also try to make the last operand a constant. */
if (GET_RTX_CLASS (binoptab->code) == 'c'
if (GET_RTX_CLASS (binoptab->code) == RTX_COMM_ARITH
|| binoptab == smul_widen_optab
|| binoptab == umul_widen_optab
|| binoptab == smul_highpart_optab

2
gcc/predict.c
View File

@ -533,7 +533,7 @@ estimate_probability (struct loops *loops_info)
/* Try "pointer heuristic."
A comparison ptr == 0 is predicted as false.
Similarly, a comparison ptr1 == ptr2 is predicted as false. */
if (GET_RTX_CLASS (GET_CODE (cond)) == '<'
if (COMPARISON_P (cond)
&& ((REG_P (XEXP (cond, 0)) && REG_POINTER (XEXP (cond, 0)))
|| (REG_P (XEXP (cond, 1)) && REG_POINTER (XEXP (cond, 1)))))
{

38
gcc/ra-debug.c
View File

@ -1,5 +1,5 @@
/* Graph coloring register allocator
Copyright (C) 2001, 2002 Free Software Foundation, Inc.
Copyright (C) 2001, 2002, 2004 Free Software Foundation, Inc.
Contributed by Michael Matz <matz@suse.de>
and Daniel Berlin <dan@cgsoftware.com>.
@ -130,9 +130,11 @@ ra_print_rtx_2op (FILE *file, rtx x)
case AND: opname = "&"; break;
case IOR: opname = "|"; break;
case XOR: opname = "^"; break;
/* class '<' */
/* class '=' */
case NE: opname = "!="; break;
case EQ: opname = "=="; break;
case LTGT: opname = "<>"; break;
/* class '<' */
case GE: opname = "s>="; break;
case GT: opname = "s>"; break;
case LE: opname = "s<="; break;
@ -196,7 +198,7 @@ ra_print_rtx_3op (FILE *file, rtx x)
}
}
/* Print rtx X, which represents an object (class 'o' or some constructs
/* Print rtx X, which represents an object (class 'o', 'C', or some constructs
of class 'x' (e.g. subreg)), to FILE.
(reg XX) rtl is represented as "pXX", of XX was a pseudo,
as "name" it name is the nonnull hardreg name, or as "hXX", if XX
@ -340,12 +342,10 @@ void
ra_print_rtx (FILE *file, rtx x, int with_pn)
{
enum rtx_code code;
char class;
int unhandled = 0;
if (!x)
return;
code = GET_CODE (x);
class = GET_RTX_CLASS (code);
/* First handle the insn like constructs. */
if (INSN_P (x) || code == NOTE || code == CODE_LABEL || code == BARRIER)
@ -492,16 +492,24 @@ ra_print_rtx (FILE *file, rtx x, int with_pn)
}
if (!unhandled)
return;
if (class == '1')
ra_print_rtx_1op (file, x);
else if (class == '2' || class == 'c' || class == '<')
ra_print_rtx_2op (file, x);
else if (class == '3' || class == 'b')
ra_print_rtx_3op (file, x);
else if (class == 'o')
ra_print_rtx_object (file, x);
else
print_inline_rtx (file, x, 0);
switch (GET_RTX_CLASS (code))
{
case RTX_UNARY:
ra_print_rtx_1op (file, x);
case RTX_BIN_ARITH:
case RTX_COMM_ARITH:
case RTX_COMPARE:
case RTX_COMM_COMPARE:
ra_print_rtx_2op (file, x);
case RTX_TERNARY:
case RTX_BITFIELD_OPS:
ra_print_rtx_3op (file, x);
case RTX_OBJ:
case RTX_CONST_OBJ:
ra_print_rtx_object (file, x);
default:
print_inline_rtx (file, x, 0);
}
}
/* This only calls ra_print_rtx(), but emits a final newline. */

14
gcc/recog.c
View File

@ -521,11 +521,11 @@ validate_replace_rtx_1 (rtx *loc, rtx from, rtx to, rtx object)
/* Do changes needed to keep rtx consistent. Don't do any other
simplifications, as it is not our job. */
if ((GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == 'c')
if (SWAPPABLE_OPERANDS_P (x)
&& swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
{
validate_change (object, loc,
gen_rtx_fmt_ee (GET_RTX_CLASS (code) == 'c' ? code
gen_rtx_fmt_ee (COMMUTATIVE_ARITH_P (x) ? code
: swap_condition (code),
GET_MODE (x), XEXP (x, 1),
XEXP (x, 0)), 1);
@ -1370,7 +1370,7 @@ int
comparison_operator (rtx op, enum machine_mode mode)
{
return ((mode == VOIDmode || GET_MODE (op) == mode)
&& GET_RTX_CLASS (GET_CODE (op)) == '<');
&& COMPARISON_P (op));
}
/* If BODY is an insn body that uses ASM_OPERANDS,
@ -1931,7 +1931,7 @@ offsettable_address_p (int strictp, enum machine_mode mode, rtx y)
return good;
}
if (GET_RTX_CLASS (ycode) == 'a')
if (GET_RTX_CLASS (ycode) == RTX_AUTOINC)
return 0;
/* The offset added here is chosen as the maximum offset that
@ -2304,7 +2304,7 @@ constrain_operands (int strict)
/* A unary operator may be accepted by the predicate, but it
is irrelevant for matching constraints. */
if (GET_RTX_CLASS (GET_CODE (op)) == '1')
if (UNARY_P (op))
op = XEXP (op, 0);
if (GET_CODE (op) == SUBREG)
@ -2377,9 +2377,9 @@ constrain_operands (int strict)
/* A unary operator may be accepted by the predicate,
but it is irrelevant for matching constraints. */
if (GET_RTX_CLASS (GET_CODE (op1)) == '1')
if (UNARY_P (op1))
op1 = XEXP (op1, 0);
if (GET_RTX_CLASS (GET_CODE (op2)) == '1')
if (UNARY_P (op2))
op2 = XEXP (op2, 0);
val = operands_match_p (op1, op2);

4
gcc/reg-stack.c
View File

@ -1178,7 +1178,7 @@ swap_rtx_condition_1 (rtx pat)
const char *fmt;
int i, r = 0;
if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
if (COMPARISON_P (pat))
{
PUT_CODE (pat, swap_condition (GET_CODE (pat)));
r = 1;
@ -1654,7 +1654,7 @@ subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
}
/* Keep operand 1 matching with destination. */
if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
if (COMMUTATIVE_ARITH_P (pat_src)
&& REG_P (*src1) && REG_P (*src2)
&& REGNO (*src1) != REGNO (*dest))
{

3
gcc/regclass.c
View File

@ -1008,13 +1008,12 @@ record_operand_costs (rtx insn, struct costs *op_costs,
static rtx
scan_one_insn (rtx insn, int pass)
{
enum rtx_code code = GET_CODE (insn);
enum rtx_code pat_code;
rtx set, note;
int i, j;
struct costs op_costs[MAX_RECOG_OPERANDS];
if (GET_RTX_CLASS (code) != 'i')
if (!INSN_P (insn))
return insn;
pat_code = GET_CODE (PATTERN (insn));

10
gcc/regmove.c
View File

@ -2046,7 +2046,13 @@ stable_and_no_regs_but_for_p (rtx x, rtx src, rtx dst)
RTX_CODE code = GET_CODE (x);
switch (GET_RTX_CLASS (code))
{
case '<': case '1': case 'c': case '2': case 'b': case '3':
case RTX_UNARY:
case RTX_BIN_ARITH:
case RTX_COMM_ARITH:
case RTX_COMPARE:
case RTX_COMM_COMPARE:
case RTX_TERNARY:
case RTX_BITFIELD_OPS:
{
int i;
const char *fmt = GET_RTX_FORMAT (code);
@ -2056,7 +2062,7 @@ stable_and_no_regs_but_for_p (rtx x, rtx src, rtx dst)
return 0;
return 1;
}
case 'o':
case RTX_OBJ:
if (code == REG)
return x == src || x == dst;
/* If this is a MEM, look inside - there might be a register hidden in

2
gcc/regrename.c
View File

@ -1173,7 +1173,7 @@ kill_autoinc_value (rtx *px, void *data)
rtx x = *px;
struct value_data *vd = data;
if (GET_RTX_CLASS (GET_CODE (x)) == 'a')
if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
{
x = XEXP (x, 0);
kill_value (x, vd);

12
gcc/reload.c
View File

@ -771,10 +771,10 @@ find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
true_regnum (rld[i].reg_rtx)))
&& out == 0 && rld[i].out == 0 && rld[i].in != 0
&& ((GET_CODE (in) == REG
&& GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
&& GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
&& MATCHES (XEXP (rld[i].in, 0), in))
|| (GET_CODE (rld[i].in) == REG
&& GET_RTX_CLASS (GET_CODE (in)) == 'a'
&& GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
&& MATCHES (XEXP (in, 0), rld[i].in)))
&& (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
&& (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
@ -2706,7 +2706,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
/* If we now have a simple operand where we used to have a
PLUS or MULT, re-recognize and try again. */
if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
if ((OBJECT_P (*recog_data.operand_loc[i])
|| GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
&& (GET_CODE (recog_data.operand[i]) == MULT
|| GET_CODE (recog_data.operand[i]) == PLUS))
@ -2762,7 +2762,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
substed_operand[i] = recog_data.operand[i] = op;
}
else if (code == PLUS || GET_RTX_CLASS (code) == '1')
else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
/* We can get a PLUS as an "operand" as a result of register
elimination. See eliminate_regs and gen_reload. We handle
a unary operator by reloading the operand. */
@ -2890,7 +2890,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
/* If the predicate accepts a unary operator, it means that
we need to reload the operand, but do not do this for
match_operator and friends. */
if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
if (UNARY_P (operand) && *p != 0)
operand = XEXP (operand, 0);
/* If the operand is a SUBREG, extract
@ -6271,7 +6271,7 @@ reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
/* Overly conservative. */
if (GET_CODE (x) == STRICT_LOW_PART
|| GET_RTX_CLASS (GET_CODE (x)) == 'a')
|| GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
x = XEXP (x, 0);
/* If either argument is a constant, then modifying X can not affect IN. */

4
gcc/reload1.c
View File

@ -7512,7 +7512,7 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
#endif
/* If IN is a simple operand, use gen_move_insn. */
else if (GET_RTX_CLASS (GET_CODE (in)) == 'o' || GET_CODE (in) == SUBREG)
else if (OBJECT_P (in) || GET_CODE (in) == SUBREG)
emit_insn (gen_move_insn (out, in));
#ifdef HAVE_reload_load_address
@ -7779,7 +7779,7 @@ delete_address_reloads_1 (rtx dead_insn, rtx x, rtx current_insn)
code = GET_CODE (prev);
if (code == CODE_LABEL || code == JUMP_INSN)
return;
if (GET_RTX_CLASS (code) != 'i')
if (!INSN_P (prev))
continue;
if (reg_set_p (x, PATTERN (prev)))
break;

4
gcc/rtl.c
View File

@ -90,7 +90,7 @@ const char * const rtx_format[NUM_RTX_CODE] = {
/* Indexed by rtx code, gives a character representing the "class" of
that rtx code. See rtl.def for documentation on the defined classes. */
const char rtx_class[NUM_RTX_CODE] = {
const enum rtx_class rtx_class[NUM_RTX_CODE] = {
#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) CLASS,
#include "rtl.def" /* rtl expressions are defined here */
#undef DEF_RTL_EXPR
@ -260,7 +260,7 @@ copy_rtx (rtx orig)
RTX_FLAG (copy, used) = 0;
/* We do not copy FRAME_RELATED for INSNs. */
if (GET_RTX_CLASS (code) == 'i')
if (INSN_P (orig))
RTX_FLAG (copy, frame_related) = 0;
RTX_FLAG (copy, jump) = RTX_FLAG (orig, jump);
RTX_FLAG (copy, call) = RTX_FLAG (orig, call);

373
gcc/rtl.def
View File

@ -46,18 +46,33 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
4. The class of the rtx. These are stored in rtx_class and are accessed
via the GET_RTX_CLASS macro. They are defined as follows:
"o" an rtx code that can be used to represent an object (e.g, REG, MEM)
"<" an rtx code for a comparison (e.g, EQ, NE, LT)
"1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
"c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
"3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
"2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
"b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
"i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
"m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
"g" an rtx code for grouping insns together (e.g, GROUP_PARALLEL)
"a" an rtx code for autoincrement addressing modes (e.g. POST_DEC)
"x" everything else
RTX_CONST_OBJ
an rtx code that can be used to represent a constant object
(e.g, CONST_INT)
RTX_OBJ
an rtx code that can be used to represent an object (e.g, REG, MEM)
RTX_COMPARE
an rtx code for a comparison (e.g, LT, GT)
RTX_COMM_COMPARE
an rtx code for a commutative comparison (e.g, EQ, NE, ORDERED)
RTX_UNARY
an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
RTX_COMM_ARITH
an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
RTX_TERNARY
an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
RTX_BIN_ARITH
an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
RTX_BITFIELD_OPS
an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
RTX_INSN
an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
RTX_MATCH
an rtx code for something that matches in insns (e.g, MATCH_DUP)
RTX_AUTOINC
an rtx code for autoincrement addressing modes (e.g. POST_DEC)
RTX_EXTRA
everything else
*/
@ -67,27 +82,27 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
--------------------------------------------------------------------- */
/* an expression code name unknown to the reader */
DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x')
DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
/* (NIL) is used by rtl reader and printer to represent a null pointer. */
DEF_RTL_EXPR(NIL, "nil", "*", 'x')
DEF_RTL_EXPR(NIL, "nil", "*", RTX_EXTRA)
/* include a file */
DEF_RTL_EXPR(INCLUDE, "include", "s", 'x')
DEF_RTL_EXPR(INCLUDE, "include", "s", RTX_EXTRA)
/* ---------------------------------------------------------------------
Expressions used in constructing lists.
--------------------------------------------------------------------- */
/* a linked list of expressions */
DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x')
DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA)
/* a linked list of instructions.
The insns are represented in print by their uids. */
DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
/* ----------------------------------------------------------------------
Expression types for machine descriptions.
@ -126,19 +141,19 @@ DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
There must be a 1 to 1 correspondence between these sets of classes in
all operands for an instruction.
*/
DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm')
DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", RTX_MATCH)
/* Appears only in machine descriptions.
Means match a SCRATCH or a register. When used to generate rtl, a
SCRATCH is generated. As for MATCH_OPERAND, the mode specifies
the desired mode and the first argument is the operand number.
The second argument is the constraint. */
DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm')
DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", RTX_MATCH)
/* Appears only in machine descriptions.
Means match only something equal to what is stored in the operand table
at the index specified by the argument. */
DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", RTX_MATCH)
/* Appears only in machine descriptions.
Means apply a predicate, AND match recursively the operands of the rtx.
@ -146,7 +161,7 @@ DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
Operand 1 is a predicate to apply (as a string, a function name).
Operand 2 is a vector of expressions, each of which must match
one subexpression of the rtx this construct is matching. */
DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", RTX_MATCH)
/* Appears only in machine descriptions.
Means to match a PARALLEL of arbitrary length. The predicate is applied
@ -155,17 +170,17 @@ DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
Operand 1 is a predicate to apply to the PARALLEL.
Operand 2 is a vector of expressions, each of which must match the
corresponding element in the PARALLEL. */
DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm')
DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH)
/* Appears only in machine descriptions.
Means match only something equal to what is stored in the operand table
at the index specified by the argument. For MATCH_OPERATOR. */
DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm')
DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", RTX_MATCH)
/* Appears only in machine descriptions.
Means match only something equal to what is stored in the operand table
at the index specified by the argument. For MATCH_PARALLEL. */
DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", RTX_MATCH)
/* Appears only in machine descriptions.
Defines the pattern for one kind of instruction.
@ -184,7 +199,7 @@ DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
template to use.
4: optionally, a vector of attributes for this insn.
*/
DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", 'x')
DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", RTX_EXTRA)
/* Definition of a peephole optimization.
1st operand: vector of insn patterns to match
@ -192,7 +207,7 @@ DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", 'x')
3rd operand: template or C code to produce assembler output.
4: optionally, a vector of attributes for this insn.
*/
DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", 'x')
DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", RTX_EXTRA)
/* Definition of a split operation.
1st operand: insn pattern to match
@ -203,7 +218,7 @@ DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", 'x')
elements of `recog_data.operand' for use by the vector of
insn-patterns.
(`operands' is an alias here for `recog_data.operand'). */
DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", RTX_EXTRA)
/* Definition of an insn and associated split.
This is the concatenation, with a few modifications, of a define_insn
@ -231,11 +246,11 @@ DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
insn-patterns.
(`operands' is an alias here for `recog_data.operand').
7: optionally, a vector of attributes for this insn. */
DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", 'x')
DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA)
/* Definition of an RTL peephole operation.
Follows the same arguments as define_split. */
DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", 'x')
DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", RTX_EXTRA)
/* Define how to generate multiple insns for a standard insn name.
1st operand: the insn name.
@ -248,7 +263,7 @@ DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", 'x')
elements of `recog_data.operand' for use by the vector of
insn-patterns.
(`operands' is an alias here for `recog_data.operand'). */
DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
/* Define a requirement for delay slots.
1st operand: Condition involving insn attributes that, if true,
@ -264,7 +279,7 @@ DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
Multiple DEFINE_DELAYs may be present. They indicate differing
requirements for delay slots. */
DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA)
/* Define a set of insns that requires a function unit. This means that
these insns produce their result after a delay and that there may be
@ -305,10 +320,10 @@ DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
the insn can be immediately scheduled (subject to the limit
on the number of simultaneous operations executing on the
unit.) */
DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x')
DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", RTX_EXTRA)
/* Define attribute computation for `asm' instructions. */
DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", RTX_EXTRA)
/* Definition of a conditional execution meta operation. Automatically
generates new instances of DEFINE_INSN, selected by having attribute
@ -321,16 +336,16 @@ DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
1: A C expression giving an additional condition for recognizing
the generated pattern.
2: A template or C code to produce assembler output. */
DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", 'x')
DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA)
/* SEQUENCE appears in the result of a `gen_...' function
for a DEFINE_EXPAND that wants to make several insns.
Its elements are the bodies of the insns that should be made.
`emit_insn' takes the SEQUENCE apart and makes separate insns. */
DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x')
DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA)
/* Refers to the address of its argument. This is only used in alias.c. */
DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
DEF_RTL_EXPR(ADDRESS, "address", "e", RTX_MATCH)
/* ----------------------------------------------------------------------
Constructions for CPU pipeline description described by NDFAs.
@ -346,12 +361,12 @@ DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
All define_reservations, define_cpu_units, and
define_query_cpu_units should have unique names which may not be
"nothing". */
DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", 'x')
DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", RTX_EXTRA)
/* (define_query_cpu_unit string [string]) describes cpu functional
units analogously to define_cpu_unit. The reservation of such
units can be queried for automaton state. */
DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", 'x')
DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", RTX_EXTRA)
/* (exclusion_set string string) means that each CPU functional unit
in the first string can not be reserved simultaneously with any
@ -361,7 +376,7 @@ DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", 'x')
unit which can execute simultaneously only single floating point
insns or only double floating point insns. All CPU functional
units in a set should belong to the same automaton. */
DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", 'x')
DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", RTX_EXTRA)
/* (presence_set string string) means that each CPU functional unit in
the first string can not be reserved unless at least one of pattern
@ -383,7 +398,7 @@ DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", 'x')
All CPU functional units in a set should belong to the same
automaton. */
DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", 'x')
DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", RTX_EXTRA)
/* (final_presence_set string string) is analogous to `presence_set'.
The difference between them is when checking is done. When an
@ -404,7 +419,7 @@ DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", 'x')
(define_reservation "insn_and_nop" "slot0 + slot1")
but it can be issued if we use analogous `final_presence_set'. */
DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", 'x')
DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", RTX_EXTRA)
/* (absence_set string string) means that each CPU functional unit in
the first string can be reserved only if each pattern of units
@ -427,12 +442,12 @@ DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", 'x')
All CPU functional units in a set should to belong the same
automaton. */
DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", 'x')
DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", RTX_EXTRA)
/* (final_absence_set string string) is analogous to `absence_set' but
checking is done on the result (state) reservation. See comments
for `final_presence_set'. */
DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", 'x')
DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", RTX_EXTRA)
/* (define_bypass number out_insn_names in_insn_names) names bypass
with given latency (the first number) from insns given by the first
@ -443,7 +458,7 @@ DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", 'x')
parameters. If the function returns zero the bypass will be
ignored for this case. Additional guard is necessary to recognize
complicated bypasses, e.g. when consumer is load address. */
DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", 'x')
DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA)
/* (define_automaton string) describes names of automata generated and
used for pipeline hazards recognition. The names are separated by
@ -452,7 +467,7 @@ DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", 'x')
automata, the summary size of the automata usually is less than the
single one. The automaton name is used in define_cpu_unit and
define_query_cpu_unit. All automata should have unique names. */
DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", 'x')
DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", RTX_EXTRA)
/* (automata_option string) describes option for generation of
automata. Currently there are the following options:
@ -475,7 +490,7 @@ DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", 'x')
o "progress" which means output of a progress bar showing how many
states were generated so far for automaton being processed. */
DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", 'x')
DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", RTX_EXTRA)
/* (define_reservation string string) names reservation (the first
string) of cpu functional units (the 2nd string). Sometimes unit
@ -484,7 +499,7 @@ DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", 'x')
parameter) in regular expression in define_insn_reservation. All
define_reservations, define_cpu_units, and define_query_cpu_units
should have unique names which may not be "nothing". */
DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", 'x')
DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", RTX_EXTRA)
/* (define_insn_reservation name default_latency condition regexpr)
describes reservation of cpu functional units (the 3nd operand) for
@ -532,7 +547,7 @@ DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", 'x')
7. string "nothing" means no units reservation. */
DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", 'x')
DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", RTX_EXTRA)
/* ----------------------------------------------------------------------
Expressions used for insn attributes. These also do not appear in
@ -543,10 +558,10 @@ DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", 'x')
1st operand: name of the attribute
2nd operand: comma-separated list of possible attribute values
3rd operand: expression for the default value of the attribute. */
DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x')
DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", RTX_EXTRA)
/* Marker for the name of an attribute. */
DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
DEF_RTL_EXPR(ATTR, "attr", "s", RTX_EXTRA)
/* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
@ -554,7 +569,7 @@ DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
(set_attr "name" "value") is equivalent to
(set (attr "name") (const_string "value")) */
DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", RTX_EXTRA)
/* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
specify that attribute values are to be assigned according to the
@ -569,16 +584,16 @@ DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
(const_string "a3")])
(set_attr "att" "a1,a2,a3")
*/
DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x')
DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", RTX_EXTRA)
/* A conditional expression true if the value of the specified attribute of
the current insn equals the specified value. The first operand is the
attribute name and the second is the comparison value. */
DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x')
DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", RTX_EXTRA)
/* A special case of the above representing a set of alternatives. The first
operand is bitmap of the set, the second one is the default value. */
DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", 'x')
DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", RTX_EXTRA)
/* A conditional expression which is true if the specified flag is
true for the insn being scheduled in reorg.
@ -588,7 +603,7 @@ DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", 'x')
forward, backward, very_likely, likely, very_unlikely, and unlikely. */
DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA)
/* ----------------------------------------------------------------------
Expression types used for things in the instruction chain.
@ -601,21 +616,21 @@ DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
---------------------------------------------------------------------- */
/* An instruction that cannot jump. */
DEF_RTL_EXPR(INSN, "insn", "iuuBieiee", 'i')
DEF_RTL_EXPR(INSN, "insn", "iuuBieiee", RTX_INSN)
/* An instruction that can possibly jump.
Fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieiee0", 'i')
DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieiee0", RTX_INSN)
/* An instruction that can possibly call a subroutine
but which will not change which instruction comes next
in the current function.
Field ( rtx->u.fld[9] ) is CALL_INSN_FUNCTION_USAGE.
All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */
DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieieee", 'i')
DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieieee", RTX_INSN)
/* A marker that indicates that control will not flow through. */
DEF_RTL_EXPR(BARRIER, "barrier", "iuu000000", 'x')
DEF_RTL_EXPR(BARRIER, "barrier", "iuu000000", RTX_EXTRA)
/* Holds a label that is followed by instructions.
Operand:
@ -623,14 +638,14 @@ DEF_RTL_EXPR(BARRIER, "barrier", "iuu000000", 'x')
5: is used in flow.c to point to the chain of label_ref's to this label.
6: is a number that is unique in the entire compilation.
7: is the user-given name of the label, if any. */
DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", 'x')
DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", RTX_EXTRA)
/* Say where in the code a source line starts, for symbol table's sake.
Operand:
4: filename, if line number > 0, note-specific data otherwise.
5: line number if > 0, enum note_insn otherwise.
6: unique number if line number == note_insn_deleted_label. */
DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", 'x')
DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA)
/* ----------------------------------------------------------------------
Top level constituents of INSN, JUMP_INSN and CALL_INSN.
@ -643,10 +658,10 @@ DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", 'x')
Semantics are that there are no side effects if the condition
is false. This pattern is created automatically by the if_convert
pass run after reload or by target-specific splitters. */
DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", 'x')
DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", RTX_EXTRA)
/* Several operations to be done in parallel (perhaps under COND_EXEC). */
DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
DEF_RTL_EXPR(PARALLEL, "parallel", "E", RTX_EXTRA)
/* A string that is passed through to the assembler as input.
One can obviously pass comments through by using the
@ -654,7 +669,7 @@ DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
These occur in an insn all by themselves as the PATTERN.
They also appear inside an ASM_OPERANDS
as a convenient way to hold a string. */
DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", RTX_EXTRA)
/* An assembler instruction with operands.
1st operand is the instruction template.
@ -668,7 +683,7 @@ DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
and whose mode indicates the mode of the input operand.
6th is the name of the containing source file.
7th is the source line number. */
DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", RTX_EXTRA)
/* A machine-specific operation.
1st operand is a vector of operands being used by the operation so that
@ -679,14 +694,14 @@ DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
genrecog.c record positions within an insn.)
This can occur all by itself in a PATTERN, as a component of a PARALLEL,
or inside an expression. */
DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x')
DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA)
/* Similar, but a volatile operation and one which may trap. */
DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x')
DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA)
/* Vector of addresses, stored as full words. */
/* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */
DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA)
/* Vector of address differences X0 - BASE, X1 - BASE, ...
First operand is BASE; the vector contains the X's.
@ -711,7 +726,7 @@ DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
compilations. */
DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x')
DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
/* Memory prefetch, with attributes supported on some targets.
Operand 1 is the address of the memory to fetch.
@ -722,7 +737,7 @@ DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x')
The attributes specified by operands 2 and 3 are ignored for targets
whose prefetch instructions do not support them. */
DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", 'x')
DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", RTX_EXTRA)
/* ----------------------------------------------------------------------
At the top level of an instruction (perhaps under PARALLEL).
@ -734,69 +749,69 @@ DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", 'x')
ALL assignment must use SET.
Instructions that do multiple assignments must use multiple SET,
under PARALLEL. */
DEF_RTL_EXPR(SET, "set", "ee", 'x')
DEF_RTL_EXPR(SET, "set", "ee", RTX_EXTRA)
/* Indicate something is used in a way that we don't want to explain.
For example, subroutine calls will use the register
in which the static chain is passed. */
DEF_RTL_EXPR(USE, "use", "e", 'x')
DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA)
/* Indicate something is clobbered in a way that we don't want to explain.
For example, subroutine calls will clobber some physical registers
(the ones that are by convention not saved). */
DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x')
DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA)
/* Call a subroutine.
Operand 1 is the address to call.
Operand 2 is the number of arguments. */
DEF_RTL_EXPR(CALL, "call", "ee", 'x')
DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXTRA)
/* Return from a subroutine. */
DEF_RTL_EXPR(RETURN, "return", "", 'x')
DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
/* Conditional trap.
Operand 1 is the condition.
Operand 2 is the trap code.
For an unconditional trap, make the condition (const_int 1). */
DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", 'x')
DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA)
/* Placeholder for _Unwind_Resume before we know if a function call
or a branch is needed. Operand 1 is the exception region from
which control is flowing. */
DEF_RTL_EXPR(RESX, "resx", "i", 'x')
DEF_RTL_EXPR(RESX, "resx", "i", RTX_EXTRA)
/* ----------------------------------------------------------------------
Primitive values for use in expressions.
---------------------------------------------------------------------- */
/* numeric integer constant */
DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o')
DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
/* numeric floating point constant.
Operands hold the value. They are all 'w' and there may be from 2 to 6;
see real.h. */
DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, 'o')
DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
/* Describes a vector constant. */
DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", 'x')
DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", RTX_EXTRA)
/* String constant. Used only for attributes right now. */
DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o')
DEF_RTL_EXPR(CONST_STRING, "const_string", "s", RTX_OBJ)
/* This is used to encapsulate an expression whose value is constant
(such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
recognized as a constant operand rather than by arithmetic instructions. */
DEF_RTL_EXPR(CONST, "const", "e", 'o')
DEF_RTL_EXPR(CONST, "const", "e", RTX_CONST_OBJ)
/* program counter. Ordinary jumps are represented
by a SET whose first operand is (PC). */
DEF_RTL_EXPR(PC, "pc", "", 'o')
DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
/* Used in the cselib routines to describe a value. */
DEF_RTL_EXPR(VALUE, "value", "0", 'o')
DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
/* A register. The "operand" is the register number, accessed with
the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
@ -805,14 +820,14 @@ DEF_RTL_EXPR(VALUE, "value", "0", 'o')
pseudo register that got turned into a hard register.
This rtx needs to have as many (or more) fields as a MEM, since we
can change REG rtx's into MEMs during reload. */
DEF_RTL_EXPR(REG, "reg", "i00", 'o')
DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
/* A scratch register. This represents a register used only within a
single insn. It will be turned into a REG during register allocation
or reload unless the constraint indicates that the register won't be
needed, in which case it can remain a SCRATCH. This code is
marked as having one operand so it can be turned into a REG. */
DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
DEF_RTL_EXPR(SCRATCH, "scratch", "0", RTX_OBJ)
/* One word of a multi-word value.
The first operand is the complete value; the second says which word.
@ -822,7 +837,7 @@ DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
This is also used to refer to a value in a different machine mode.
For example, it can be used to refer to a SImode value as if it were
Qimode, or vice versa. Then the word number is always 0. */
DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
DEF_RTL_EXPR(SUBREG, "subreg", "ei", RTX_EXTRA)
/* This one-argument rtx is used for move instructions
that are guaranteed to alter only the low part of a destination.
@ -835,38 +850,38 @@ DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
but the register constraints may be tighter when STRICT_LOW_PART
is in use. */
DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x')
DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", RTX_EXTRA)
/* (CONCAT a b) represents the virtual concatenation of a and b
to make a value that has as many bits as a and b put together.
This is used for complex values. Normally it appears only
in DECL_RTLs and during RTL generation, but not in the insn chain. */
DEF_RTL_EXPR(CONCAT, "concat", "ee", 'o')
DEF_RTL_EXPR(CONCAT, "concat", "ee", RTX_OBJ)
/* A memory location; operand is the address. The second operand is the
alias set to which this MEM belongs. We use `0' instead of `w' for this
field so that the field need not be specified in machine descriptions. */
DEF_RTL_EXPR(MEM, "mem", "e0", 'o')
DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ)
/* Reference to an assembler label in the code for this function.
The operand is a CODE_LABEL found in the insn chain.
The unprinted fields 1 and 2 are used in flow.c for the
LABEL_NEXTREF and CONTAINING_INSN. */
DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o')
DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", RTX_CONST_OBJ)
/* Reference to a named label:
Operand 0: label name
Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
Operand 2: tree from which this symbol is derived, or null.
This is either a DECL node, or some kind of constant. */
DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", 'o')
DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ)
/* The condition code register is represented, in our imagination,
as a register holding a value that can be compared to zero.
In fact, the machine has already compared them and recorded the
results; but instructions that look at the condition code
pretend to be looking at the entire value and comparing it. */
DEF_RTL_EXPR(CC0, "cc0", "", 'o')
DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ)
/* Reference to the address of a register. Removed by purge_addressof after
CSE has elided as many as possible.
@ -875,7 +890,7 @@ DEF_RTL_EXPR(CC0, "cc0", "", 'o')
3rd operand: the decl for the object in the register, for
put_reg_in_stack. */
DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", 'o')
DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", RTX_OBJ)
/* =====================================================================
A QUEUED expression really points to a member of the queue of instructions
@ -893,7 +908,7 @@ DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", 'o')
4. the next QUEUED expression in the queue.
====================================================================== */
DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
DEF_RTL_EXPR(QUEUED, "queued", "eeeee", RTX_EXTRA)
/* ----------------------------------------------------------------------
Expressions for operators in an rtl pattern
@ -905,7 +920,7 @@ DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
0: condition
1: then expr
2: else expr */
DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", RTX_TERNARY)
/* General conditional. The first operand is a vector composed of pairs of
expressions. The first element of each pair is evaluated, in turn.
@ -914,57 +929,57 @@ DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
true, the second operand will be used as the value of the conditional.
This should be replaced with use of IF_THEN_ELSE. */
DEF_RTL_EXPR(COND, "cond", "Ee", 'x')
DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA)
/* Comparison, produces a condition code result. */
DEF_RTL_EXPR(COMPARE, "compare", "ee", '2')
DEF_RTL_EXPR(COMPARE, "compare", "ee", RTX_BIN_ARITH)
/* plus */
DEF_RTL_EXPR(PLUS, "plus", "ee", 'c')
DEF_RTL_EXPR(PLUS, "plus", "ee", RTX_COMM_ARITH)
/* Operand 0 minus operand 1. */
DEF_RTL_EXPR(MINUS, "minus", "ee", '2')
DEF_RTL_EXPR(MINUS, "minus", "ee", RTX_BIN_ARITH)
/* Minus operand 0. */
DEF_RTL_EXPR(NEG, "neg", "e", '1')
DEF_RTL_EXPR(NEG, "neg", "e", RTX_UNARY)
DEF_RTL_EXPR(MULT, "mult", "ee", 'c')
DEF_RTL_EXPR(MULT, "mult", "ee", RTX_COMM_ARITH)
/* Operand 0 divided by operand 1. */
DEF_RTL_EXPR(DIV, "div", "ee", '2')
DEF_RTL_EXPR(DIV, "div", "ee", RTX_BIN_ARITH)
/* Remainder of operand 0 divided by operand 1. */
DEF_RTL_EXPR(MOD, "mod", "ee", '2')
DEF_RTL_EXPR(MOD, "mod", "ee", RTX_BIN_ARITH)
/* Unsigned divide and remainder. */
DEF_RTL_EXPR(UDIV, "udiv", "ee", '2')
DEF_RTL_EXPR(UMOD, "umod", "ee", '2')
DEF_RTL_EXPR(UDIV, "udiv", "ee", RTX_BIN_ARITH)
DEF_RTL_EXPR(UMOD, "umod", "ee", RTX_BIN_ARITH)
/* Bitwise operations. */
DEF_RTL_EXPR(AND, "and", "ee", 'c')
DEF_RTL_EXPR(AND, "and", "ee", RTX_COMM_ARITH)
DEF_RTL_EXPR(IOR, "ior", "ee", 'c')
DEF_RTL_EXPR(IOR, "ior", "ee", RTX_COMM_ARITH)
DEF_RTL_EXPR(XOR, "xor", "ee", 'c')
DEF_RTL_EXPR(XOR, "xor", "ee", RTX_COMM_ARITH)
DEF_RTL_EXPR(NOT, "not", "e", '1')
DEF_RTL_EXPR(NOT, "not", "e", RTX_UNARY)
/* Operand:
0: value to be shifted.
1: number of bits. */
DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2') /* shift left */
DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2') /* rotate left */
DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2') /* arithmetic shift right */
DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2') /* logical shift right */
DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2') /* rotate right */
DEF_RTL_EXPR(ASHIFT, "ashift", "ee", RTX_BIN_ARITH) /* shift left */
DEF_RTL_EXPR(ROTATE, "rotate", "ee", RTX_BIN_ARITH) /* rotate left */
DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", RTX_BIN_ARITH) /* arithmetic shift right */
DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", RTX_BIN_ARITH) /* logical shift right */
DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", RTX_BIN_ARITH) /* rotate right */
/* Minimum and maximum values of two operands. We need both signed and
unsigned forms. (We cannot use MIN for SMIN because it conflicts
with a macro of the same name.) */
DEF_RTL_EXPR(SMIN, "smin", "ee", 'c')
DEF_RTL_EXPR(SMAX, "smax", "ee", 'c')
DEF_RTL_EXPR(UMIN, "umin", "ee", 'c')
DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
DEF_RTL_EXPR(SMIN, "smin", "ee", RTX_COMM_ARITH)
DEF_RTL_EXPR(SMAX, "smax", "ee", RTX_COMM_ARITH)
DEF_RTL_EXPR(UMIN, "umin", "ee", RTX_COMM_ARITH)
DEF_RTL_EXPR(UMAX, "umax", "ee", RTX_COMM_ARITH)
/* These unary operations are used to represent incrementation
and decrementation as they occur in memory addresses.
@ -973,10 +988,10 @@ DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
containing MEM. These operations exist in only two cases:
1. pushes onto the stack.
2. created automatically by the life_analysis pass in flow.c. */
DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'a')
DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'a')
DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'a')
DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'a')
DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC)
DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC)
DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC)
DEF_RTL_EXPR(POST_INC, "post_inc", "e", RTX_AUTOINC)
/* These binary operations are used to represent generic address
side-effects in memory addresses, except for simple incrementation
@ -990,53 +1005,53 @@ DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'a')
form (plus (reg) (reg)) and (plus (reg) (const_int)), where
the first operand of the PLUS has to be the same register as
the first operand of the *_MODIFY. */
DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", 'a')
DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", 'a')
DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", RTX_AUTOINC)
DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", RTX_AUTOINC)
/* Comparison operations. The ordered comparisons exist in two
flavors, signed and unsigned. */
DEF_RTL_EXPR(NE, "ne", "ee", '<')
DEF_RTL_EXPR(EQ, "eq", "ee", '<')
DEF_RTL_EXPR(GE, "ge", "ee", '<')
DEF_RTL_EXPR(GT, "gt", "ee", '<')
DEF_RTL_EXPR(LE, "le", "ee", '<')
DEF_RTL_EXPR(LT, "lt", "ee", '<')
DEF_RTL_EXPR(GEU, "geu", "ee", '<')
DEF_RTL_EXPR(GTU, "gtu", "ee", '<')
DEF_RTL_EXPR(LEU, "leu", "ee", '<')
DEF_RTL_EXPR(LTU, "ltu", "ee", '<')
DEF_RTL_EXPR(NE, "ne", "ee", RTX_COMM_COMPARE)
DEF_RTL_EXPR(EQ, "eq", "ee", RTX_COMM_COMPARE)
DEF_RTL_EXPR(GE, "ge", "ee", RTX_COMPARE)
DEF_RTL_EXPR(GT, "gt", "ee", RTX_COMPARE)
DEF_RTL_EXPR(LE, "le", "ee", RTX_COMPARE)
DEF_RTL_EXPR(LT, "lt", "ee", RTX_COMPARE)
DEF_RTL_EXPR(GEU, "geu", "ee", RTX_COMPARE)
DEF_RTL_EXPR(GTU, "gtu", "ee", RTX_COMPARE)
DEF_RTL_EXPR(LEU, "leu", "ee", RTX_COMPARE)
DEF_RTL_EXPR(LTU, "ltu", "ee", RTX_COMPARE)
/* Additional floating point unordered comparison flavors. */
DEF_RTL_EXPR(UNORDERED, "unordered", "ee", '<')
DEF_RTL_EXPR(ORDERED, "ordered", "ee", '<')
DEF_RTL_EXPR(UNORDERED, "unordered", "ee", RTX_COMM_COMPARE)
DEF_RTL_EXPR(ORDERED, "ordered", "ee", RTX_COMM_COMPARE)
/* These are equivalent to unordered or ... */
DEF_RTL_EXPR(UNEQ, "uneq", "ee", '<')
DEF_RTL_EXPR(UNGE, "unge", "ee", '<')
DEF_RTL_EXPR(UNGT, "ungt", "ee", '<')
DEF_RTL_EXPR(UNLE, "unle", "ee", '<')
DEF_RTL_EXPR(UNLT, "unlt", "ee", '<')
DEF_RTL_EXPR(UNEQ, "uneq", "ee", RTX_COMM_COMPARE)
DEF_RTL_EXPR(UNGE, "unge", "ee", RTX_COMPARE)
DEF_RTL_EXPR(UNGT, "ungt", "ee", RTX_COMPARE)
DEF_RTL_EXPR(UNLE, "unle", "ee", RTX_COMPARE)
DEF_RTL_EXPR(UNLT, "unlt", "ee", RTX_COMPARE)
/* This is an ordered NE, ie !UNEQ, ie false for NaN. */
DEF_RTL_EXPR(LTGT, "ltgt", "ee", '<')
DEF_RTL_EXPR(LTGT, "ltgt", "ee", RTX_COMM_COMPARE)
/* Represents the result of sign-extending the sole operand.
The machine modes of the operand and of the SIGN_EXTEND expression
determine how much sign-extension is going on. */
DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1')
DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", RTX_UNARY)
/* Similar for zero-extension (such as unsigned short to int). */
DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1')
DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", RTX_UNARY)
/* Similar but here the operand has a wider mode. */
DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1')
DEF_RTL_EXPR(TRUNCATE, "truncate", "e", RTX_UNARY)
/* Similar for extending floating-point values (such as SFmode to DFmode). */
DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1')
DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1')
DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", RTX_UNARY)
DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", RTX_UNARY)
/* Conversion of fixed point operand to floating point value. */
DEF_RTL_EXPR(FLOAT, "float", "e", '1')
DEF_RTL_EXPR(FLOAT, "float", "e", RTX_UNARY)
/* With fixed-point machine mode:
Conversion of floating point operand to fixed point value.
@ -1044,38 +1059,38 @@ DEF_RTL_EXPR(FLOAT, "float", "e", '1')
With floating-point machine mode (and operand with same mode):
Operand is rounded toward zero to produce an integer value
represented in floating point. */
DEF_RTL_EXPR(FIX, "fix", "e", '1')
DEF_RTL_EXPR(FIX, "fix", "e", RTX_UNARY)
/* Conversion of unsigned fixed point operand to floating point value. */
DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1')
DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", RTX_UNARY)
/* With fixed-point machine mode:
Conversion of floating point operand to *unsigned* fixed point value.
Value is defined only when the operand's value is an integer. */
DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1')
DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", RTX_UNARY)
/* Absolute value */
DEF_RTL_EXPR(ABS, "abs", "e", '1')
DEF_RTL_EXPR(ABS, "abs", "e", RTX_UNARY)
/* Square root */
DEF_RTL_EXPR(SQRT, "sqrt", "e", '1')
DEF_RTL_EXPR(SQRT, "sqrt", "e", RTX_UNARY)
/* Find first bit that is set.
Value is 1 + number of trailing zeros in the arg.,
or 0 if arg is 0. */
DEF_RTL_EXPR(FFS, "ffs", "e", '1')
DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY)
/* Count leading zeros. */
DEF_RTL_EXPR(CLZ, "clz", "e", '1')
DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY)
/* Count trailing zeros. */
DEF_RTL_EXPR(CTZ, "ctz", "e", '1')
DEF_RTL_EXPR(CTZ, "ctz", "e", RTX_UNARY)
/* Population count (number of 1 bits). */
DEF_RTL_EXPR(POPCOUNT, "popcount", "e", '1')
DEF_RTL_EXPR(POPCOUNT, "popcount", "e", RTX_UNARY)
/* Population parity (number of 1 bits modulo 2). */
DEF_RTL_EXPR(PARITY, "parity", "e", '1')
DEF_RTL_EXPR(PARITY, "parity", "e", RTX_UNARY)
/* Reference to a signed bit-field of specified size and position.
Operand 0 is the memory unit (usually SImode or QImode) which
@ -1086,19 +1101,19 @@ DEF_RTL_EXPR(PARITY, "parity", "e", '1')
operand 2 counts from the msb of the memory unit.
Otherwise, the first bit is the lsb and operand 2 counts from
the lsb of the memory unit. */
DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b')
DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", RTX_BITFIELD_OPS)
/* Similar for unsigned bit-field. */
DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b')
DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", RTX_BITFIELD_OPS)
/* For RISC machines. These save memory when splitting insns. */
/* HIGH are the high-order bits of a constant expression. */
DEF_RTL_EXPR(HIGH, "high", "e", 'o')
DEF_RTL_EXPR(HIGH, "high", "e", RTX_CONST_OBJ)
/* LO_SUM is the sum of a register and the low-order bits
of a constant expression. */
DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", RTX_OBJ)
/* Header for range information. Operand 0 is the NOTE_INSN_RANGE_BEG insn.
Operand 1 is the NOTE_INSN_RANGE_END insn. Operand 2 is a vector of all of
@ -1111,7 +1126,7 @@ DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
is a bitmap of the registers live at the end of the range. Operand 11 is
marker number for the start of the range. Operand 12 is the marker number
for the end of the range. */
DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", 'x')
DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", RTX_EXTRA)
/* Registers that can be substituted within the range. Operand 0 is the
original pseudo register number. Operand 1 will be filled in with the
@ -1126,22 +1141,22 @@ DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", 'x')
across. Operand 8 is the symbol node of the variable if the register is a
user variable. Operand 9 is the block node that the variable is declared
in if the register is a user variable. */
DEF_RTL_EXPR(RANGE_REG, "range_reg", "iiiiiiiitt", 'x')
DEF_RTL_EXPR(RANGE_REG, "range_reg", "iiiiiiiitt", RTX_EXTRA)
/* Information about a local variable's ranges. Operand 0 is an EXPR_LIST of
the different ranges a variable is in where it is copied to a different
pseudo register. Operand 1 is the block that the variable is declared in.
Operand 2 is the number of distinct ranges. */
DEF_RTL_EXPR(RANGE_VAR, "range_var", "eti", 'x')
DEF_RTL_EXPR(RANGE_VAR, "range_var", "eti", RTX_EXTRA)
/* Information about the registers that are live at the current point. Operand
0 is the live bitmap. Operand 1 is the original block number. */
DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", 'x')
DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", RTX_EXTRA)
/* A unary `__builtin_constant_p' expression. These are only emitted
during RTL generation, and then only if optimize > 0. They are
eliminated by the first CSE pass. */
DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", RTX_EXTRA)
/* A placeholder for a CALL_INSN which may be turned into a normal call,
a sibling (tail) call or tail recursion.
@ -1162,49 +1177,49 @@ DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
This method of tail-call elimination is intended to be replaced by
tree-based optimizations once front-end conversions are complete. */
DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", 'x')
DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", RTX_EXTRA)
/* Describes a merge operation between two vector values.
Operands 0 and 1 are the vectors to be merged, operand 2 is a bitmask
that specifies where the parts of the result are taken from. Set bits
indicate operand 0, clear bits indicate operand 1. The parts are defined
by the mode of the vectors. */
DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", '3')
DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", RTX_TERNARY)
/* Describes an operation that selects parts of a vector.
Operands 0 is the source vector, operand 1 is a PARALLEL that contains
a CONST_INT for each of the subparts of the result vector, giving the
number of the source subpart that should be stored into it. */
DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", '2')
DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", RTX_BIN_ARITH)
/* Describes a vector concat operation. Operands 0 and 1 are the source
vectors, the result is a vector that is as long as operands 0 and 1
combined and is the concatenation of the two source vectors. */
DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", '2')
DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", RTX_BIN_ARITH)
/* Describes an operation that converts a small vector into a larger one by
duplicating the input values. The output vector mode must have the same
submodes as the input vector mode, and the number of output parts must be
an integer multiple of the number of input parts. */
DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", '1')
DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY)
/* Addition with signed saturation */
DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", 'c')
DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH)
/* Addition with unsigned saturation */
DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", 'c')
DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH)
/* Operand 0 minus operand 1, with signed saturation. */
DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", '2')
DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH)
/* Operand 0 minus operand 1, with unsigned saturation. */
DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", '2')
DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH)
/* Signed saturating truncate. */
DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", '1')
DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", RTX_UNARY)
/* Unsigned saturating truncate. */
DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", '1')
DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", RTX_UNARY)
/* Information about the variable and its location. */
DEF_RTL_EXPR(VAR_LOCATION, "var_location", "te", 'x')

107
gcc/rtl.h
View File

@ -52,6 +52,48 @@ enum rtx_code {
#define NUM_RTX_CODE ((int) LAST_AND_UNUSED_RTX_CODE)
/* The cast here, saves many elsewhere. */
/* Register Transfer Language EXPRESSIONS CODE CLASSES */
enum rtx_class {
/* We check bit 0-1 of some rtx class codes in the predicates below. */
/* Bit 0 = comparison if 0, arithmetic is 1
Bit 1 = 1 if commutative. */
RTX_COMPARE, /* 0 */
RTX_COMM_COMPARE,
RTX_BIN_ARITH,
RTX_COMM_ARITH,
/* Must follow the four preceding values. */
RTX_UNARY, /* 4 */
RTX_EXTRA,
RTX_MATCH,
RTX_INSN,
/* Bit 0 = 1 if constant. */
RTX_OBJ, /* 8 */
RTX_CONST_OBJ,
RTX_TERNARY,
RTX_BITFIELD_OPS,
RTX_AUTOINC
};
#define RTX_OBJ_MASK (~1)
#define RTX_OBJ_RESULT (RTX_OBJ & RTX_OBJ_MASK)
#define RTX_COMPARE_MASK (~1)
#define RTX_COMPARE_RESULT (RTX_COMPARE & RTX_COMPARE_MASK)
#define RTX_ARITHMETIC_MASK (~1)
#define RTX_ARITHMETIC_RESULT (RTX_COMM_ARITH & RTX_ARITHMETIC_MASK)
#define RTX_BINARY_MASK (~3)
#define RTX_BINARY_RESULT (RTX_COMPARE & RTX_BINARY_MASK)
#define RTX_COMMUTATIVE_MASK (~2)
#define RTX_COMMUTATIVE_RESULT (RTX_COMM_COMPARE & RTX_COMMUTATIVE_MASK)
#define RTX_NON_COMMUTATIVE_RESULT (RTX_COMPARE & RTX_COMMUTATIVE_MASK)
#define RTX_EXPR_FIRST (RTX_COMPARE)
#define RTX_EXPR_LAST (RTX_UNARY)
extern const unsigned char rtx_length[NUM_RTX_CODE];
#define GET_RTX_LENGTH(CODE) (rtx_length[(int) (CODE)])
@ -61,7 +103,7 @@ extern const char * const rtx_name[NUM_RTX_CODE];
extern const char * const rtx_format[NUM_RTX_CODE];
#define GET_RTX_FORMAT(CODE) (rtx_format[(int) (CODE)])
extern const char rtx_class[NUM_RTX_CODE];
extern const enum rtx_class rtx_class[NUM_RTX_CODE];
#define GET_RTX_CLASS(CODE) (rtx_class[(int) (CODE)])
extern const unsigned char rtx_size[NUM_RTX_CODE];
@ -288,15 +330,69 @@ struct rtvec_def GTY(()) {
(JUMP_P (INSN) && (GET_CODE (PATTERN (INSN)) == ADDR_VEC || \
GET_CODE (PATTERN (INSN)) == ADDR_DIFF_VEC))
/* 1 if X is an insn. */
#define INSN_P(X) \
(GET_RTX_CLASS (GET_CODE(X)) == RTX_INSN)
/* 1 if X is a unary operator. */
#define UNARY_P(X) \
(GET_RTX_CLASS (GET_CODE (X)) == RTX_UNARY)
/* 1 if X is a binary operator. */
#define BINARY_P(X) \
((GET_RTX_CLASS (GET_CODE (X)) & RTX_BINARY_MASK) == RTX_BINARY_RESULT)
/* 1 if X is an arithmetic operator. */
#define ARITHMETIC_P(X) \
((GET_RTX_CLASS (GET_CODE (X)) & RTX_ARITHMETIC_MASK) \
== RTX_ARITHMETIC_RESULT)
/* 1 if X is an arithmetic operator. */
#define COMMUTATIVE_ARITH_P(X) \
(GET_RTX_CLASS (GET_CODE (X)) == RTX_COMM_ARITH)
/* 1 if X is a commutative arithmetic operator or a comparison operator.
These two are sometimes selected together because it is possible to
swap the two operands. */
#define SWAPPABLE_OPERANDS_P(X) \
((1 << GET_RTX_CLASS (GET_CODE (X))) \
& ((1 << RTX_COMM_ARITH) | (1 << RTX_COMM_COMPARE) \
| (1 << RTX_COMPARE)))
/* 1 if X is a non-commutative operator. */
#define NON_COMMUTATIVE_P(X) \
((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
== RTX_NON_COMMUTATIVE_RESULT)
/* 1 if X is a commutative operator on integers. */
#define COMMUTATIVE_P(X) \
((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMMUTATIVE_MASK) \
== RTX_COMMUTATIVE_RESULT)
/* 1 if X is a relational operator. */
#define COMPARISON_P(X) \
((GET_RTX_CLASS (GET_CODE (X)) & RTX_COMPARE_MASK) == RTX_COMPARE_RESULT)
/* 1 if X is a constant value that is an integer. */
#define CONSTANT_P(X) \
(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
|| GET_CODE (X) == CONST || GET_CODE (X) == HIGH \
(GET_RTX_CLASS (GET_CODE (X)) == RTX_CONST_OBJ \
|| GET_CODE (X) == CONST_VECTOR \
|| GET_CODE (X) == CONSTANT_P_RTX)
/* 1 if X can be used to represent an object. */
#define OBJECT_P(X) \
((GET_RTX_CLASS (GET_CODE (X)) & RTX_OBJ_MASK) == RTX_OBJ_RESULT)
/* General accessor macros for accessing the fields of an rtx. */
#if defined ENABLE_RTL_CHECKING && (GCC_VERSION >= 2007)
@ -555,9 +651,6 @@ do { \
/* ACCESS MACROS for particular fields of insns. */
/* Determines whether X is an insn. */
#define INSN_P(X) (GET_RTX_CLASS (GET_CODE(X)) == 'i')
/* Holds a unique number for each insn.
These are not necessarily sequentially increasing. */
#define INSN_UID(INSN) XINT (INSN, 0)

70
gcc/rtlanal.c
View File

@ -3031,7 +3031,6 @@ int
commutative_operand_precedence (rtx op)
{
enum rtx_code code = GET_CODE (op);
char class;
/* Constants always come the second operand. Prefer "nice" constants. */
if (code == CONST_INT)
@ -3039,41 +3038,52 @@ commutative_operand_precedence (rtx op)
if (code == CONST_DOUBLE)
return -6;
op = avoid_constant_pool_reference (op);
if (code == CONST_INT)
return -5;
if (code == CONST_DOUBLE)
return -4;
if (CONSTANT_P (op))
return -3;
/* SUBREGs of objects should come second. */
if (code == SUBREG
&& GET_RTX_CLASS (GET_CODE (SUBREG_REG (op))) == 'o')
return -2;
switch (GET_RTX_CLASS (code))
{
case RTX_CONST_OBJ:
if (code == CONST_INT)
return -5;
if (code == CONST_DOUBLE)
return -4;
return -3;
class = GET_RTX_CLASS (code);
case RTX_EXTRA:
/* SUBREGs of objects should come second. */
if (code == SUBREG && OBJECT_P (SUBREG_REG (op)))
return -2;
/* Prefer operands that are themselves commutative to be first.
This helps to make things linear. In particular,
(and (and (reg) (reg)) (not (reg))) is canonical. */
if (class == 'c')
return 4;
if (!CONSTANT_P (op))
return 0;
else
/* As for RTX_CONST_OBJ. */
return -3;
/* If only one operand is a binary expression, it will be the first
operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
is canonical, although it will usually be further simplified. */
if (class == '2')
return 2;
case RTX_OBJ:
/* Complex expressions should be the first, so decrease priority
of objects. */
return -1;
case RTX_COMM_ARITH:
/* Prefer operands that are themselves commutative to be first.
This helps to make things linear. In particular,
(and (and (reg) (reg)) (not (reg))) is canonical. */
return 4;
case RTX_BIN_ARITH:
/* If only one operand is a binary expression, it will be the first
operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
is canonical, although it will usually be further simplified. */
return 2;
/* Then prefer NEG and NOT. */
if (code == NEG || code == NOT)
return 1;
case RTX_UNARY:
/* Then prefer NEG and NOT. */
if (code == NEG || code == NOT)
return 1;
/* Complex expressions should be the first, so decrease priority
of objects. */
if (GET_RTX_CLASS (code) == 'o')
return -1;
return 0;
default:
return 0;
}
}
/* Return 1 iff it is necessary to swap operands of commutative operation

4
gcc/sched-deps.c
View File

@ -171,8 +171,8 @@ get_condition (rtx insn)
static int
conditions_mutex_p (rtx cond1, rtx cond2)
{
if (GET_RTX_CLASS (GET_CODE (cond1)) == '<'
&& GET_RTX_CLASS (GET_CODE (cond2)) == '<'
if (COMPARISON_P (cond1)
&& COMPARISON_P (cond2)
&& GET_CODE (cond1) == reverse_condition (GET_CODE (cond2))
&& XEXP (cond1, 0) == XEXP (cond2, 0)
&& XEXP (cond1, 1) == XEXP (cond2, 1))

2
gcc/sched-rgn.c
View File

@ -346,7 +346,7 @@ is_cfg_nonregular (void)
for (insn = BB_HEAD (b); ; insn = NEXT_INSN (insn))
{
code = GET_CODE (insn);
if (GET_RTX_CLASS (code) == 'i' && code != JUMP_INSN)
if (INSN_P (insn) && code != JUMP_INSN)
{
rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX);

51
gcc/simplify-rtx.c
View File

@ -77,7 +77,7 @@ simplify_gen_binary (enum rtx_code code, enum machine_mode mode, rtx op0,
rtx tem;
/* Put complex operands first and constants second if commutative. */
if (GET_RTX_CLASS (code) == 'c'
if (GET_RTX_CLASS (code) == RTX_COMM_ARITH
&& swap_commutative_operands_p (op0, op1))
tem = op0, op0 = op1, op1 = tem;
@ -236,7 +236,7 @@ simplify_gen_relational (enum rtx_code code, enum machine_mode mode,
XEXP (op0, 0), XEXP (op0, 1));
/* If op0 is a comparison, extract the comparison arguments form it. */
if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && op1 == const0_rtx)
if (COMPARISON_P (op0) && op1 == const0_rtx)
{
if (code == NE)
{
@ -277,7 +277,7 @@ simplify_replace_rtx (rtx x, rtx old, rtx new)
switch (GET_RTX_CLASS (code))
{
case '1':
case RTX_UNARY:
op0 = XEXP (x, 0);
op_mode = GET_MODE (op0);
op0 = simplify_replace_rtx (op0, old, new);
@ -285,15 +285,16 @@ simplify_replace_rtx (rtx x, rtx old, rtx new)
return x;
return simplify_gen_unary (code, mode, op0, op_mode);
case '2':
case 'c':
case RTX_BIN_ARITH:
case RTX_COMM_ARITH:
op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
if (op0 == XEXP (x, 0) && op1 == XEXP (x, 1))
return x;
return simplify_gen_binary (code, mode, op0, op1);
case '<':
case RTX_COMPARE:
case RTX_COMM_COMPARE:
op0 = XEXP (x, 0);
op1 = XEXP (x, 1);
op_mode = GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1);
@ -303,8 +304,8 @@ simplify_replace_rtx (rtx x, rtx old, rtx new)
return x;
return simplify_gen_relational (code, mode, op_mode, op0, op1);
case '3':
case 'b':
case RTX_TERNARY:
case RTX_BITFIELD_OPS:
op0 = XEXP (x, 0);
op_mode = GET_MODE (op0);
op0 = simplify_replace_rtx (op0, old, new);
@ -316,7 +317,7 @@ simplify_replace_rtx (rtx x, rtx old, rtx new)
op_mode = GET_MODE (op0);
return simplify_gen_ternary (code, mode, op_mode, op0, op1, op2);
case 'x':
case RTX_EXTRA:
/* The only case we try to handle is a SUBREG. */
if (code == SUBREG)
{
@ -330,7 +331,7 @@ simplify_replace_rtx (rtx x, rtx old, rtx new)
}
break;
case 'o':
case RTX_OBJ:
if (code == MEM)
{
op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
@ -902,7 +903,7 @@ simplify_unary_operation (enum rtx_code code, enum machine_mode mode,
return XEXP (op, 0);
/* (not (eq X Y)) == (ne X Y), etc. */
if (GET_RTX_CLASS (GET_CODE (op)) == '<'
if (COMPARISON_P (op)
&& (mode == BImode || STORE_FLAG_VALUE == -1)
&& ((reversed = reversed_comparison_code (op, NULL_RTX))
!= UNKNOWN))
@ -942,7 +943,7 @@ simplify_unary_operation (enum rtx_code code, enum machine_mode mode,
/* If STORE_FLAG_VALUE is -1, (not (comparison X Y)) can be done
by reversing the comparison code if valid. */
if (STORE_FLAG_VALUE == -1
&& GET_RTX_CLASS (GET_CODE (op)) == '<'
&& COMPARISON_P (op)
&& (reversed = reversed_comparison_code (op, NULL_RTX))
!= UNKNOWN)
return simplify_gen_relational (reversed, mode, VOIDmode,
@ -1165,16 +1166,19 @@ simplify_binary_operation (enum rtx_code code, enum machine_mode mode,
rtx trueop0, trueop1;
rtx tem;
#ifdef ENABLE_CHECKING
/* Relational operations don't work here. We must know the mode
of the operands in order to do the comparison correctly.
Assuming a full word can give incorrect results.
Consider comparing 128 with -128 in QImode. */
if (GET_RTX_CLASS (code) == '<')
if (GET_RTX_CLASS (code) == RTX_COMPARE
|| GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
abort ();
#endif
/* Make sure the constant is second. */
if (GET_RTX_CLASS (code) == 'c'
if (GET_RTX_CLASS (code) == RTX_COMM_ARITH
&& swap_commutative_operands_p (op0, op1))
{
tem = op0, op0 = op1, op1 = tem;
@ -2885,7 +2889,7 @@ simplify_ternary_operation (enum rtx_code code, enum machine_mode mode,
&& rtx_equal_p (XEXP (op0, 1), op1))))
return op2;
if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
if (COMPARISON_P (op0) && ! side_effects_p (op0))
{
enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
? GET_MODE (XEXP (op0, 1))
@ -3536,25 +3540,26 @@ simplify_rtx (rtx x)
switch (GET_RTX_CLASS (code))
{
case '1':
case RTX_UNARY:
return simplify_unary_operation (code, mode,
XEXP (x, 0), GET_MODE (XEXP (x, 0)));
case 'c':
case RTX_COMM_ARITH:
if (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
return simplify_gen_binary (code, mode, XEXP (x, 1), XEXP (x, 0));
/* Fall through.... */
case '2':
case RTX_BIN_ARITH:
return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
case '3':
case 'b':
case RTX_TERNARY:
case RTX_BITFIELD_OPS:
return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
XEXP (x, 0), XEXP (x, 1),
XEXP (x, 2));
case '<':
case RTX_COMPARE:
case RTX_COMM_COMPARE:
temp = simplify_relational_operation (code,
((GET_MODE (XEXP (x, 0))
!= VOIDmode)
@ -3573,7 +3578,7 @@ simplify_rtx (rtx x)
#endif
return temp;
case 'x':
case RTX_EXTRA:
if (code == SUBREG)
return simplify_gen_subreg (mode, SUBREG_REG (x),
GET_MODE (SUBREG_REG (x)),
@ -3585,7 +3590,7 @@ simplify_rtx (rtx x)
}
break;
case 'o':
case RTX_OBJ:
if (code == LO_SUM)
{
/* Convert (lo_sum (high FOO) FOO) to FOO. */

28
gcc/unroll.c
View File

@ -1,6 +1,6 @@
/* Try to unroll loops, and split induction variables.
Copyright (C) 1992, 1993, 1994, 1995, 1997, 1998, 1999, 2000, 2001,
2002, 2003
2002, 2003, 2004
Free Software Foundation, Inc.
Contributed by James E. Wilson, Cygnus Support/UC Berkeley.
@ -2872,7 +2872,6 @@ static int
reg_dead_after_loop (const struct loop *loop, rtx reg)
{
rtx insn, label;
enum rtx_code code;
int jump_count = 0;
int label_count = 0;
@ -2902,8 +2901,7 @@ reg_dead_after_loop (const struct loop *loop, rtx reg)
insn = NEXT_INSN (XEXP (label, 0));
while (insn)
{
code = GET_CODE (insn);
if (GET_RTX_CLASS (code) == 'i')
if (INSN_P (insn))
{
rtx set, note;
@ -2917,18 +2915,18 @@ reg_dead_after_loop (const struct loop *loop, rtx reg)
set = single_set (insn);
if (set && rtx_equal_p (SET_DEST (set), reg))
break;
}
if (code == JUMP_INSN)
{
if (GET_CODE (PATTERN (insn)) == RETURN)
break;
else if (!any_uncondjump_p (insn)
/* Prevent infinite loop following infinite loops. */
|| jump_count++ > 20)
return 0;
else
insn = JUMP_LABEL (insn);
if (GET_CODE (insn) == JUMP_INSN)
{
if (GET_CODE (PATTERN (insn)) == RETURN)
break;
else if (!any_uncondjump_p (insn)
/* Prevent infinite loop following infinite loops. */
|| jump_count++ > 20)
return 0;
else
insn = JUMP_LABEL (insn);
}
}
insn = NEXT_INSN (insn);