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[NDS32] Split movdi/df if reigster number is illegal.

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gcc/
	* config/nds32/nds32-doubleword.md: New define_split pattern for
	illegal register number.

From-SVN: r259646
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Chung-Ju Wu 2018-04-25 12:17:29 +00:00 committed by Chung-Ju Wu
parent ba169b7424
commit ed4230b2f9
2 changed files with 23 additions and 0 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com>
* config/nds32/nds32-doubleword.md: New define_split pattern for
illegal register number.
2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com>
* config/nds32/nds32.c (nds32_print_operand): Set op_value ealier.

18
gcc/config/nds32/nds32-doubleword.md
View File

@ -118,6 +118,24 @@
])
(set_attr "feature" " v1, v1, v1, v1, v1, v1, fpu, fpu, fpu, fpu, fpu")])
;; Split move_di pattern when the hard register is odd.
(define_split
[(set (match_operand:DIDF 0 "register_operand" "")
(match_operand:DIDF 1 "register_operand" ""))]
"(NDS32_IS_GPR_REGNUM (REGNO (operands[0]))
&& ((REGNO (operands[0]) & 0x1) == 1))
|| (NDS32_IS_GPR_REGNUM (REGNO (operands[1]))
&& ((REGNO (operands[1]) & 0x1) == 1))"
[(set (match_dup 2) (match_dup 3))
(set (match_dup 4) (match_dup 5))]
{
operands[2] = gen_lowpart (SImode, operands[0]);
operands[4] = gen_highpart (SImode, operands[0]);
operands[3] = gen_lowpart (SImode, operands[1]);
operands[5] = gen_highpart (SImode, operands[1]);
}
)
(define_split
[(set (match_operand:DIDF 0 "register_operand" "")
(match_operand:DIDF 1 "const_double_operand" ""))]