re PR target/11089 (ICE: instantiate_virtual_regs_lossage while using sse built-ins)
PR target/11089 * config/i386/i386.md (sse_movaps): Use an expander to force one operand to be a register. (sse_movups): Likewise. From-SVN: r67883
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@ -1,3 +1,10 @@
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2003-06-12 Richard Henderson <rth@redhat.com>
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PR target/11089
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* config/i386/i386.md (sse_movaps): Use an expander to force
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one operand to be a register.
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(sse_movups): Likewise.
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2003-06-13 Doug Evans <dje@sebabeach.org>
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Remove some build warnings.
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@ -19530,7 +19530,22 @@
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;; These two patterns are useful for specifying exactly whether to use
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;; movaps or movups
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(define_insn "sse_movaps"
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(define_expand "sse_movaps"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "")
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(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "")]
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UNSPEC_MOVA))]
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"TARGET_SSE"
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{
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
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{
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rtx tmp = gen_reg_rtx (V4SFmode);
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emit_insn (gen_sse_movaps (tmp, operands[1]));
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emit_move_insn (operands[0], tmp);
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DONE;
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}
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})
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(define_insn "*sse_movaps_1"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m")
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(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")]
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UNSPEC_MOVA))]
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@ -19540,7 +19555,22 @@
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[(set_attr "type" "ssemov,ssemov")
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(set_attr "mode" "V4SF")])
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(define_insn "sse_movups"
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(define_expand "sse_movups"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "")
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(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "")]
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UNSPEC_MOVU))]
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"TARGET_SSE"
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{
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
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{
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rtx tmp = gen_reg_rtx (V4SFmode);
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emit_insn (gen_sse_movups (tmp, operands[1]));
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emit_move_insn (operands[0], tmp);
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DONE;
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}
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})
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(define_insn "*sse_movups_1"
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[(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m")
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(unspec:V4SF [(match_operand:V4SF 1 "nonimmediate_operand" "xm,x")]
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UNSPEC_MOVU))]
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@ -19550,7 +19580,6 @@
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[(set_attr "type" "ssecvt,ssecvt")
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(set_attr "mode" "V4SF")])
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;; SSE Strange Moves.
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(define_insn "sse_movmskps"
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27
gcc/testsuite/gcc.dg/i386-sse-4.c
Normal file
27
gcc/testsuite/gcc.dg/i386-sse-4.c
Normal file
@ -0,0 +1,27 @@
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/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
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/* { dg-options "-O0 -msse" } */
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typedef void __vr __attribute__ ((__mode__ (__V4SF__)));
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struct vector
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{
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union
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{
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__vr v;
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float f[4];
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};
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};
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void
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doit ()
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{
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float f[4];
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struct vector v;
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f[0] = 0;
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f[1] = 1;
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f[2] = 2;
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f[3] = 3;
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v.v = __builtin_ia32_loadups (f);
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}
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