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cse.c (fold_rtx): Revert 29 Dec change. 

* cse.c (fold_rtx): Revert 29 Dec change.
        (cse_insn): Revert 12 Jan change.
        * expr.c (expand_builtin): Don't emit CONST around CONSTANT_P_RTX.
        * regclass.c (reg_scan_mark_refs): Revert 29 Dec change.
        * rtl.def: Likewise.
        * rtl.h (CONSTANT_P): Likewise.
        * expr.c (emit_move_insn): Never try to flush CONSTANT_P_RTX
        to memory.
        * recog.c (immediate_operand): Accept CONSTANT_P_RTX.
        * alpha.c (input_operand): Likewise.
        * c4x.c (const_operand): Likewise.
        * explow.c (allocate_dynamic_stack_space): Use register_operand
        instead of arith_operand, which does not exist.
        * 1750a.h: Fix comment closure.
        * a29k.c (a29k_set_memflags): Fix typo in 19 Jan change.
        * arc.md (one_cmplsi2_set_cc_insn): Fix set mode mismatch.
        * arm.h (TARGET_SWITCHES): Fix typo.
        * i370.md (anon mult and div patterns): Fix set mode mismatch.
        * i860.c (output_delayed_branch): Fix operands to constrain_operands.
        (output_delay_insn): Likewise.
        * m88k.md (anon rotate insns): Fix set mode mismatch.
        (anon BLKmode moves): Commonize and fix set mode mismatches.
        * ns32k.md (udivmoddi[shq]i4_internal): Fix mode mismatch.
        * romp.md (movdf): Fix typo.

From-SVN: r24796
This commit is contained in:
Richard Henderson 1999-01-20 18:21:28 -08:00 committed by Richard Henderson
parent 898df643ab
commit ee5332b81a
19 changed files with 118 additions and 109 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
gcc/ChangeLog
View File

@ -1,3 +1,33 @@
Thu Jan 21 01:59:30 1999 Richard Henderson <rth@cygnus.com>
* cse.c (fold_rtx): Revert 29 Dec change.
(cse_insn): Revert 12 Jan change.
* expr.c (expand_builtin): Don't emit CONST around CONSTANT_P_RTX.
* regclass.c (reg_scan_mark_refs): Revert 29 Dec change.
* rtl.def: Likewise.
* rtl.h (CONSTANT_P): Likewise.
* expr.c (emit_move_insn): Never try to flush CONSTANT_P_RTX
to memory.
* recog.c (immediate_operand): Accept CONSTANT_P_RTX.
* alpha.c (input_operand): Likewise.
* c4x.c (const_operand): Likewise.
* explow.c (allocate_dynamic_stack_space): Use register_operand
instead of arith_operand, which does not exist.
* 1750a.h: Fix comment closure.
* a29k.c (a29k_set_memflags): Fix typo in 19 Jan change.
* arc.md (one_cmplsi2_set_cc_insn): Fix set mode mismatch.
* arm.h (TARGET_SWITCHES): Fix typo.
* i370.md (anon mult and div patterns): Fix set mode mismatch.
* i860.c (output_delayed_branch): Fix operands to constrain_operands.
(output_delay_insn): Likewise.
* m88k.md (anon rotate insns): Fix set mode mismatch.
(anon BLKmode moves): Commonize and fix set mode mismatches.
* ns32k.md (udivmoddi[shq]i4_internal): Fix mode mismatch.
* romp.md (movdf): Fix typo.
Thu Jan 21 00:29:35 1999 Nathan Sidwell <nathan@acm.org>
* Makefile.in (install-common): Remove extraneous chmod for gcov

4
gcc/config/1750a/1750a.h
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@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler.
Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
Copyright (C) 1994, 95-98, 1999 Free Software Foundation, Inc.
Contributed by O.M.Kellogg, DASA (oliver.kellogg@space.otn.dasa.de)
This file is part of GNU CC.
@ -732,7 +732,7 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA
reg_renumber[REGNO] >= 12 && reg_renumber[REGNO] <= 15)
/* Now macros that check whether X is a register and also,
strictly, whether it is in a specified class.
strictly, whether it is in a specified class. */
/* 1 if X is an address register */

2
gcc/config/a29k/a29k.c
View File

@ -530,7 +530,7 @@ a29k_set_memflags (insn, ref)
/* Note that it is always safe to get these flags, though they won't
be what we think if REF is not a MEM. */
int in_struct_p = MEM_IN_STRUCT_P (ref);
int scalar_p = MEM_IN_SCALAR_P (ref);
int scalar_p = MEM_SCALAR_P (ref);
int volatile_p = MEM_VOLATILE_P (ref);
int unchanging_p = RTX_UNCHANGING_P (ref);

3
gcc/config/alpha/alpha.c
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@ -613,6 +613,9 @@ input_operand (op, mode)
case CONST_INT:
return mode == QImode || mode == HImode || add_operand (op, mode);
case CONSTANT_P_RTX:
return 1;
default:
break;
}

4
gcc/config/arc/arc.md
View File

@ -1,5 +1,5 @@
;; Machine description of the Argonaut ARC cpu for GNU C compiler
;; Copyright (C) 1994, 1997 Free Software Foundation, Inc.
;; Copyright (C) 1994, 1997, 1999 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -1039,7 +1039,7 @@
[(set_attr "type" "unary")])
(define_insn "*one_cmplsi2_set_cc_insn"
[(set (reg:CCZN 61) (compare:CC
[(set (reg:CCZN 61) (compare:CCZN
(not:SI (match_operand:SI 1 "register_operand" "r"))
(const_int 0)))
(set (match_operand:SI 0 "register_operand" "=r")

1
gcc/config/arm/arm.h
View File

@ -385,7 +385,6 @@ function tries to return. */
{"abort-on-noreturn", ARM_FLAG_ABORT_NORETURN, \
"Generate a call to abort if a noreturn function returns"}, \
{"no-abort-on-noreturn", -ARM_FLAG_ABORT_NORETURN, ""}, \
SUBTARGET_SWITCHES \
{"", TARGET_DEFAULT } \
}

3
gcc/config/c4x/c4x.c
View File

@ -2612,6 +2612,9 @@ const_operand (op, mode)
case Pmode:
#endif
case QImode:
if (GET_CODE (op) == CONSTANT_P_RTX)
return 1;
if (GET_CODE (op) != CONST_INT
|| (GET_MODE (op) != VOIDmode && GET_MODE (op) != mode)
|| GET_MODE_CLASS (mode) != MODE_INT)

8
gcc/config/i370/i370.md
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU compiler -- System/370 version.
;; Copyright (C) 1989, 93, 94, 95, 1997 Free Software Foundation, Inc.
;; Copyright (C) 1989, 93, 94, 95, 97, 1999 Free Software Foundation, Inc.
;; Contributed by Jan Stein (jan@cd.chalmers.se).
;; Modified for MVS C/370 by Dave Pitts (dpitts@nyx.cs.du.edu)
@ -2125,7 +2125,7 @@ check_label_emit ();
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=d")
(mult:SI (match_operand:DI 1 "general_operand" "%0")
(mult:DI (match_operand:DI 1 "general_operand" "%0")
(match_operand:SI 2 "general_operand" "g")))]
""
"*
@ -2281,7 +2281,7 @@ check_label_emit ();
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=d")
(div:SI (match_operand:DI 1 "register_operand" "0")
(div:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:SI 2 "general_operand" "")))]
""
"*
@ -2441,7 +2441,7 @@ check_label_emit ();
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=d")
(mod:SI (match_operand:DI 1 "register_operand" "0")
(mod:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:SI 2 "general_operand" "")))]
""
"*

6
gcc/config/i860/i860.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Intel 860
Copyright (C) 1989, 1991, 1997, 1998 Free Software Foundation, Inc.
Copyright (C) 1989, 91, 97, 98, 1999 Free Software Foundation, Inc.
Derived from sparc.c.
Written by Richard Stallman (rms@ai.mit.edu).
@ -1447,7 +1447,7 @@ output_delayed_branch (template, operands, insn)
}
insn_extract (delay_insn);
if (! constrain_operands (insn_code_number, 1))
if (! constrain_operands (1))
fatal_insn_not_found (delay_insn);
template = insn_template[insn_code_number];
@ -1490,7 +1490,7 @@ output_delay_insn (delay_insn)
}
#ifdef REGISTER_CONSTRAINTS
if (! constrain_operands (insn_code_number, 1))
if (! constrain_operands (1))
abort ();
#endif

87
gcc/config/m88k/m88k.md
View File

@ -1,5 +1,5 @@
;;- Machine description for the Motorola 88000 for GNU C compiler
;;; Copyright (C) 1988, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
;;; Copyright (C) 1988, 92-96, 1999 Free Software Foundation, Inc.
;; Contributed by Michael Tiemann (tiemann@mcc.com)
;; Currently maintained by (gcc@dg-rtp.dg.com)
@ -759,7 +759,7 @@
(define_insn ""
[(set (match_operand:CCEVEN 0 "register_operand" "=r")
(rotate:CC (match_operand 1 "partial_ccmode_register_operand" "r")
(rotate:CCEVEN (match_operand 1 "partial_ccmode_register_operand" "r")
(match_operand:CC 2 "int5_operand" "")))]
""
"rot %0,%1,%2"
@ -782,7 +782,7 @@
(define_insn ""
[(set (match_operand:CCEVEN 0 "register_operand" "=r")
(ior:CC (rotate:CC (match_operand 1 "partial_ccmode_register_operand" "r")
(ior:CCEVEN (rotate:CC (match_operand 1 "partial_ccmode_register_operand" "r")
(match_operand:CC 2 "int5_operand" ""))
(match_operand 3 "partial_ccmode_register_operand" "r")))
(clobber (match_scratch:CCEVEN 4 "=r"))]
@ -2129,60 +2129,49 @@
DONE;
}")
;; ??? We shouldn't be allowing such mode mismatches
(define_insn ""
[(set (match_operand:QI 0 "register_operand" "=r")
[(set (match_operand 0 "register_operand" "=r")
(match_operand:BLK 1 "memory_operand" "m"))]
""
"%V1ld.bu\\t %0,%1"
"*
{
switch (GET_MODE (operands[0]))
{
case QImode:
return \"%V1ld.bu\\t %0,%1\";
case HImode:
return \"%V1ld.hu\\t %0,%1\";
case SImode:
return \"%V1ld\\t %0,%1\";
case DImode:
return \"%V1ld.d\\t %0,%1\";
default:
abort ();
}
}"
[(set_attr "type" "load")])
(define_insn ""
[(set (match_operand:HI 0 "register_operand" "=r")
(match_operand:BLK 1 "memory_operand" "m"))]
""
"%V1ld.hu\\t %0,%1"
[(set_attr "type" "load")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:BLK 1 "memory_operand" "m"))]
""
"%V1ld\\t %0,%1"
[(set_attr "type" "load")])
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(match_operand:BLK 1 "memory_operand" "m"))]
""
"%V1ld.d\\t %0,%1"
[(set_attr "type" "loadd")])
(define_insn ""
[(set (match_operand:BLK 0 "memory_operand" "=m")
(match_operand:QI 1 "register_operand" "r"))]
(match_operand 1 "register_operand" "r"))]
""
"%v0st.b\\t %1,%0"
[(set_attr "type" "store")])
(define_insn ""
[(set (match_operand:BLK 0 "memory_operand" "=m")
(match_operand:HI 1 "register_operand" "r"))]
""
"%v0st.h\\t %1,%0"
[(set_attr "type" "store")])
(define_insn ""
[(set (match_operand:BLK 0 "memory_operand" "=m")
(match_operand:SI 1 "register_operand" "r"))]
""
"%v0st\\t %1,%0"
[(set_attr "type" "store")])
(define_insn ""
[(set (match_operand:BLK 0 "memory_operand" "=m")
(match_operand:DI 1 "register_operand" "r"))]
""
"%v0st.d\\t %1,%0"
"*
{
switch (GET_MODE (operands[1]))
{
case QImode:
return \"%v0st.b\\t %1,%0\";
case HImode:
return \"%v0st.h\\t %1,%0\";
case SImode:
return \"%v0st\\t %1,%0\";
case DImode:
return \"%v0st.d\\t %1,%0\";
default:
abort ();
}
}"
[(set_attr "type" "store")])
;; Call a non-looping block move library function (e.g. __movstrSI96x64).

8
gcc/config/ns32k/ns32k.md
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU compiler, ns32000 Version
;; Copyright (C) 1988, 1994, 1996 Free Software Foundation, Inc.
;; Copyright (C) 1988, 1994, 1996, 1999 Free Software Foundation, Inc.
;; Contributed by Michael Tiemann (tiemann@cygnus.com)
;; This file is part of GNU CC.
@ -1276,7 +1276,7 @@
;; ever used when explicitly emitted by a define_expand.
(define_insn "udivmoddisi4_internal"
[(set (match_operand:DI 0 "reg_or_mem_operand" "=rm")
(unspec:SI [(match_operand:DI 1 "reg_or_mem_operand" "0")
(unspec:DI [(match_operand:DI 1 "reg_or_mem_operand" "0")
(match_operand:SI 2 "general_operand" "g")] 0))]
""
"deid %2,%0")
@ -1341,7 +1341,7 @@
;; way to do this, so just restrict operand 0 and 1 to be in registers.
(define_insn "udivmoddihi4_internal"
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:HI [(match_operand:DI 1 "register_operand" "0")
(unspec:DI [(match_operand:DI 1 "register_operand" "0")
(match_operand:HI 2 "general_operand" "g")] 0))]
""
"deiw %2,%0")
@ -1398,7 +1398,7 @@
;; way to do this, so just restrict operand 0 and 1 to be in registers.
(define_insn "udivmoddiqi4_internal"
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:QI [(match_operand:DI 1 "reg_or_mem_operand" "0")
(unspec:DI [(match_operand:DI 1 "reg_or_mem_operand" "0")
(match_operand:QI 2 "general_operand" "g")] 0))]
""
"deib %2,%0")

4
gcc/config/romp/romp.md
View File

@ -1,5 +1,5 @@
;;- Machine description for ROMP chip for GNU C compiler
;; Copyright (C) 1988, 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
;; Copyright (C) 1988, 91, 93, 94, 95, 1999 Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GNU CC.
@ -651,7 +651,7 @@
start_sequence ();
if (GET_CODE (operands[0]) != REG
|| ! refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
operands[1]), 0)
operands[1], 0))
{
emit_move_insn (operand_subword (op0, 0, 1, DFmode),
operand_subword_force (op1, 0, DFmode));

27
gcc/cse.c
View File

@ -4931,21 +4931,6 @@ fold_rtx (x, insn)
switch (code)
{
case CONST:
/* If the operand is a CONSTANT_P_RTX, see if what's inside it
is known to be constant and replace the whole thing with a
CONST_INT of either zero or one. Note that this code assumes
that an insn that recognizes a CONST will also recognize a
CONST_INT, but that seems to be a safe assumption. */
if (GET_CODE (XEXP (x, 0)) == CONSTANT_P_RTX)
{
x = equiv_constant (fold_rtx (XEXP (XEXP (x, 0), 0), 0));
return (x != 0 && (GET_CODE (x) == CONST_INT
|| GET_CODE (x) == CONST_DOUBLE)
? const1_rtx : const0_rtx);
}
/* ... fall through ... */
case CONST_INT:
case CONST_DOUBLE:
case SYMBOL_REF:
@ -5865,6 +5850,12 @@ fold_rtx (x, insn)
const_arg1 ? const_arg1 : folded_arg1,
const_arg2 ? const_arg2 : XEXP (x, 2));
break;
case 'x':
/* Always eliminate CONSTANT_P_RTX at this stage. */
if (code == CONSTANT_P_RTX)
return (const_arg0 ? const1_rtx : const0_rtx);
break;
}
return new ? new : x;
@ -6864,12 +6855,6 @@ cse_insn (insn, libcall_insn)
if (src == src_folded)
src_folded = 0;
/* Folds of constant_p_rtx are to be preferred, since we do
not wish any to live past CSE. */
if (src && GET_CODE (src) == CONST
&& GET_CODE (XEXP (src, 0)) == CONSTANT_P_RTX)
src = 0;
/* At this point, ELT, if non-zero, points to a class of expressions
equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
and SRC_RELATED, if non-zero, each contain additional equivalent

2
gcc/explow.c
View File

@ -1204,7 +1204,7 @@ allocate_dynamic_stack_space (size, target, known_align)
/* Our optimization works based upon being able to perform a simple
transformation of this RTL into a (set REG REG) so make sure things
did in fact end up in a REG. */
if (!arith_operand (setjmpless_size, Pmode))
if (!register_operand (setjmpless_size, Pmode))
setjmpless_size = force_reg (Pmode, setjmpless_size);
}

16
gcc/expr.c
View File

@ -2497,7 +2497,10 @@ emit_move_insn (x, y)
if (mode == BLKmode || (GET_MODE (y) != mode && GET_MODE (y) != VOIDmode))
abort ();
if (CONSTANT_P (y) && ! LEGITIMATE_CONSTANT_P (y))
/* Never force constant_p_rtx to memory. */
if (GET_CODE (y) == CONSTANT_P_RTX)
;
else if (CONSTANT_P (y) && ! LEGITIMATE_CONSTANT_P (y))
y = force_const_mem (mode, y);
/* If X or Y are memory references, verify that their addresses are valid
@ -8993,16 +8996,11 @@ expand_builtin (exp, target, subtarget, mode, ignore)
|| POINTER_TYPE_P (TREE_TYPE (arg)))
return const0_rtx;
/* Otherwise, emit (const (constant_p_rtx (ARG))) and let CSE
get a chance to see if it can deduce whether ARG is constant. */
/* ??? We always generate the CONST in ptr_mode since that's
certain to be valid on this machine, then convert it to
whatever we need. */
/* Otherwise, emit (constant_p_rtx (ARG)) and let CSE get a
chance to see if it can deduce whether ARG is constant. */
tmp = expand_expr (arg, NULL_RTX, VOIDmode, 0);
tmp = gen_rtx_CONSTANT_P_RTX (ptr_mode, tmp);
tmp = gen_rtx_CONST (ptr_mode, tmp);
tmp = convert_to_mode (value_mode, tmp, 0);
tmp = gen_rtx_CONSTANT_P_RTX (value_mode, tmp);
return tmp;
}

6
gcc/recog.c
View File

@ -1088,6 +1088,12 @@ immediate_operand (op, mode)
&& GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
return 0;
/* Accept CONSTANT_P_RTX, since it will be gone by CSE1 and
result in 0/1. It seems a safe assumption that this is
in range for everyone. */
if (GET_CODE (op) == CONSTANT_P_RTX)
return 1;
return (CONSTANT_P (op)
&& (GET_MODE (op) == mode || mode == VOIDmode
|| GET_MODE (op) == VOIDmode)

4
gcc/regclass.c
View File

@ -2020,10 +2020,6 @@ reg_scan_mark_refs (x, insn, note_flag, min_regno)
switch (code)
{
case CONST:
if (GET_CODE (XEXP (x, 0)) == CONSTANT_P_RTX)
reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn, note_flag, min_regno);
return;
case CONST_INT:
case CONST_DOUBLE:
case CC0:

9
gcc/rtl.def
View File

@ -1,7 +1,7 @@
/* This file contains the definitions and documentation for the
Register Transfer Expressions (rtx's) that make up the
Register Transfer Language (rtl) used in the Back End of the GNU compiler.
Copyright (C) 1987, 88, 92, 94, 95, 97, 1998 Free Software Foundation, Inc.
Copyright (C) 1987, 88, 92, 94, 95, 97, 98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -850,10 +850,9 @@ DEF_RTL_EXPR(RANGE_VAR, "range_var", "eti", 'x')
0 is the live bitmap. Operand 1 is the original block number. */
DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", 'x')
/* A unary `__builtin_constant_p' expression. This RTL code may only be used
as an operand of a CONST. This pattern is only emitted during RTL
generation and then only if optimize > 0. It is converted by the first
CSE pass into the appropriate CONST_INT. */
/* A unary `__builtin_constant_p' expression. These are only emitted
during RTL generation, and then only if optimize > 0. They are
eliminated by the first CSE pass. */
DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
/*

3
gcc/rtl.h
View File

@ -219,7 +219,8 @@ typedef struct rtvec_def{
#define CONSTANT_P(X) \
(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
|| GET_CODE (X) == CONST || GET_CODE (X) == HIGH)
|| GET_CODE (X) == CONST || GET_CODE (X) == HIGH \
|| GET_CODE (X) == CONSTANT_P_RTX)
/* General accessor macros for accessing the fields of an rtx. */