re PR target/50313 (ARM: PIC code references a non-existant label)
Fix PR target/50313 From-SVN: r183328
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f06129ead4
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@ -1,3 +1,15 @@
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2012-01-20 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
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PR target/50313
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* config/arm/arm.c (arm_load_pic_register): Use
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gen_pic_load_addr_unified. Delete calls to gen_pic_load_addr_32bit
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, gen_pic_add_dot_plus_eight and gen_pic_add_dot_plus_four.
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(arm_pic_static_addr): Likewise.
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(arm_rtx_costs_1): Adjust cost for UNSPEC_PIC_UNIFIED.
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(arm_note_pic_base): Handle UNSPEC_PIC_UNIFIED.
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* config/arm/arm.md (UNSPEC_PIC_UNIFIED): Define.
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(pic_load_addr_unified): New.
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2012-01-20 Andrey Belevantsev <abel@ispras.ru>
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2012-01-20 Andrey Belevantsev <abel@ispras.ru>
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PR target/51106
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PR target/51106
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@ -5578,11 +5578,7 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
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if (TARGET_32BIT)
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if (TARGET_32BIT)
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{
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{
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emit_insn (gen_pic_load_addr_32bit (pic_reg, pic_rtx));
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emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));
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if (TARGET_ARM)
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emit_insn (gen_pic_add_dot_plus_eight (pic_reg, pic_reg, labelno));
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else
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emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno));
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}
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}
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else /* TARGET_THUMB1 */
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else /* TARGET_THUMB1 */
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{
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{
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@ -5595,10 +5591,10 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
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thumb_find_work_register (saved_regs));
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thumb_find_work_register (saved_regs));
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emit_insn (gen_pic_load_addr_thumb1 (pic_tmp, pic_rtx));
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emit_insn (gen_pic_load_addr_thumb1 (pic_tmp, pic_rtx));
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emit_insn (gen_movsi (pic_offset_table_rtx, pic_tmp));
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emit_insn (gen_movsi (pic_offset_table_rtx, pic_tmp));
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emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno));
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}
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}
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else
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else
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emit_insn (gen_pic_load_addr_thumb1 (pic_reg, pic_rtx));
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emit_insn (gen_pic_load_addr_unified (pic_reg, pic_rtx, labelno));
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emit_insn (gen_pic_add_dot_plus_four (pic_reg, pic_reg, labelno));
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}
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}
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}
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}
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@ -5628,20 +5624,7 @@ arm_pic_static_addr (rtx orig, rtx reg)
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UNSPEC_SYMBOL_OFFSET);
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UNSPEC_SYMBOL_OFFSET);
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offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
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offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
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if (TARGET_32BIT)
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insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
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{
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emit_insn (gen_pic_load_addr_32bit (reg, offset_rtx));
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if (TARGET_ARM)
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insn = emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
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else
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insn = emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
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}
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else /* TARGET_THUMB1 */
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{
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emit_insn (gen_pic_load_addr_thumb1 (reg, offset_rtx));
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insn = emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
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}
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return insn;
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return insn;
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}
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}
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@ -5684,7 +5667,7 @@ static bool
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will_be_in_index_register (const_rtx x)
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will_be_in_index_register (const_rtx x)
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{
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{
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/* arm.md: calculate_pic_address will split this into a register. */
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/* arm.md: calculate_pic_address will split this into a register. */
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return GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_PIC_SYM;
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return GET_CODE (x) == UNSPEC && (XINT (x, 1) == UNSPEC_PIC_SYM);
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}
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}
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/* Return nonzero if X is a valid ARM state address operand. */
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/* Return nonzero if X is a valid ARM state address operand. */
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@ -7649,6 +7632,15 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed)
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case SET:
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case SET:
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return false;
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return false;
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case UNSPEC:
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/* We cost this as high as our memory costs to allow this to
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be hoisted from loops. */
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if (XINT (x, 1) == UNSPEC_PIC_UNIFIED)
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{
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*total = COSTS_N_INSNS (2 + ARM_NUM_REGS (mode));
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}
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return true;
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default:
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default:
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*total = COSTS_N_INSNS (4);
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*total = COSTS_N_INSNS (4);
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return false;
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return false;
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@ -10008,7 +10000,8 @@ static int
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arm_note_pic_base (rtx *x, void *date ATTRIBUTE_UNUSED)
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arm_note_pic_base (rtx *x, void *date ATTRIBUTE_UNUSED)
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{
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{
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if (GET_CODE (*x) == UNSPEC
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if (GET_CODE (*x) == UNSPEC
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&& XINT (*x, 1) == UNSPEC_PIC_BASE)
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&& (XINT (*x, 1) == UNSPEC_PIC_BASE
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|| XINT (*x, 1) == UNSPEC_PIC_UNIFIED))
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return 1;
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return 1;
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return 0;
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return 0;
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}
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}
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@ -116,6 +116,7 @@
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; unaligned locations, on architectures which support
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; unaligned locations, on architectures which support
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; that.
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; that.
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UNSPEC_UNALIGNED_STORE ; Same for str/strh.
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UNSPEC_UNALIGNED_STORE ; Same for str/strh.
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UNSPEC_PIC_UNIFIED ; Create a common pic addressing form.
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])
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])
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;; UNSPEC_VOLATILE Usage:
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;; UNSPEC_VOLATILE Usage:
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@ -5613,6 +5614,30 @@
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"operands[3] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];"
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"operands[3] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];"
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)
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)
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;; operand1 is the memory address to go into
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;; pic_load_addr_32bit.
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;; operand2 is the PIC label to be emitted
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;; from pic_add_dot_plus_eight.
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;; We do this to allow hoisting of the entire insn.
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(define_insn_and_split "pic_load_addr_unified"
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[(set (match_operand:SI 0 "s_register_operand" "=r,r,l")
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(unspec:SI [(match_operand:SI 1 "" "mX,mX,mX")
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(match_operand:SI 2 "" "")]
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UNSPEC_PIC_UNIFIED))]
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"flag_pic"
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"#"
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"&& reload_completed"
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[(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_PIC_SYM))
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(set (match_dup 0) (unspec:SI [(match_dup 0) (match_dup 3)
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(match_dup 2)] UNSPEC_PIC_BASE))]
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"operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);"
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[(set_attr "type" "load1,load1,load1")
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(set_attr "pool_range" "4096,4096,1024")
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(set_attr "neg_pool_range" "4084,0,0")
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(set_attr "arch" "a,t2,t1")
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(set_attr "length" "8,6,4")]
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)
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;; The rather odd constraints on the following are to force reload to leave
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;; The rather odd constraints on the following are to force reload to leave
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;; the insn alone, and to force the minipool generation pass to then move
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;; the insn alone, and to force the minipool generation pass to then move
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;; the GOT symbol to memory.
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;; the GOT symbol to memory.
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