re PR bootstrap/38578 (fatal warning during bootstrap on arm.c for output_move_double and arm_expand_prologue)

PR bootstrap/38578
	* arm.c (load_multiple_sequence): Initialize ORDER array.
	(store_multiple_sequence): Likewise.
	(output_move_double): Make reg0 unsigned.
	(arm_output_epilogue): Make amount unsigned.
	(arm_expand_prologue): Move declaration of dwarf before block
	statements.

From-SVN: r142837
This commit is contained in:
Richard Earnshaw 2008-12-19 17:22:58 +00:00 committed by Richard Earnshaw
parent 7bda4a1df4
commit f0b4bdd55d
2 changed files with 18 additions and 4 deletions
gcc
ChangeLog
config/arm

View File

@ -1,3 +1,13 @@
2008-12-19 Richard Earnshaw <rearnsha@arm.com>
PR bootstrap/38578
* arm.c (load_multiple_sequence): Initialize ORDER array.
(store_multiple_sequence): Likewise.
(output_move_double): Make reg0 unsigned.
(arm_output_epilogue): Make amount unsigned.
(arm_expand_prologue): Move declaration of dwarf before block
statements.
2008-12-19 Steve Ellcey <sje@cup.hp.com>
* df-scan.c ( df_hard_reg_init): Move declaration of i.

View File

@ -7001,6 +7001,8 @@ load_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
though could be easily extended if required. */
gcc_assert (nops >= 2 && nops <= 4);
memset (order, 0, 4 * sizeof (int));
/* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At
the same time, extract the target register, and the memory
@ -7228,6 +7230,8 @@ store_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
extended if required. */
gcc_assert (nops >= 2 && nops <= 4);
memset (order, 0, 4 * sizeof (int));
/* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At
the same time, extract the target register, and the memory
@ -9986,7 +9990,7 @@ output_move_double (rtx *operands)
if (code0 == REG)
{
int reg0 = REGNO (operands[0]);
unsigned int reg0 = REGNO (operands[0]);
otherops[0] = gen_rtx_REG (SImode, 1 + reg0);
@ -11661,7 +11665,7 @@ arm_output_epilogue (rtx sibling)
(where frame pointer is required to point at first register)
and ARM-non-apcs-frame. Therefore, such change is postponed
until real need arise. */
HOST_WIDE_INT amount;
unsigned HOST_WIDE_INT amount;
int rfe;
/* Restore stack pointer if necessary. */
if (TARGET_ARM && frame_pointer_needed)
@ -12653,11 +12657,11 @@ arm_expand_prologue (void)
insn = emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx);
else if (args_to_push == 0)
{
rtx dwarf;
gcc_assert(arm_compute_static_chain_stack_bytes() == 4);
saved_regs += 4;
rtx dwarf;
insn = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
insn = emit_set_insn (gen_frame_mem (SImode, insn), ip_rtx);
fp_offset = 4;