* From Jukka Virtanen.
* pa.h (TRAMPOLINE_TEMPLATE): Define for the PA. (TRAMPOLINE_SIZE): Define for the PA. (INITIALIZE_TRAMPOLINE): Define for the PA. From-SVN: r3894
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@ -960,23 +960,52 @@ extern union tree_node *current_function_decl;
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eligible_for_epilogue_delay (trial, slots_filled)
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/* Output assembler code for a block containing the constant parts
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of a trampoline, leaving space for the variable parts. */
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of a trampoline, leaving space for the variable parts.\
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#define TRAMPOLINE_TEMPLATE(FILE) {}
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The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
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and then branches to the specified routine.
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/* Length in units of the trampoline for entering a nested function. */
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This code template is copied from text segment to stack location
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and then patched with INITIALIZE_TRAMPOLINE to contain
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valid values, and then entered as a subroutine.
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#define TRAMPOLINE_SIZE 0
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It is best to keep this as small as possible to avoid having to
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flush multiple lines in the cache. */
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#define TRAMPOLINE_TEMPLATE(FILE) \
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{ \
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fprintf (FILE, "\tldw 12(0,%%r22),%%r21\n"); \
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fprintf (FILE, "\tbe 0(4,%%r21)\n"); \
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fprintf (FILE, "\tldw 16(0,%%r22),%%r29\n"); \
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fprintf (FILE, "\t.long 0,0\n"); \
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}
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/* Length in units of the trampoline for entering a nested function.
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If this grows to > 32 bytes, then you must update the flushcache
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pattern in pa.md. */
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#define TRAMPOLINE_SIZE (5 * 4)
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/* Emit RTL insns to initialize the variable parts of a trampoline.
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FNADDR is an RTX for the address of the function's pure code.
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CXT is an RTX for the static chain value for the function.
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This takes 16 insns: 2 shifts & 2 ands (to split up addresses), 4 sethi
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(to load in opcodes), 4 iors (to merge address and opcodes), and 4 writes
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(to store insns). This is a bit excessive. Perhaps a different
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mechanism would be better here. */
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) {}
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Move the function address to the trampoline template at offset 12.
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Move the static chain value to trampoline template at offset 16. */
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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{ \
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rtx addr, mem; \
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\
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addr = memory_address (Pmode, plus_constant ((TRAMP), 12)); \
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emit_move_insn (gen_rtx (MEM, Pmode, addr), (FNADDR)); \
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addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
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emit_move_insn (gen_rtx (MEM, Pmode, addr), (CXT)); \
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/* fdc and fic only use registers for the address to flush, \
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they do not accept integer displacements. */ \
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addr = force_reg (SImode, (TRAMP)); \
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emit_insn (gen_cacheflush (gen_rtx (MEM, Pmode, addr))); \
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}
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/* Emit code for a call to builtin_saveregs. We must emit USE insns which
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reference the 4 integer arg registers and 4 fp arg registers.
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