fr30-protos.h: Remove the prototypes for stack_add_operand...
* config/fr30/fr30-protos.h: Remove the prototypes for stack_add_operand, add_immediate_operand, high_register_operand, low_register_operand, call_operand, di_operand, and nonimmediate_di_operand. * config/fr30/fr30.c (stack_add_operand, add_immediate_operand, high_register_operand, low_register_operand, call_operand, di_operand, nonimmediate_di_operand): Move to predicates.md. * config/fr30/fr30.h (PREDICATE_CODES): Remove. * config/fr30/fr30.md: Include predicates.md. * config/fr30/predicates.md: New. From-SVN: r97540
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@ -1,3 +1,17 @@
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2005-04-04 Kazu Hirata <kazu@cs.umass.edu>
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* config/fr30/fr30-protos.h: Remove the prototypes for
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stack_add_operand, add_immediate_operand,
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high_register_operand, low_register_operand, call_operand,
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di_operand, and nonimmediate_di_operand.
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* config/fr30/fr30.c (stack_add_operand,
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add_immediate_operand, high_register_operand,
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low_register_operand, call_operand, di_operand,
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nonimmediate_di_operand): Move to predicates.md.
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* config/fr30/fr30.h (PREDICATE_CODES): Remove.
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* config/fr30/fr30.md: Include predicates.md.
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* config/fr30/predicates.md: New.
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2005-04-04 Alan Modra <amodra@bigpond.net.au>
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* passes.c (rest_of_handle_final): NULL unlikely_text_section_name
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@ -32,13 +32,6 @@ extern int fr30_num_arg_regs (enum machine_mode, tree);
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#endif /* TREE_CODE */
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#ifdef HAVE_MACHINE_MODES
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#define Mmode enum machine_mode
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extern int stack_add_operand (rtx, Mmode);
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extern int add_immediate_operand (rtx, Mmode);
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extern int high_register_operand (rtx, Mmode);
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extern int low_register_operand (rtx, Mmode);
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extern int call_operand (rtx, Mmode);
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extern int di_operand (rtx, Mmode);
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extern int nonimmediate_di_operand (rtx, Mmode);
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extern int fr30_const_double_is_zero (rtx);
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#undef Mmode
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#endif /* HAVE_MACHINE_MODES */
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@ -738,104 +738,6 @@ fr30_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode,
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#define Mmode enum machine_mode
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#endif
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/* Returns true if OPERAND is an integer value suitable for use in
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an ADDSP instruction. */
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int
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stack_add_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
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{
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return
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(GET_CODE (operand) == CONST_INT
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&& INTVAL (operand) >= -512
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&& INTVAL (operand) <= 508
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&& ((INTVAL (operand) & 3) == 0));
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}
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/* Returns true if OPERAND is an integer value suitable for use in
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an ADD por ADD2 instruction, or if it is a register. */
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int
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add_immediate_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
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{
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return
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(GET_CODE (operand) == REG
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|| (GET_CODE (operand) == CONST_INT
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&& INTVAL (operand) >= -16
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&& INTVAL (operand) <= 15));
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}
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/* Returns true if OPERAND is hard register in the range 8 - 15. */
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int
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high_register_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
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{
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return
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(GET_CODE (operand) == REG
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&& REGNO (operand) <= 15
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&& REGNO (operand) >= 8);
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}
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/* Returns true if OPERAND is hard register in the range 0 - 7. */
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int
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low_register_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
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{
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return
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(GET_CODE (operand) == REG
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&& REGNO (operand) <= 7);
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}
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/* Returns true if OPERAND is suitable for use in a CALL insn. */
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int
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call_operand (rtx operand, Mmode mode ATTRIBUTE_UNUSED)
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{
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return (GET_CODE (operand) == MEM
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&& (GET_CODE (XEXP (operand, 0)) == SYMBOL_REF
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|| GET_CODE (XEXP (operand, 0)) == REG));
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}
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/* Returns TRUE if OP is a valid operand of a DImode operation. */
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int
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di_operand (rtx op, Mmode mode)
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{
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if (register_operand (op, mode))
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return TRUE;
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if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
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return FALSE;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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switch (GET_CODE (op))
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{
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case CONST_DOUBLE:
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case CONST_INT:
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return TRUE;
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case MEM:
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return memory_address_p (DImode, XEXP (op, 0));
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default:
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return FALSE;
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}
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}
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/* Returns TRUE if OP is a DImode register or MEM. */
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int
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nonimmediate_di_operand (rtx op, Mmode mode)
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{
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if (register_operand (op, mode))
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return TRUE;
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if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
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return FALSE;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) == MEM)
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return memory_address_p (DImode, XEXP (op, 0));
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return FALSE;
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}
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/* Returns true iff all the registers in the operands array
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are in descending or ascending order. */
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int
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@ -1121,18 +1121,6 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
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extern struct rtx_def * fr30_compare_op0;
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extern struct rtx_def * fr30_compare_op1;
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/*}}}*/
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/*{{{ PREDICATE_CODES. */
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#define PREDICATE_CODES \
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{ "stack_add_operand", { CONST_INT }}, \
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{ "high_register_operand", { REG }}, \
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{ "low_register_operand", { REG }}, \
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{ "call_operand", { MEM }}, \
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{ "di_operand", { CONST_INT, CONST_DOUBLE, REG, MEM }}, \
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{ "nonimmediate_di_operand", { REG, MEM }}, \
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{ "add_immediate_operand", { REG, CONST_INT }},
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/*}}}*/
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/* Local Variables: */
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@ -1,5 +1,6 @@
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;; FR30 machine description.
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;; Copyright (C) 1998, 1999, 2000, 2002, 2004 Free Software Foundation, Inc.
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;; Copyright (C) 1998, 1999, 2000, 2002, 2004, 2005
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;; Free Software Foundation, Inc.
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;; Contributed by Cygnus Solutions.
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;; This file is part of GCC.
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@ -53,6 +54,8 @@
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(nil)]
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)
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(include "predicates.md")
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;;}}}
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;;{{{ Moves
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124
gcc/config/fr30/predicates.md
Normal file
124
gcc/config/fr30/predicates.md
Normal file
@ -0,0 +1,124 @@
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;; Predicate definitions for FR30.
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;; Copyright (C) 2005 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 2, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING. If not, write to
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;; the Free Software Foundation, 59 Temple Place - Suite 330,
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;; Boston, MA 02111-1307, USA.
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;; Returns true if OP is an integer value suitable for use in an
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;; ADDSP instruction.
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(define_predicate "stack_add_operand"
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(match_code "const_int")
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{
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return
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(GET_CODE (op) == CONST_INT
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&& INTVAL (op) >= -512
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&& INTVAL (op) <= 508
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&& ((INTVAL (op) & 3) == 0));
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})
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;; Returns true if OP is hard register in the range 8 - 15.
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(define_predicate "high_register_operand"
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(match_code "reg")
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{
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return
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(GET_CODE (op) == REG
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&& REGNO (op) <= 15
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&& REGNO (op) >= 8);
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})
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;; Returns true if OP is hard register in the range 0 - 7.
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(define_predicate "low_register_operand"
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(match_code "reg")
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{
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return
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(GET_CODE (op) == REG
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&& REGNO (op) <= 7);
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})
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;; Returns true if OP is suitable for use in a CALL insn.
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(define_predicate "call_operand"
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(match_code "mem")
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{
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return (GET_CODE (op) == MEM
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&& (GET_CODE (XEXP (op, 0)) == SYMBOL_REF
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|| GET_CODE (XEXP (op, 0)) == REG));
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})
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;; Returns TRUE if OP is a valid operand of a DImode operation.
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(define_predicate "di_operand"
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(match_code "const_int,const_double,reg,mem")
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{
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if (register_operand (op, mode))
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return TRUE;
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if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
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return FALSE;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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switch (GET_CODE (op))
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{
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case CONST_DOUBLE:
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case CONST_INT:
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return TRUE;
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case MEM:
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return memory_address_p (DImode, XEXP (op, 0));
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default:
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return FALSE;
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}
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})
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;; Returns TRUE if OP is a DImode register or MEM.
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(define_predicate "nonimmediate_di_operand"
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(match_code "reg,mem")
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{
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if (register_operand (op, mode))
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return TRUE;
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if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
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return FALSE;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) == MEM)
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return memory_address_p (DImode, XEXP (op, 0));
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return FALSE;
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})
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;; Returns true if OP is an integer value suitable for use in an ADD
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;; or ADD2 instruction, or if it is a register.
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(define_predicate "add_immediate_operand"
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(match_code "reg,const_int")
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{
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return
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(GET_CODE (op) == REG
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|| (GET_CODE (op) == CONST_INT
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&& INTVAL (op) >= -16
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&& INTVAL (op) <= 15));
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})
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