m68k.h (TARGET_SWITCHES/TARGET_OPTIONS): Add missing doc strings
* config/m68k/m68k.h (TARGET_SWITCHES/TARGET_OPTIONS): Add missing doc strings * config/m68k/linux-aout.h (SUBTARGET_SWITCHES): Likewise * config/m68k/linux.h (SUBTARGET_SWITCHES): Likewise From-SVN: r44489
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@ -1,3 +1,10 @@
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2001-07-30 Roman Zippel <zippel@linux-m68k.org>
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* config/m68k/m68k.h (TARGET_SWITCHES/TARGET_OPTIONS):
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Add missing doc strings
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* config/m68k/linux-aout.h (SUBTARGET_SWITCHES): Likewise
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* config/m68k/linux.h (SUBTARGET_SWITCHES): Likewise
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Mon Jul 30 22:16:08 CEST 2001 Jan Hubicka <jh@suse.cz>
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* i386.c (ix86_output_main_function_alignment_hack): New function.
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@ -41,7 +41,8 @@ Boston, MA 02111-1307, USA. */
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#endif
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#undef SUBTARGET_SWITCHES
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#define SUBTARGET_SWITCHES {"ieee-fp", 0},
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#define SUBTARGET_SWITCHES {"ieee-fp", 0, \
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N_("Use IEEE math for fp comparisons") },
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#undef ASM_SPEC
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#define ASM_SPEC \
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@ -42,7 +42,8 @@ Boston, MA 02111-1307, USA. */
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#define STRICT_ALIGNMENT 0
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#undef SUBTARGET_SWITCHES
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#define SUBTARGET_SWITCHES {"ieee-fp", 0},
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#define SUBTARGET_SWITCHES {"ieee-fp", 0, \
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N_("Use IEEE math for fp comparisons")},
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/* Here are four prefixes that are used by asm_fprintf to
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facilitate customization for alternate assembler syntaxes.
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@ -147,63 +147,96 @@ extern int target_flags;
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where VALUE is the bits to set or minus the bits to clear.
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An empty string NAME is used to identify the default VALUE. */
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#define TARGET_SWITCHES \
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{ { "68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY)}, \
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{ "c68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY)}, \
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{ "68020", (MASK_68020|MASK_BITFIELD)}, \
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{ "c68020", (MASK_68020|MASK_BITFIELD)}, \
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#define TARGET_SWITCHES \
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{ { "68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY), \
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N_("Generate code for a 68020") }, \
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{ "c68020", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY), \
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N_("Generate code for a 68020") }, \
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{ "68020", (MASK_68020|MASK_BITFIELD), "" }, \
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{ "c68020", (MASK_68020|MASK_BITFIELD), "" }, \
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{ "68000", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
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|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
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|MASK_68020|MASK_BITFIELD|MASK_68881), \
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N_("Generate code for a 68000") }, \
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{ "c68000", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
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|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
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{ "bitfield", MASK_BITFIELD}, \
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{ "nobitfield", - MASK_BITFIELD}, \
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{ "rtd", MASK_RTD}, \
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{ "nortd", - MASK_RTD}, \
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{ "short", MASK_SHORT}, \
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{ "noshort", - MASK_SHORT}, \
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{ "fpa", -(MASK_SKY|MASK_68040_ONLY|MASK_68881)}, \
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{ "fpa", MASK_FPA}, \
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{ "nofpa", - MASK_FPA}, \
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{ "sky", -(MASK_FPA|MASK_68040_ONLY|MASK_68881)}, \
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{ "sky", MASK_SKY}, \
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{ "nosky", - MASK_SKY}, \
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{ "68881", - (MASK_FPA|MASK_SKY)}, \
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{ "68881", MASK_68881}, \
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{ "soft-float", - (MASK_FPA|MASK_SKY|MASK_68040_ONLY|MASK_68881)}, \
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{ "68020-40", -(MASK_5200|MASK_68060|MASK_68040_ONLY)}, \
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{ "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040)}, \
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{ "68020-60", -(MASK_5200|MASK_68040_ONLY)}, \
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|MASK_68020|MASK_BITFIELD|MASK_68881), \
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N_("Generate code for a 68000") }, \
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{ "bitfield", MASK_BITFIELD, \
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N_("Use the bit-field instructions") }, \
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{ "nobitfield", - MASK_BITFIELD, \
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N_("Do not use the bit-field instructions") }, \
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{ "rtd", MASK_RTD, \
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N_("Use different calling convention using 'rtd'") }, \
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{ "nortd", - MASK_RTD, \
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N_("Use normal calling convention") }, \
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{ "short", MASK_SHORT, \
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N_("Consider type `int' to be 16 bits wide") }, \
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{ "noshort", - MASK_SHORT, \
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N_("Consider type `int' to be 32 bits wide") }, \
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{ "fpa", -(MASK_SKY|MASK_68040_ONLY|MASK_68881), \
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N_("Generate code for a Sun FPA") }, \
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{ "fpa", MASK_FPA, "" }, \
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{ "nofpa", - MASK_FPA, \
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N_("Do not generate code for a Sun FPA") }, \
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{ "sky", -(MASK_FPA|MASK_68040_ONLY|MASK_68881), \
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N_("") }, \
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{ "sky", MASK_SKY, \
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N_("") }, \
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{ "nosky", - MASK_SKY, \
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N_("") }, \
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{ "68881", - (MASK_FPA|MASK_SKY), \
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N_("Generate code for a 68881") }, \
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{ "68881", MASK_68881, "" }, \
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{ "soft-float", - (MASK_FPA|MASK_SKY|MASK_68040_ONLY|MASK_68881), \
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N_("Generate code with library calls for floating point") }, \
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{ "68020-40", -(MASK_5200|MASK_68060|MASK_68040_ONLY), \
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N_("Generate code for a 68040, without any new instructions") }, \
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{ "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040), ""},\
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{ "68020-60", -(MASK_5200|MASK_68040_ONLY), \
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N_("Generate code for a 68060, without any new instructions") }, \
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{ "68020-60", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040 \
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|MASK_68060)}, \
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{ "68030", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY)}, \
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{ "68030", (MASK_68020|MASK_BITFIELD)}, \
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{ "68040", - (MASK_5200|MASK_68060)}, \
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|MASK_68060), "" }, \
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{ "68030", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY), \
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N_("Generate code for a 68030") }, \
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{ "68030", (MASK_68020|MASK_BITFIELD), "" }, \
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{ "68040", - (MASK_5200|MASK_68060), \
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N_("Generate code for a 68040") }, \
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{ "68040", (MASK_68020|MASK_68881|MASK_BITFIELD \
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|MASK_68040_ONLY|MASK_68040)}, \
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{ "68060", - (MASK_5200|MASK_68040)}, \
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|MASK_68040_ONLY|MASK_68040), "" }, \
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{ "68060", - (MASK_5200|MASK_68040), \
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N_("Generate code for a 68060") }, \
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{ "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
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|MASK_68040_ONLY|MASK_68060)}, \
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|MASK_68040_ONLY|MASK_68060), "" }, \
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{ "5200", - (MASK_68060|MASK_68040|MASK_68040_ONLY|MASK_68020 \
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|MASK_BITFIELD|MASK_68881)}, \
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{ "5200", (MASK_5200)}, \
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{ "68851", 0}, \
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{ "no-68851", 0}, \
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|MASK_BITFIELD|MASK_68881), \
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N_("Generate code for a 520X") }, \
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{ "5200", (MASK_5200), "" }, \
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{ "68851", 0, \
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N_("Generate code for a 68851") }, \
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{ "no-68851", 0, \
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N_("Do no generate code for a 68851") }, \
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{ "68302", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
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|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
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|MASK_68020|MASK_BITFIELD|MASK_68881), \
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N_("Generate code for a 68302") }, \
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{ "68332", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
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|MASK_BITFIELD|MASK_68881)}, \
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{ "68332", MASK_68020}, \
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|MASK_BITFIELD|MASK_68881), \
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N_("Generate code for a 68332") }, \
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{ "68332", MASK_68020, "" }, \
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{ "cpu32", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
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|MASK_BITFIELD|MASK_68881)}, \
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{ "cpu32", MASK_68020}, \
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{ "align-int", MASK_ALIGN_INT }, \
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{ "no-align-int", -MASK_ALIGN_INT }, \
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{ "pcrel", MASK_PCREL}, \
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{ "strict-align", -MASK_NO_STRICT_ALIGNMENT}, \
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{ "no-strict-align", MASK_NO_STRICT_ALIGNMENT}, \
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|MASK_BITFIELD|MASK_68881), \
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N_("Generate code for a cpu32") }, \
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{ "cpu32", MASK_68020, "" }, \
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{ "align-int", MASK_ALIGN_INT, \
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N_("Align variables on a 32-bit boundary") }, \
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{ "no-align-int", -MASK_ALIGN_INT, \
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N_("Align variables on a 16-bit boundary") }, \
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{ "pcrel", MASK_PCREL, \
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N_("Generate pc-relative code") }, \
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{ "strict-align", -MASK_NO_STRICT_ALIGNMENT, \
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N_("Do not use unaligned memory references") }, \
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{ "no-strict-align", MASK_NO_STRICT_ALIGNMENT, \
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N_("Use unaligned memory references") }, \
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SUBTARGET_SWITCHES \
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{ "", TARGET_DEFAULT}}
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{ "", TARGET_DEFAULT, "" }}
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/* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
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/* This macro is similar to `TARGET_SWITCHES' but defines names of
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@ -216,9 +249,12 @@ extern int target_flags;
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option if the fixed part matches. The actual option name is made
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by appending `-m' to the specified name. */
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#define TARGET_OPTIONS \
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{ { "align-loops=", &m68k_align_loops_string }, \
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{ "align-jumps=", &m68k_align_jumps_string }, \
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{ "align-functions=", &m68k_align_funcs_string }, \
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{ { "align-loops=", &m68k_align_loops_string, \
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N_("Loop code aligned to this power of 2") }, \
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{ "align-jumps=", &m68k_align_jumps_string, \
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N_("Jump targets are aligned to this power of 2") }, \
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{ "align-functions=", &m68k_align_funcs_string, \
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N_("Function starts are aligned to this power of 2") }, \
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SUBTARGET_OPTIONS \
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}
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