aarch64-cores.def: Change the scheduler to Thunderx2t99.
2017-02-06 Julian Brown <julian@codesourcery.com> Naveen H.S <Naveen.Hurugalawadi@cavium.com> Virendra Pathak <virendra.pathak@broadcom.com> * config/aarch64/aarch64-cores.def: Change the scheduler to Thunderx2t99. * config/aarch64/aarch64.md: Include thunderx2t99.md. * config/aarch64/thunderx2t99.md: New file. Co-Authored-By: Naveen H.S <Naveen.Hurugalawadi@cavium.com> Co-Authored-By: Virendra Pathak <virendra.pathak@broadcom.com> From-SVN: r245203
This commit is contained in:
Julian Brown
Naveen H.S
parent
3b34618408
commit
f192030dd1
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@ -1,3 +1,12 @@
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2017-02-06 Julian Brown <julian@codesourcery.com>
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Naveen H.S <Naveen.Hurugalawadi@cavium.com>
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Virendra Pathak <virendra.pathak@broadcom.com>
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* config/aarch64/aarch64-cores.def: Change the scheduler
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to Thunderx2t99.
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* config/aarch64/aarch64.md: Include thunderx2t99.md.
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* config/aarch64/thunderx2t99.md: New file.
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2017-02-05 Gerald Pfeifer <gerald@pfeifer.com>
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* doc/standards.texi (Go Language): Update link to language
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@ -74,8 +74,8 @@ AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xge
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/* V8.1 Architecture Processors. */
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/* Broadcom ('B') cores. */
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AARCH64_CORE("thunderx2t99", thunderx2t99, cortexa57, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1)
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AARCH64_CORE("vulcan", vulcan, cortexa57, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1)
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AARCH64_CORE("thunderx2t99", thunderx2t99, thunderx2t99, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1)
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AARCH64_CORE("vulcan", vulcan, thunderx2t99, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1)
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/* V8 big.LITTLE implementations. */
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@ -225,6 +225,7 @@
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(include "../arm/exynos-m1.md")
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(include "thunderx.md")
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(include "../arm/xgene1.md")
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(include "thunderx2t99.md")
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;; -------------------------------------------------------------------
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;; Jumps and other miscellaneous insns
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@ -0,0 +1,443 @@
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;; Cavium ThunderX 2 CN99xx pipeline description
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;; Copyright (C) 2016-2017 Free Software Foundation, Inc.
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;;
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;; Contributed by Cavium, Broadcom and Mentor Embedded.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; <http://www.gnu.org/licenses/>.
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(define_automaton "thunderx2t99, thunderx2t99_advsimd, thunderx2t99_ldst")
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(define_automaton "thunderx2t99_mult")
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(define_cpu_unit "thunderx2t99_i0" "thunderx2t99")
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(define_cpu_unit "thunderx2t99_i1" "thunderx2t99")
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(define_cpu_unit "thunderx2t99_i2" "thunderx2t99")
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(define_cpu_unit "thunderx2t99_ls0" "thunderx2t99_ldst")
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(define_cpu_unit "thunderx2t99_ls1" "thunderx2t99_ldst")
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(define_cpu_unit "thunderx2t99_sd" "thunderx2t99_ldst")
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; Pseudo-units for multiply pipeline.
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(define_cpu_unit "thunderx2t99_i1m1" "thunderx2t99_mult")
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(define_cpu_unit "thunderx2t99_i1m2" "thunderx2t99_mult")
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(define_cpu_unit "thunderx2t99_i1m3" "thunderx2t99_mult")
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; Pseudo-units for load delay (assuming dcache hit).
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(define_cpu_unit "thunderx2t99_ls0d1" "thunderx2t99_ldst")
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(define_cpu_unit "thunderx2t99_ls0d2" "thunderx2t99_ldst")
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(define_cpu_unit "thunderx2t99_ls0d3" "thunderx2t99_ldst")
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(define_cpu_unit "thunderx2t99_ls1d1" "thunderx2t99_ldst")
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(define_cpu_unit "thunderx2t99_ls1d2" "thunderx2t99_ldst")
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(define_cpu_unit "thunderx2t99_ls1d3" "thunderx2t99_ldst")
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; Make some aliases for f0/f1.
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(define_cpu_unit "thunderx2t99_f0" "thunderx2t99_advsimd")
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(define_cpu_unit "thunderx2t99_f1" "thunderx2t99_advsimd")
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(define_reservation "thunderx2t99_i012" "thunderx2t99_i0|thunderx2t99_i1|thunderx2t99_i2")
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(define_reservation "thunderx2t99_ls01" "thunderx2t99_ls0|thunderx2t99_ls1")
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(define_reservation "thunderx2t99_f01" "thunderx2t99_f0|thunderx2t99_f1")
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(define_reservation "thunderx2t99_ls_both" "thunderx2t99_ls0+thunderx2t99_ls1")
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; A load with delay in the ls0/ls1 pipes.
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(define_reservation "thunderx2t99_l0delay" "thunderx2t99_ls0,\
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thunderx2t99_ls0d1,thunderx2t99_ls0d2,\
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thunderx2t99_ls0d3")
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(define_reservation "thunderx2t99_l1delay" "thunderx2t99_ls1,\
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thunderx2t99_ls1d1,thunderx2t99_ls1d2,\
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thunderx2t99_ls1d3")
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(define_reservation "thunderx2t99_l01delay" "thunderx2t99_l0delay|thunderx2t99_l1delay")
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;; Branch and call instructions.
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(define_insn_reservation "thunderx2t99_branch" 1
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "call,branch"))
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"thunderx2t99_i2")
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;; Integer arithmetic/logic instructions.
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; Plain register moves are handled by renaming, and don't create any uops.
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(define_insn_reservation "thunderx2t99_regmove" 0
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "mov_reg"))
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"nothing")
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(define_insn_reservation "thunderx2t99_alu_basic" 1
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,\
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adc_reg,adc_imm,adcs_reg,adcs_imm,\
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logic_reg,logic_imm,logics_reg,logics_imm,\
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csel,adr,mov_imm,shift_reg,shift_imm,bfm,\
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rbit,rev,extend,rotate_imm"))
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"thunderx2t99_i012")
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(define_insn_reservation "thunderx2t99_alu_shift" 2
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "alu_shift_imm,alu_ext,alu_shift_reg,\
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alus_shift_imm,alus_ext,alus_shift_reg,\
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logic_shift_imm,logics_shift_reg"))
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"thunderx2t99_i012,thunderx2t99_i012")
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(define_insn_reservation "thunderx2t99_div" 13
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "sdiv,udiv"))
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"thunderx2t99_i1*3")
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(define_insn_reservation "thunderx2t99_madd" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "mla,smlal,umlal"))
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"thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3,\
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thunderx2t99_i012")
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; NOTE: smull, umull are used for "high part" multiplies too.
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(define_insn_reservation "thunderx2t99_mul" 4
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "mul,smull,umull"))
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"thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3")
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(define_insn_reservation "thunderx2t99_countbits" 3
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "clz"))
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"thunderx2t99_i1")
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;; Integer loads and stores.
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(define_insn_reservation "thunderx2t99_load_basic" 4
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "load1"))
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"thunderx2t99_ls01")
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(define_insn_reservation "thunderx2t99_loadpair" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "load2"))
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"thunderx2t99_i012,thunderx2t99_ls01")
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(define_insn_reservation "thunderx2t99_store_basic" 1
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "store1"))
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"thunderx2t99_ls01,thunderx2t99_sd")
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(define_insn_reservation "thunderx2t99_storepair_basic" 1
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "store2"))
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"thunderx2t99_ls01,thunderx2t99_sd")
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;; FP data processing instructions.
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(define_insn_reservation "thunderx2t99_fp_simple" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "ffariths,ffarithd,f_minmaxs,f_minmaxd"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_fp_addsub" 6
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "fadds,faddd"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_fp_cmp" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "fcmps,fcmpd"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_fp_divsqrt_s" 16
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "fdivs,fsqrts"))
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"thunderx2t99_f0*3|thunderx2t99_f1*3")
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(define_insn_reservation "thunderx2t99_fp_divsqrt_d" 23
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "fdivd,fsqrtd"))
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"thunderx2t99_f0*5|thunderx2t99_f1*5")
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(define_insn_reservation "thunderx2t99_fp_mul_mac" 6
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "fmuls,fmuld,fmacs,fmacd"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_frint" 7
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "f_rints,f_rintd"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_fcsel" 4
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "fcsel"))
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"thunderx2t99_f01")
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;; FP miscellaneous instructions.
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(define_insn_reservation "thunderx2t99_fp_cvt" 7
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "f_cvtf2i,f_cvt,f_cvti2f"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_fp_mov" 4
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "fconsts,fconstd,fmov,f_mrc"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_fp_mov_to_gen" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "f_mcr"))
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"thunderx2t99_f01")
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;; FP loads and stores.
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(define_insn_reservation "thunderx2t99_fp_load_basic" 4
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "f_loads,f_loadd"))
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"thunderx2t99_ls01")
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(define_insn_reservation "thunderx2t99_fp_loadpair_basic" 4
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_load1_2reg"))
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"thunderx2t99_ls01*2")
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(define_insn_reservation "thunderx2t99_fp_store_basic" 1
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "f_stores,f_stored"))
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"thunderx2t99_ls01,thunderx2t99_sd")
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(define_insn_reservation "thunderx2t99_fp_storepair_basic" 1
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_store1_2reg"))
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"thunderx2t99_ls01,(thunderx2t99_ls01+thunderx2t99_sd),thunderx2t99_sd")
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;; ASIMD integer instructions.
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(define_insn_reservation "thunderx2t99_asimd_int" 7
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_abd,neon_abd_q,\
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neon_arith_acc,neon_arith_acc_q,\
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neon_abs,neon_abs_q,\
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neon_add,neon_add_q,\
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neon_neg,neon_neg_q,\
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neon_add_long,neon_add_widen,\
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neon_add_halve,neon_add_halve_q,\
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neon_sub_long,neon_sub_widen,\
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neon_sub_halve,neon_sub_halve_q,\
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neon_add_halve_narrow_q,neon_sub_halve_narrow_q,\
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neon_qabs,neon_qabs_q,\
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neon_qadd,neon_qadd_q,\
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neon_qneg,neon_qneg_q,\
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neon_qsub,neon_qsub_q,\
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neon_minmax,neon_minmax_q,\
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neon_reduc_minmax,neon_reduc_minmax_q,\
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neon_mul_b,neon_mul_h,neon_mul_s,\
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neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,\
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neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,\
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neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\
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neon_mla_b,neon_mla_h,neon_mla_s,\
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neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\
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neon_mul_b_long,neon_mul_h_long,\
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neon_mul_s_long,neon_mul_d_long,\
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neon_sat_mul_b_long,neon_sat_mul_h_long,\
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neon_sat_mul_s_long,\
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neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\
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neon_sat_mla_b_long,neon_sat_mla_h_long,\
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neon_sat_mla_s_long,\
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neon_shift_acc,neon_shift_acc_q,\
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neon_shift_imm,neon_shift_imm_q,\
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neon_shift_reg,neon_shift_reg_q,\
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neon_shift_imm_long,neon_shift_imm_narrow_q,\
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neon_sat_shift_imm,neon_sat_shift_imm_q,\
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neon_sat_shift_reg,neon_sat_shift_reg_q,\
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neon_sat_shift_imm_narrow_q"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_asimd_reduc_add" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_reduc_add,neon_reduc_add_q"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_asimd_cmp" 7
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_compare,neon_compare_q,neon_compare_zero,\
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neon_tst,neon_tst_q"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_asimd_logic" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_logic,neon_logic_q"))
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"thunderx2t99_f01")
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(define_insn_reservation "thunderx2t99_asimd_polynomial" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_mul_d_long"))
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"thunderx2t99_f01")
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;; ASIMD floating-point instructions.
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(define_insn_reservation "thunderx2t99_asimd_fp_simple" 5
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(and (eq_attr "tune" "thunderx2t99")
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(eq_attr "type" "neon_fp_abs_s,neon_fp_abs_d,\
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neon_fp_abs_s_q,neon_fp_abs_d_q,\
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neon_fp_compare_s,neon_fp_compare_d,\
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neon_fp_compare_s_q,neon_fp_compare_d_q,\
|
||||
neon_fp_minmax_s,neon_fp_minmax_d,\
|
||||
neon_fp_minmax_s_q,neon_fp_minmax_d_q,\
|
||||
neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,\
|
||||
neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,\
|
||||
neon_fp_neg_s,neon_fp_neg_d,\
|
||||
neon_fp_neg_s_q,neon_fp_neg_d_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_fp_arith" 6
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_fp_abd_s,neon_fp_abd_d,\
|
||||
neon_fp_abd_s_q,neon_fp_abd_d_q,\
|
||||
neon_fp_addsub_s,neon_fp_addsub_d,\
|
||||
neon_fp_addsub_s_q,neon_fp_addsub_d_q,\
|
||||
neon_fp_reduc_add_s,neon_fp_reduc_add_d,\
|
||||
neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q,\
|
||||
neon_fp_mul_s,neon_fp_mul_d,\
|
||||
neon_fp_mul_s_q,neon_fp_mul_d_q,\
|
||||
neon_fp_mla_s,neon_fp_mla_d,\
|
||||
neon_fp_mla_s_q,neon_fp_mla_d_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_fp_conv" 7
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_fp_cvt_widen_s,neon_fp_cvt_narrow_d_q,\
|
||||
neon_fp_to_int_s,neon_fp_to_int_d,\
|
||||
neon_fp_to_int_s_q,neon_fp_to_int_d_q,\
|
||||
neon_fp_round_s,neon_fp_round_d,\
|
||||
neon_fp_round_s_q,neon_fp_round_d_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_fp_div_s" 16
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_fp_div_s,neon_fp_div_s_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_fp_div_d" 23
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_fp_div_d,neon_fp_div_d_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
;; ASIMD miscellaneous instructions.
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_misc" 5
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_rbit,\
|
||||
neon_bsl,neon_bsl_q,\
|
||||
neon_cls,neon_cls_q,\
|
||||
neon_cnt,neon_cnt_q,\
|
||||
neon_from_gp,neon_from_gp_q,\
|
||||
neon_dup,neon_dup_q,\
|
||||
neon_ext,neon_ext_q,\
|
||||
neon_ins,neon_ins_q,\
|
||||
neon_move,neon_move_q,\
|
||||
neon_fp_recpe_s,neon_fp_recpe_d,\
|
||||
neon_fp_recpe_s_q,neon_fp_recpe_d_q,\
|
||||
neon_fp_recpx_s,neon_fp_recpx_d,\
|
||||
neon_fp_recpx_s_q,neon_fp_recpx_d_q,\
|
||||
neon_rev,neon_rev_q,\
|
||||
neon_dup,neon_dup_q,\
|
||||
neon_permute,neon_permute_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_recip_step" 6
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_fp_recps_s,neon_fp_recps_s_q,\
|
||||
neon_fp_recps_d,neon_fp_recps_d_q,\
|
||||
neon_fp_rsqrts_s, neon_fp_rsqrts_s_q,\
|
||||
neon_fp_rsqrts_d, neon_fp_rsqrts_d_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_lut" 8
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_tbl1,neon_tbl1_q,neon_tbl2_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_elt_to_gr" 6
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_to_gp,neon_to_gp_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_ext" 7
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_shift_imm_narrow_q,neon_sat_shift_imm_narrow_q"))
|
||||
"thunderx2t99_f01")
|
||||
|
||||
;; ASIMD load instructions.
|
||||
|
||||
; NOTE: These reservations attempt to model latency and throughput correctly,
|
||||
; but the cycle timing of unit allocation is not necessarily accurate (because
|
||||
; insns are split into uops, and those may be issued out-of-order).
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_load1_1_mult" 4
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q"))
|
||||
"thunderx2t99_ls01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_load1_2_mult" 4
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_load1_2reg,neon_load1_2reg_q"))
|
||||
"thunderx2t99_ls_both")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_load1_onelane" 5
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_load1_one_lane,neon_load1_one_lane_q"))
|
||||
"thunderx2t99_l01delay,thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_load1_all" 5
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q"))
|
||||
"thunderx2t99_l01delay,thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_load2" 5
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_load2_2reg,neon_load2_2reg_q,\
|
||||
neon_load2_one_lane,neon_load2_one_lane_q,\
|
||||
neon_load2_all_lanes,neon_load2_all_lanes_q"))
|
||||
"(thunderx2t99_l0delay,thunderx2t99_f01)|(thunderx2t99_l1delay,\
|
||||
thunderx2t99_f01)")
|
||||
|
||||
;; ASIMD store instructions.
|
||||
|
||||
; Same note applies as for ASIMD load instructions.
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_store1_1_mult" 1
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q"))
|
||||
"thunderx2t99_ls01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_store1_2_mult" 1
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_store1_2reg,neon_store1_2reg_q"))
|
||||
"thunderx2t99_ls_both")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_store1_onelane" 1
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_store1_one_lane,neon_store1_one_lane_q"))
|
||||
"thunderx2t99_ls01,thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_store2_mult" 1
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_store2_2reg,neon_store2_2reg_q"))
|
||||
"thunderx2t99_ls_both,thunderx2t99_f01")
|
||||
|
||||
(define_insn_reservation "thunderx2t99_asimd_store2_onelane" 1
|
||||
(and (eq_attr "tune" "thunderx2t99")
|
||||
(eq_attr "type" "neon_store2_one_lane,neon_store2_one_lane_q"))
|
||||
"thunderx2t99_ls01,thunderx2t99_f01")
|
||||
Loading…
Reference in New Issue