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re PR target/17245 (ICE compiling gsl-1.5 statistics/lag1.c) 

PR target/17245
	* config/sparc/sparc.c (legitimate_address_p): Remove 'imm2'.
	Revert 2004-10-08 patch.  Reject TFmode LO_SUM in 32-bit mode.

From-SVN: r97713
This commit is contained in:
Eric Botcazou 2005-04-06 13:53:53 +02:00 committed by Eric Botcazou
parent fb201aa433
commit f1b259d59e
2 changed files with 11 additions and 21 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2005-04-06 Eric Botcazou <ebotcazou@libertysurf.fr>
PR target/17245
* config/sparc/sparc.c (legitimate_address_p): Remove 'imm2'.
Revert 2004-10-08 patch. Reject TFmode LO_SUM in 32-bit mode.
2005-04-06 Kelley Cook <kcook@gcc.gnu.org>
* Makefile.in (LIBGCC2_CFLAGS): Revert -pipe change.

26
gcc/config/sparc/sparc.c
View File

@ -3500,7 +3500,7 @@ legitimate_pic_operand_p (rtx x)
int
legitimate_address_p (enum machine_mode mode, rtx addr, int strict)
{
rtx rs1 = NULL, rs2 = NULL, imm1 = NULL, imm2;
rtx rs1 = NULL, rs2 = NULL, imm1 = NULL;
if (REG_P (addr) || GET_CODE (addr) == SUBREG)
rs1 = addr;
@ -3564,7 +3564,6 @@ legitimate_address_p (enum machine_mode mode, rtx addr, int strict)
&& ! TARGET_CM_MEDMID
&& RTX_OK_FOR_OLO10_P (rs2))
{
imm2 = rs2;
rs2 = NULL;
imm1 = XEXP (rs1, 1);
rs1 = XEXP (rs1, 0);
@ -3580,25 +3579,10 @@ legitimate_address_p (enum machine_mode mode, rtx addr, int strict)
if (! CONSTANT_P (imm1) || tls_symbolic_operand (rs1))
return 0;
if (USE_AS_OFFSETABLE_LO10)
{
/* We can't allow TFmode, because an offset greater than or equal to
the alignment (8) may cause the LO_SUM to overflow if !v9. */
if (mode == TFmode && ! TARGET_V9)
return 0;
}
else
{
/* We prohibit LO_SUM for TFmode when there are no quad move insns
and we consequently need to split. We do this because LO_SUM
is not an offsettable address. If we get the situation in reload
where source and destination of a movtf pattern are both MEMs with
LO_SUM address, then only one of them gets converted to an
offsettable address. */
if (mode == TFmode
&& ! (TARGET_FPU && TARGET_ARCH64 && TARGET_HARD_QUAD))
return 0;
}
/* We can't allow TFmode in 32-bit mode, because an offset greater
than the alignment (8) may cause the LO_SUM to overflow. */
if (mode == TFmode && !TARGET_64BIT)
return 0;
}
else if (GET_CODE (addr) == CONST_INT && SMALL_INT (addr))
return 1;