i386.md (*lea_1): Use P mode iterator.
2010-08-19 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.md (*lea_1): Use P mode iterator. (lea add splitter): Also handle DImode operands. (DImode lea add splitter): Use x86_64_immediate_operand for operand 2 predicate. Do not use ix86_lea_for_add_ok. (zext DImode lea add splitter): Use ix86_lea_for_add_ok. (lea ashift splitter): Also handle DImode operands. (DImode lea ashift splitter): Remove splitter. 2010-08-19 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.md (*add<SWI:mode>3_cconly_overflow): Do not use ix86_binary_operator_ok. From-SVN: r163375
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Uros Bizjak
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@ -1,8 +1,23 @@
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2010-08-19 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (*lea_1): Use P mode iterator.
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(lea add splitter): Also handle DImode operands.
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(DImode lea add splitter): Use x86_64_immediate_operand for operand 2
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predicate. Do not use ix86_lea_for_add_ok.
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(zext DImode lea add splitter): Use ix86_lea_for_add_ok.
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(lea ashift splitter): Also handle DImode operands.
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(DImode lea ashift splitter): Remove splitter.
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2010-08-19 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (*add<SWI:mode>3_cconly_overflow): Do not use
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ix86_binary_operator_ok.
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2010-08-19 Andrey Belevantsev <abel@ispras.ru>
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PR rtl-optimization/44691
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* sel-sched.c (count_occurrences_1): Also punt when SUBREG_REG
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is not a register.
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is not a register.
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2010-08-19 Ian Bolton <ian.bolton@arm.com>
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@ -5764,8 +5764,8 @@
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(set_attr "mode" "QI")])
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(define_insn "*lea_1"
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[(set (match_operand:DWIH 0 "register_operand" "=r")
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(match_operand:DWIH 1 "no_seg_address_operand" "p"))]
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[(set (match_operand:P 0 "register_operand" "=r")
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(match_operand:P 1 "no_seg_address_operand" "p"))]
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""
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"lea{<imodesuffix>}\t{%a1, %0|%0, %a1}"
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[(set_attr "type" "lea")
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@ -6137,6 +6137,68 @@
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(const_string "none")))
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(set_attr "mode" "QI")])
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand 0 "register_operand" "")
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(plus (match_operand 1 "register_operand" "")
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(match_operand 2 "nonmemory_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"reload_completed && ix86_lea_for_add_ok (insn, operands)"
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[(const_int 0)]
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{
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rtx pat;
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enum machine_mode mode = GET_MODE (operands[0]);
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/* In -fPIC mode the constructs like (const (unspec [symbol_ref]))
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may confuse gen_lowpart. */
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if (mode != Pmode)
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{
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operands[1] = gen_lowpart (Pmode, operands[1]);
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operands[2] = gen_lowpart (Pmode, operands[2]);
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}
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pat = gen_rtx_PLUS (Pmode, operands[1], operands[2]);
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if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
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operands[0] = gen_lowpart (SImode, operands[0]);
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if (TARGET_64BIT && mode != Pmode)
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pat = gen_rtx_SUBREG (SImode, pat, 0);
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
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DONE;
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})
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;; Convert lea to the lea pattern to avoid flags dependency.
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;; ??? This pattern handles immediate operands that do not satisfy immediate
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;; operand predicate (LEGITIMATE_CONSTANT_P) in the previous pattern.
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(plus:DI (match_operand:DI 1 "register_operand" "")
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(match_operand:DI 2 "x86_64_immediate_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& true_regnum (operands[0]) != true_regnum (operands[1])"
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[(set (match_dup 0)
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(plus:DI (match_dup 1) (match_dup 2)))]
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"")
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(zero_extend:DI
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(plus:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "nonmemory_operand" ""))))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& ix86_lea_for_add_ok (insn, operands)"
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[(set (match_dup 0)
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(zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
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{
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operands[1] = gen_lowpart (DImode, operands[1]);
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operands[2] = gen_lowpart (DImode, operands[2]);
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})
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(define_insn "*add<mode>_2"
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[(set (reg FLAGS_REG)
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(compare
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@ -6678,60 +6740,6 @@
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}
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[(set_attr "type" "lea")
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(set_attr "mode" "SI")])
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(plus:DI (match_operand:DI 1 "register_operand" "")
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(match_operand:DI 2 "x86_64_nonmemory_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& ix86_lea_for_add_ok (insn, operands)"
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[(set (match_dup 0)
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(plus:DI (match_dup 1)
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(match_dup 2)))]
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"")
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand 0 "register_operand" "")
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(plus (match_operand 1 "register_operand" "")
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(match_operand 2 "nonmemory_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"reload_completed && ix86_lea_for_add_ok (insn, operands)"
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[(const_int 0)]
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{
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rtx pat;
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/* In -fPIC mode the constructs like (const (unspec [symbol_ref]))
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may confuse gen_lowpart. */
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if (GET_MODE (operands[0]) != Pmode)
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{
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operands[1] = gen_lowpart (Pmode, operands[1]);
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operands[2] = gen_lowpart (Pmode, operands[2]);
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}
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operands[0] = gen_lowpart (SImode, operands[0]);
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pat = gen_rtx_PLUS (Pmode, operands[1], operands[2]);
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if (Pmode != SImode)
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pat = gen_rtx_SUBREG (SImode, pat, 0);
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
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DONE;
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})
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(zero_extend:DI
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(plus:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "nonmemory_operand" ""))))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& true_regnum (operands[0]) != true_regnum (operands[1])"
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[(set (match_dup 0)
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(zero_extend:DI (subreg:SI (plus:DI (match_dup 1) (match_dup 2)) 0)))]
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{
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operands[1] = gen_lowpart (Pmode, operands[1]);
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operands[2] = gen_lowpart (Pmode, operands[2]);
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})
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;; Subtract instructions
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@ -6924,7 +6932,7 @@
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(match_operand:SWI 2 "<general_operand>" "<g>"))
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(match_dup 1)))
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(clobber (match_scratch:SWI 0 "=<r>"))]
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"ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
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"!(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"add{<imodesuffix>}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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(set_attr "mode" "<MODE>")])
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@ -9584,19 +9592,6 @@
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(const_string "*")))
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(set_attr "mode" "QI")])
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(ashift:DI (match_operand:DI 1 "index_register_operand" "")
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(match_operand:QI 2 "const_int_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& true_regnum (operands[0]) != true_regnum (operands[1])"
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[(set (match_dup 0)
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(mult:DI (match_dup 1)
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(match_dup 2)))]
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"operands[2] = gen_int_mode (1 << INTVAL (operands[2]), DImode);")
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand 0 "register_operand" "")
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@ -9604,26 +9599,44 @@
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(match_operand:QI 2 "const_int_operand" "")))
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(clobber (reg:CC FLAGS_REG))]
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"reload_completed
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&& true_regnum (operands[0]) != true_regnum (operands[1])
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&& GET_MODE_SIZE (GET_MODE (operands[0])) <= 4"
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&& true_regnum (operands[0]) != true_regnum (operands[1])"
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[(const_int 0)]
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{
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rtx pat;
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enum machine_mode mode = GET_MODE (operands[0]);
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if (GET_MODE_SIZE (mode) < 4)
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operands[0] = gen_lowpart (SImode, operands[0]);
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if (mode != Pmode)
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operands[1] = gen_lowpart (Pmode, operands[1]);
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operands[2] = gen_int_mode (1 << INTVAL (operands[2]), Pmode);
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pat = gen_rtx_MULT (Pmode, operands[1], operands[2]);
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if (Pmode != SImode)
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if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
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operands[0] = gen_lowpart (SImode, operands[0]);
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if (TARGET_64BIT && mode != Pmode)
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pat = gen_rtx_SUBREG (SImode, pat, 0);
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emit_insn (gen_rtx_SET (VOIDmode, operands[0], pat));
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DONE;
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})
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(zero_extend:DI
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(ashift:SI (match_operand:SI 1 "index_register_operand" "")
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(match_operand:QI 2 "const_int_operand" ""))))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& true_regnum (operands[0]) != true_regnum (operands[1])"
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[(set (match_dup 0)
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(zero_extend:DI (subreg:SI (mult:DI (match_dup 1) (match_dup 2)) 0)))]
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{
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operands[1] = gen_lowpart (DImode, operands[1]);
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operands[2] = gen_int_mode (1 << INTVAL (operands[2]), DImode);
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})
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;; Rare case of shifting RSP is handled by generating move and shift
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(define_split
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[(set (match_operand 0 "register_operand" "")
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@ -9644,22 +9657,6 @@
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DONE;
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})
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;; Convert lea to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand:DI 0 "register_operand" "")
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(zero_extend:DI
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(ashift:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:QI 2 "const_int_operand" ""))))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && reload_completed
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&& true_regnum (operands[0]) != true_regnum (operands[1])"
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[(set (match_dup 0)
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(zero_extend:DI (subreg:SI (mult:DI (match_dup 1) (match_dup 2)) 0)))]
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{
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operands[1] = gen_lowpart (Pmode, operands[1]);
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operands[2] = gen_int_mode (1 << INTVAL (operands[2]), Pmode);
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})
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;; This pattern can't accept a variable shift count, since shifts by
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;; zero don't affect the flags. We assume that shifts by constant
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;; zero are optimized away.
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