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arm.c, [...]: Replace "gen_rtx (FOO, " with "gen_rtx_FOO (". 

* config/arm/arm.c, config/arm/arm.h, config/arm/arm.md,
	config/arm/linux-gas.h, config/arm/netbsd-elf.h,
	config/arm/netbsd.h, config/arm/pe.c, config/avr/avr.c,
	config/avr/avr.h, config/avr/avr.md, config/c4x/c4x.h,
	config/cris/cris.h, config/fr30/fr30.h, config/frv/frv.c,
	config/frv/frv.h, config/ip2k/ip2k.c, config/iq2000/iq2000.c,
	config/iq2000/iq2000.h, config/m32r/m32r.c,
	config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h,
	config/m68hc11/m68hc11.md, config/m68k/m68k.md,
	config/mcore/mcore.c, config/mcore/mcore.h,
	config/mcore/mcore.md, config/mips/mips.c,
	config/ns32k/ns32k.h, config/ns32k/ns32k.md,
	config/rs6000/rs6000.c, config/s390/s390.c,
	config/s390/s390.md, config/sparc/sparc.c, config/v850/v850.c,
	config/xtensa/xtensa.h, config/xtensa/xtensa.md: Replace
	"gen_rtx (FOO, " with "gen_rtx_FOO (".

From-SVN: r77080
This commit is contained in:
Kazu Hirata 2004-02-01 21:21:45 +00:00 committed by Kazu Hirata
parent 3953c05789
commit f1c25d3b47
37 changed files with 508 additions and 490 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
gcc/ChangeLog
View File

@ -1,3 +1,22 @@
2004-02-01 Kazu Hirata <kazu@cs.umass.edu>
* config/arm/arm.c, config/arm/arm.h, config/arm/arm.md,
config/arm/linux-gas.h, config/arm/netbsd-elf.h,
config/arm/netbsd.h, config/arm/pe.c, config/avr/avr.c,
config/avr/avr.h, config/avr/avr.md, config/c4x/c4x.h,
config/cris/cris.h, config/fr30/fr30.h, config/frv/frv.c,
config/frv/frv.h, config/ip2k/ip2k.c, config/iq2000/iq2000.c,
config/iq2000/iq2000.h, config/m32r/m32r.c,
config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h,
config/m68hc11/m68hc11.md, config/m68k/m68k.md,
config/mcore/mcore.c, config/mcore/mcore.h,
config/mcore/mcore.md, config/mips/mips.c,
config/ns32k/ns32k.h, config/ns32k/ns32k.md,
config/rs6000/rs6000.c, config/s390/s390.c,
config/s390/s390.md, config/sparc/sparc.c, config/v850/v850.c,
config/xtensa/xtensa.h, config/xtensa/xtensa.md: Replace
"gen_rtx (FOO, " with "gen_rtx_FOO (".
2004-02-01 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (two peephole2's): New.

40
gcc/config/arm/arm.c
View File

@ -12284,10 +12284,10 @@ thumb_expand_prologue (void)
if (regno > LAST_LO_REGNUM) /* Very unlikely. */
{
rtx spare = gen_rtx (REG, SImode, IP_REGNUM);
rtx spare = gen_rtx_REG (SImode, IP_REGNUM);
/* Choose an arbitrary, non-argument low register. */
reg = gen_rtx (REG, SImode, LAST_LO_REGNUM);
reg = gen_rtx_REG (SImode, LAST_LO_REGNUM);
/* Save it by copying it into a high, scratch register. */
emit_insn (gen_movsi (spare, reg));
@ -12318,7 +12318,7 @@ thumb_expand_prologue (void)
}
else
{
reg = gen_rtx (REG, SImode, regno);
reg = gen_rtx_REG (SImode, regno);
emit_insn (gen_movsi (reg, GEN_INT (- amount)));
@ -12363,7 +12363,7 @@ thumb_expand_epilogue (void)
else
{
/* r3 is always free in the epilogue. */
rtx reg = gen_rtx (REG, SImode, LAST_ARG_REGNUM);
rtx reg = gen_rtx_REG (SImode, LAST_ARG_REGNUM);
emit_insn (gen_movsi (reg, GEN_INT (amount)));
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg));
@ -12661,8 +12661,8 @@ thumb_load_double_from_address (rtx *operands)
switch (GET_CODE (addr))
{
case REG:
operands[2] = gen_rtx (MEM, SImode,
plus_constant (XEXP (operands[1], 0), 4));
operands[2] = gen_rtx_MEM (SImode,
plus_constant (XEXP (operands[1], 0), 4));
if (REGNO (operands[0]) == REGNO (addr))
{
@ -12678,8 +12678,8 @@ thumb_load_double_from_address (rtx *operands)
case CONST:
/* Compute <address> + 4 for the high order load. */
operands[2] = gen_rtx (MEM, SImode,
plus_constant (XEXP (operands[1], 0), 4));
operands[2] = gen_rtx_MEM (SImode,
plus_constant (XEXP (operands[1], 0), 4));
output_asm_insn ("ldr\t%0, %1", operands);
output_asm_insn ("ldr\t%H0, %2", operands);
@ -12722,8 +12722,8 @@ thumb_load_double_from_address (rtx *operands)
else
{
/* Compute <address> + 4 for the high order load. */
operands[2] = gen_rtx (MEM, SImode,
plus_constant (XEXP (operands[1], 0), 4));
operands[2] = gen_rtx_MEM (SImode,
plus_constant (XEXP (operands[1], 0), 4));
/* If the computed address is held in the low order register
then load the high order register first, otherwise always
@ -12744,8 +12744,8 @@ thumb_load_double_from_address (rtx *operands)
case LABEL_REF:
/* With no registers to worry about we can just load the value
directly. */
operands[2] = gen_rtx (MEM, SImode,
plus_constant (XEXP (operands[1], 0), 4));
operands[2] = gen_rtx_MEM (SImode,
plus_constant (XEXP (operands[1], 0), 4));
output_asm_insn ("ldr\t%H0, %2", operands);
output_asm_insn ("ldr\t%0, %1", operands);
@ -12832,8 +12832,8 @@ thumb_expand_movstrqi (rtx *operands)
if (len >= 4)
{
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_movsi (reg, gen_rtx (MEM, SImode, in)));
emit_insn (gen_movsi (gen_rtx (MEM, SImode, out), reg));
emit_insn (gen_movsi (reg, gen_rtx_MEM (SImode, in)));
emit_insn (gen_movsi (gen_rtx_MEM (SImode, out), reg));
len -= 4;
offset += 4;
}
@ -12841,9 +12841,9 @@ thumb_expand_movstrqi (rtx *operands)
if (len >= 2)
{
rtx reg = gen_reg_rtx (HImode);
emit_insn (gen_movhi (reg, gen_rtx (MEM, HImode,
plus_constant (in, offset))));
emit_insn (gen_movhi (gen_rtx (MEM, HImode, plus_constant (out, offset)),
emit_insn (gen_movhi (reg, gen_rtx_MEM (HImode,
plus_constant (in, offset))));
emit_insn (gen_movhi (gen_rtx_MEM (HImode, plus_constant (out, offset)),
reg));
len -= 2;
offset += 2;
@ -12852,9 +12852,9 @@ thumb_expand_movstrqi (rtx *operands)
if (len)
{
rtx reg = gen_reg_rtx (QImode);
emit_insn (gen_movqi (reg, gen_rtx (MEM, QImode,
plus_constant (in, offset))));
emit_insn (gen_movqi (gen_rtx (MEM, QImode, plus_constant (out, offset)),
emit_insn (gen_movqi (reg, gen_rtx_MEM (QImode,
plus_constant (in, offset))));
emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (out, offset)),
reg));
}
}

2
gcc/config/arm/arm.h
View File

@ -1801,7 +1801,7 @@ typedef struct
assemble_name (STREAM, ARM_MCOUNT_NAME); \
fputc ('\n', STREAM); \
ASM_GENERATE_INTERNAL_LABEL (temp, "LP", LABELNO); \
sym = gen_rtx (SYMBOL_REF, Pmode, temp); \
sym = gen_rtx_SYMBOL_REF (Pmode, temp); \
assemble_aligned_integer (UNITS_PER_WORD, sym); \
}
#endif

10
gcc/config/arm/arm.md
View File

@ -3896,7 +3896,7 @@
case 5:
return thumb_load_double_from_address (operands);
case 6:
operands[2] = gen_rtx (MEM, SImode,
operands[2] = gen_rtx_MEM (SImode,
plus_constant (XEXP (operands[0], 0), 4));
output_asm_insn (\"str\\t%1, %0\;str\\t%H1, %2\", operands);
return \"\";
@ -4472,7 +4472,7 @@
if (GET_CODE (operands[0]) != REG)
abort ();
operands[0] = gen_rtx (SUBREG, SImode, operands[0], 0);
operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
DONE;
}
@ -4996,8 +4996,8 @@
case 3:
return thumb_load_double_from_address (operands);
case 4:
operands[2] = gen_rtx (MEM, SImode,
plus_constant (XEXP (operands[0], 0), 4));
operands[2] = gen_rtx_MEM (SImode,
plus_constant (XEXP (operands[0], 0), 4));
output_asm_insn (\"str\\t%1, %0\;str\\t%H1, %2\", operands);
return \"\";
case 5:
@ -9714,7 +9714,7 @@
enum rtx_code rc = GET_CODE (operands[1]);
operands[6] = gen_rtx_REG (mode, CC_REGNUM);
operands[7] = gen_rtx (COMPARE, mode, operands[2], operands[3]);
operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
if (mode == CCFPmode || mode == CCFPEmode)
rc = reverse_condition_maybe_unordered (rc);
else

4
gcc/config/arm/linux-gas.h
View File

@ -45,9 +45,9 @@
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \

4
gcc/config/arm/netbsd-elf.h
View File

@ -145,9 +145,9 @@
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
do \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \

4
gcc/config/arm/netbsd.h
View File

@ -146,9 +146,9 @@
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \

10
gcc/config/arm/pe.c
View File

@ -130,7 +130,7 @@ arm_mark_dllexport (decl)
idp = get_identifier (newname);
XEXP (DECL_RTL (decl), 0) =
gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
}
/* Mark a DECL as being dllimport'd. */
@ -200,9 +200,9 @@ arm_mark_dllimport (decl)
/* ??? At least I think that's why we do this. */
idp = get_identifier (newname);
newrtl = gen_rtx (MEM, Pmode,
gen_rtx (SYMBOL_REF, Pmode,
IDENTIFIER_POINTER (idp)));
newrtl = gen_rtx_MEM (Pmode,
gen_rtx_SYMBOL_REF (Pmode,
IDENTIFIER_POINTER (idp)));
XEXP (DECL_RTL (decl), 0) = newrtl;
}
@ -236,7 +236,7 @@ arm_pe_encode_section_info (decl, rtl, first)
{
const char *oldname = XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0);
tree idp = get_identifier (oldname + 9);
rtx newrtl = gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
rtx newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
XEXP (DECL_RTL (decl), 0) = newrtl;

17
gcc/config/avr/avr.c
View File

@ -83,10 +83,10 @@ static bool avr_return_in_memory (tree, tree);
/* Allocate registers from r25 to r8 for parameters for function calls. */
#define FIRST_CUM_REG 26
/* Temporary register RTX (gen_rtx (REG,QImode,TMP_REGNO)) */
/* Temporary register RTX (gen_rtx_REG (QImode, TMP_REGNO)) */
static GTY(()) rtx tmp_reg_rtx;
/* Zeroed register RTX (gen_rtx (REG,QImode,ZERO_REGNO)) */
/* Zeroed register RTX (gen_rtx_REG (QImode, ZERO_REGNO)) */
static GTY(()) rtx zero_reg_rtx;
/* AVR register names {"r0", "r1", ..., "r31"} */
@ -1472,7 +1472,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
int bytes = avr_num_arg_regs (mode, type);
if (cum->nregs && bytes <= cum->nregs)
return gen_rtx (REG, mode, cum->regno - bytes);
return gen_rtx_REG (mode, cum->regno - bytes);
return NULL_RTX;
}
@ -2782,7 +2782,7 @@ out_shift_with_cnt (const char *template, rtx insn, rtx operands[],
/* No scratch register available, use one from LD_REGS (saved in
__tmp_reg__) that doesn't overlap with registers to shift. */
op[3] = gen_rtx (REG, QImode,
op[3] = gen_rtx_REG (QImode,
((true_regnum (operands[0]) - 1) & 15) + 16);
op[4] = tmp_reg_rtx;
saved_in_tmp = 1;
@ -5001,9 +5001,8 @@ avr_reorg (void)
rtx t = XEXP (src,0);
PUT_CODE (t, swap_condition (GET_CODE (t)));
SET_SRC (pattern) = gen_rtx (NEG,
GET_MODE (SET_SRC (pattern)),
SET_SRC (pattern));
SET_SRC (pattern) = gen_rtx_NEG (GET_MODE (SET_SRC (pattern)),
SET_SRC (pattern));
INSN_CODE (next) = -1;
INSN_CODE (insn) = -1;
}
@ -5028,7 +5027,7 @@ avr_libcall_value (enum machine_mode mode)
int offs = GET_MODE_SIZE (mode);
if (offs < 2)
offs = 2;
return gen_rtx (REG, mode, RET_REGISTER + 2 - offs);
return gen_rtx_REG (mode, RET_REGISTER + 2 - offs);
}
/* Create an RTX representing the place where a
@ -5050,7 +5049,7 @@ avr_function_value (tree type, tree func ATTRIBUTE_UNUSED)
else if (offs > GET_MODE_SIZE (SImode) && offs < GET_MODE_SIZE (DImode))
offs = GET_MODE_SIZE (DImode);
return gen_rtx (REG, BLKmode, RET_REGISTER + 2 - offs);
return gen_rtx_REG (BLKmode, RET_REGISTER + 2 - offs);
}
/* Returns nonzero if the number MASK has only one bit set. */

4
gcc/config/avr/avr.h
View File

@ -793,8 +793,8 @@ extern int avr_case_values_threshold;
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, HImode, plus_constant ((TRAMP), 2)), CXT); \
emit_move_insn (gen_rtx (MEM, HImode, plus_constant ((TRAMP), 6)), FNADDR); \
emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
}
/* Store in cc_status the expressions
that the condition codes will describe

8
gcc/config/avr/avr.md
View File

@ -371,8 +371,8 @@
operands[5] = addr0;
operands[6] = addr1;
operands[0] = gen_rtx (MEM, BLKmode, addr0);
operands[1] = gen_rtx (MEM, BLKmode, addr1);
operands[0] = gen_rtx_MEM (BLKmode, addr0);
operands[1] = gen_rtx_MEM (BLKmode, addr1);
}")
(define_insn "*movstrqi_insn"
@ -444,7 +444,7 @@
addr0 = copy_to_mode_reg (Pmode, XEXP (operands[0], 0));
operands[4] = addr0;
operands[0] = gen_rtx (MEM, BLKmode, addr0);
operands[0] = gen_rtx_MEM (BLKmode, addr0);
}")
(define_insn "*clrstrqi"
@ -499,7 +499,7 @@
if (! (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) == 0))
FAIL;
addr = copy_to_mode_reg (Pmode, XEXP (operands[1],0));
operands[1] = gen_rtx (MEM, BLKmode, addr);
operands[1] = gen_rtx_MEM (BLKmode, addr);
operands[5] = addr;
operands[4] = gen_reg_rtx (HImode);
}")

12
gcc/config/c4x/c4x.h
View File

@ -1777,33 +1777,33 @@ do { fprintf (asm_out_file, "\t.sdef\t"); \
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x5069), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
emit_move_insn (gen_rtx (MEM, QImode, \
emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 0)), tmp1); \
tmp1 = expand_and (QImode, FNADDR, GEN_INT (0xffff), 0); \
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x1069), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
emit_move_insn (gen_rtx (MEM, QImode, \
emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 2)), tmp1); \
tmp1 = expand_shift (RSHIFT_EXPR, QImode, CXT, \
size_int (16), 0, 1); \
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x5068), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
emit_move_insn (gen_rtx (MEM, QImode, \
emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 3)), tmp1); \
tmp1 = expand_and (QImode, CXT, GEN_INT (0xffff), 0); \
tmp2 = expand_shift (LSHIFT_EXPR, QImode, \
GEN_INT (0x1068), size_int (16), 0, 1); \
emit_insn (gen_iorqi3 (tmp1, tmp1, tmp2)); \
emit_move_insn (gen_rtx (MEM, QImode, \
emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (tramp, 6)), tmp1); \
} \
else \
{ \
emit_move_insn (gen_rtx (MEM, QImode, \
emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (TRAMP, 8)), FNADDR); \
emit_move_insn (gen_rtx (MEM, QImode, \
emit_move_insn (gen_rtx_MEM (QImode, \
plus_constant (TRAMP, 9)), CXT); \
} \
}

14
gcc/config/cris/cris.h
View File

@ -822,7 +822,7 @@ enum reg_class {NO_REGS, ALL_REGS, LIM_REG_CLASSES};
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
cris_return_addr_rtx (COUNT, FRAMEADDR)
#define INCOMING_RETURN_ADDR_RTX gen_rtx (REG, Pmode, CRIS_SRP_REGNUM)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CRIS_SRP_REGNUM)
/* FIXME: Any __builtin_eh_return callers must not return anything and
there must not be collisions with incoming parameters. Luckily the
@ -915,7 +915,7 @@ enum reg_class {NO_REGS, ALL_REGS, LIM_REG_CLASSES};
((CUM).regs < CRIS_MAX_ARGS_IN_REGS \
&& (TYPE) != void_type_node \
&& ! FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED) \
? gen_rtx (REG, MODE, (CRIS_FIRST_ARG_REG) + (CUM).regs) \
? gen_rtx_REG (MODE, (CRIS_FIRST_ARG_REG) + (CUM).regs) \
: NULL_RTX)
/* The differences between this and the previous, is that this one checks
@ -925,7 +925,7 @@ enum reg_class {NO_REGS, ALL_REGS, LIM_REG_CLASSES};
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
(((NAMED) && (CUM).regs < CRIS_MAX_ARGS_IN_REGS \
&& ! FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED)) \
? gen_rtx (REG, MODE, CRIS_FIRST_ARG_REG + (CUM).regs) \
? gen_rtx_REG (MODE, CRIS_FIRST_ARG_REG + (CUM).regs) \
: NULL_RTX)
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
@ -976,9 +976,9 @@ struct cum_args {int regs;};
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
time being. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), CRIS_FIRST_ARG_REG)
gen_rtx_REG (TYPE_MODE (VALTYPE), CRIS_FIRST_ARG_REG)
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, CRIS_FIRST_ARG_REG)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, CRIS_FIRST_ARG_REG)
#define FUNCTION_VALUE_REGNO_P(N) ((N) == CRIS_FIRST_ARG_REG)
@ -1063,10 +1063,10 @@ struct cum_args {int regs;};
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
do \
{ \
emit_move_insn (gen_rtx (MEM, SImode, \
emit_move_insn (gen_rtx_MEM (SImode, \
plus_constant (TRAMP, 10)), \
CXT); \
emit_move_insn (gen_rtx (MEM, SImode, \
emit_move_insn (gen_rtx_MEM (SImode, \
plus_constant (TRAMP, 16)), \
FNADDR); \
} \

8
gcc/config/fr30/fr30.h
View File

@ -696,7 +696,7 @@ enum reg_class
( (NAMED) == 0 ? NULL_RTX \
: MUST_PASS_IN_STACK (MODE, TYPE) ? NULL_RTX \
: (CUM) >= FR30_NUM_ARG_REGS ? NULL_RTX \
: gen_rtx (REG, MODE, CUM + FIRST_ARG_REGNUM))
: gen_rtx_REG (MODE, CUM + FIRST_ARG_REGNUM))
/* A C type for declaring a variable that is used as the first argument of
`FUNCTION_ARG' and other related values. For some target machines, the type
@ -816,7 +816,7 @@ enum reg_class
The definition of `LIBRARY_VALUE' need not be concerned aggregate data
types, because none of the library functions returns such types. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RETURN_VALUE_REGNUM)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
/* A C expression that is nonzero if REGNO is the number of a hard register in
which the values of called function may come back. */
@ -941,8 +941,8 @@ enum reg_class
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
do \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (ADDR, 4)), STATIC_CHAIN);\
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (ADDR, 12)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (ADDR, 4)), STATIC_CHAIN);\
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (ADDR, 12)), FNADDR); \
} while (0);
/*}}}*/

4
gcc/config/frv/frv.c
View File

@ -1933,7 +1933,7 @@ frv_expand_builtin_saveregs (void)
fprintf (stderr, "expand_builtin_saveregs: offset from ap = %d\n",
offset);
return gen_rtx (PLUS, Pmode, virtual_incoming_args_rtx, GEN_INT (- offset));
return gen_rtx_PLUS (Pmode, virtual_incoming_args_rtx, GEN_INT (- offset));
}
@ -2991,7 +2991,7 @@ frv_function_arg (CUMULATIVE_ARGS *cum,
else if (arg_num <= LAST_ARG_REGNUM)
{
ret = gen_rtx (REG, xmode, arg_num);
ret = gen_rtx_REG (xmode, arg_num);
debstr = reg_names[arg_num];
}

4
gcc/config/frv/frv.h
View File

@ -2013,7 +2013,7 @@ struct machine_function GTY(())
because these are returned in another way. See
`TARGET_STRUCT_VALUE_RTX' and related macros, below. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM)
gen_rtx_REG (TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM)
/* A C expression to create an RTX representing the place where a library
function returns a value of mode MODE.
@ -2024,7 +2024,7 @@ struct machine_function GTY(())
The definition of `LIBRARY_VALUE' need not be concerned aggregate data
types, because none of the library functions returns such types. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RETURN_VALUE_REGNUM)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
/* A C expression that is nonzero if REGNO is the number of a hard register in
which the values of called function may come back.

2
gcc/config/ip2k/ip2k.c
View File

@ -3761,7 +3761,7 @@ track_dp_reload (insn, dp_current, dp_current_ok, modifying)
+ GET_MODE_SIZE (GET_MODE (XEXP (set, 0))));
*dp_current = gen_rtx_MEM (HImode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG(HImode, REG_SP),
gen_rtx_REG (HImode, REG_SP),
GEN_INT (disp)));
return 1;
}

26
gcc/config/iq2000/iq2000.c
View File

@ -1176,7 +1176,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1,
if (test == ITEST_NE)
{
convert_move (result, gen_rtx (GTU, mode, reg, const0_rtx), 0);
convert_move (result, gen_rtx_GTU (mode, reg, const0_rtx), 0);
if (p_invert != NULL)
*p_invert = 0;
invert = 0;
@ -1194,7 +1194,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1,
rtx one;
one = const1_rtx;
convert_move (result, gen_rtx (XOR, mode, reg, one), 0);
convert_move (result, gen_rtx_XOR (mode, reg, one), 0);
}
return result;
@ -1538,7 +1538,7 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
if (mode == VOIDmode)
{
if (cum->num_adjusts > 0)
ret = gen_rtx (PARALLEL, (enum machine_mode) cum->fp_code,
ret = gen_rtx_PARALLEL ((enum machine_mode) cum->fp_code,
gen_rtvec_v (cum->num_adjusts, cum->adjust));
}
@ -2273,14 +2273,14 @@ save_restore_insns (int store_p)
{
rtx reg_rtx;
rtx mem_rtx
= gen_rtx (MEM, gpr_mode,
gen_rtx (PLUS, Pmode, base_reg_rtx,
= gen_rtx_MEM (gpr_mode,
gen_rtx_PLUS (Pmode, base_reg_rtx,
GEN_INT (gp_offset - base_offset)));
if (! current_function_calls_eh_return)
RTX_UNCHANGING_P (mem_rtx) = 1;
reg_rtx = gen_rtx (REG, gpr_mode, regno);
reg_rtx = gen_rtx_REG (gpr_mode, regno);
if (store_p)
iq2000_emit_frame_related_store (mem_rtx, reg_rtx, gp_offset);
@ -2434,9 +2434,9 @@ iq2000_expand_prologue (void)
for (; regno <= GP_ARG_LAST; regno++)
{
if (offset != 0)
ptr = gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (offset));
emit_move_insn (gen_rtx (MEM, gpr_mode, ptr),
gen_rtx (REG, gpr_mode, regno));
ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
emit_move_insn (gen_rtx_MEM (gpr_mode, ptr),
gen_rtx_REG (gpr_mode, regno));
offset += GET_MODE_SIZE (gpr_mode);
}
@ -2449,7 +2449,7 @@ iq2000_expand_prologue (void)
if (tsize > 32767)
{
adjustment_rtx = gen_rtx (REG, Pmode, IQ2000_TEMP1_REGNUM);
adjustment_rtx = gen_rtx_REG (Pmode, IQ2000_TEMP1_REGNUM);
emit_move_insn (adjustment_rtx, tsize_rtx);
}
else
@ -2532,14 +2532,14 @@ iq2000_expand_epilogue (void)
if (current_function_calls_eh_return)
{
/* Perform the additional bump for __throw. */
emit_move_insn (gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM),
emit_move_insn (gen_rtx_REG (Pmode, HARD_FRAME_POINTER_REGNUM),
stack_pointer_rtx);
emit_insn (gen_rtx (USE, VOIDmode, gen_rtx (REG, Pmode,
emit_insn (gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode,
HARD_FRAME_POINTER_REGNUM)));
emit_jump_insn (gen_eh_return_internal ());
}
else
emit_jump_insn (gen_return_internal (gen_rtx (REG, Pmode,
emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode,
GP_REG_FIRST + 31)));
}

15
gcc/config/iq2000/iq2000.h
View File

@ -499,13 +499,12 @@ typedef struct iq2000_args
#define FUNCTION_VALUE(VALTYPE, FUNC) iq2000_function_value (VALTYPE, FUNC)
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, \
((GET_MODE_CLASS (MODE) != MODE_INT \
|| GET_MODE_SIZE (MODE) >= 4) \
? (MODE) \
: SImode), \
GP_RETURN)
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
|| GET_MODE_SIZE (MODE) >= 4) \
? (MODE) \
: SImode), \
GP_RETURN)
/* On the IQ2000, R2 and R3 are the only register thus used. */
@ -641,7 +640,7 @@ typedef struct iq2000_args
{ \
X = gen_rtx_LO_SUM (Pmode, \
copy_to_mode_reg (Pmode, \
gen_rtx (HIGH, Pmode, X)), \
gen_rtx_HIGH (Pmode, X)), \
X); \
goto WIN; \
} \

14
gcc/config/m32r/m32r.c
View File

@ -1088,7 +1088,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
break;
case GT:
if (GET_CODE (y) == CONST_INT)
tmp = gen_rtx (PLUS, SImode, y, const1_rtx);
tmp = gen_rtx_PLUS (SImode, y, const1_rtx);
else
emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
emit_insn (gen_cmp_ltsi_insn (x, tmp));
@ -1128,7 +1128,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
break;
case GTU:
if (GET_CODE (y) == CONST_INT)
tmp = gen_rtx (PLUS, SImode, y, const1_rtx);
tmp = gen_rtx_PLUS (SImode, y, const1_rtx);
else
emit_insn (gen_addsi3 (tmp, y, constm1_rtx));
emit_insn (gen_cmp_ltusi_insn (x, tmp));
@ -2205,7 +2205,7 @@ m32r_legitimize_pic_address (rtx orig, rtx reg)
emit_insn (gen_pic_load_addr (address, orig));
emit_insn (gen_addsi3 (address, address, pic_offset_table_rtx));
pic_ref = gen_rtx (MEM, Pmode, address);
pic_ref = gen_rtx_MEM (Pmode, address);
RTX_UNCHANGING_P (pic_ref) = 1;
insn = emit_move_insn (reg, pic_ref);
@ -2213,7 +2213,7 @@ m32r_legitimize_pic_address (rtx orig, rtx reg)
#if 0
/* Put a REG_EQUAL note on this insn, so that it can be optimized
by loop. */
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig,
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
REG_NOTES (insn));
#endif
return reg;
@ -2256,7 +2256,7 @@ m32r_legitimize_pic_address (rtx orig, rtx reg)
abort ();
}
return gen_rtx (PLUS, Pmode, base, offset);
return gen_rtx_PLUS (Pmode, base, offset);
}
return orig;
@ -2760,13 +2760,13 @@ block_move_call (rtx dest_reg, rtx src_reg, rtx bytes_rtx)
bytes_rtx = convert_to_mode (Pmode, bytes_rtx, 1);
#ifdef TARGET_MEM_FUNCTIONS
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0,
VOIDmode, 3, dest_reg, Pmode, src_reg, Pmode,
convert_to_mode (TYPE_MODE (sizetype), bytes_rtx,
TREE_UNSIGNED (sizetype)),
TYPE_MODE (sizetype));
#else
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0,
VOIDmode, 3, src_reg, Pmode, dest_reg, Pmode,
convert_to_mode (TYPE_MODE (integer_type_node), bytes_rtx,
TREE_UNSIGNED (integer_type_node)),

146
gcc/config/m68hc11/m68hc11.c
View File

@ -366,17 +366,17 @@ void
create_regs_rtx (void)
{
/* regs_inited = 1; */
ix_reg = gen_rtx (REG, HImode, HARD_X_REGNUM);
iy_reg = gen_rtx (REG, HImode, HARD_Y_REGNUM);
d_reg = gen_rtx (REG, HImode, HARD_D_REGNUM);
m68hc11_soft_tmp_reg = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
ix_reg = gen_rtx_REG (HImode, HARD_X_REGNUM);
iy_reg = gen_rtx_REG (HImode, HARD_Y_REGNUM);
d_reg = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_soft_tmp_reg = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
stack_push_word = gen_rtx (MEM, HImode,
gen_rtx (PRE_DEC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
stack_pop_word = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
stack_push_word = gen_rtx_MEM (HImode,
gen_rtx_PRE_DEC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
stack_pop_word = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
}
@ -828,19 +828,19 @@ m68hc11_reload_operands (rtx operands[])
offset = GEN_INT (vl);
if (!VALID_CONSTANT_OFFSET_P (offset, mode))
{
emit_insn (gen_rtx (SET, VOIDmode, reg,
gen_rtx (PLUS, HImode, reg, big_offset)));
emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx_PLUS (HImode, reg, big_offset)));
offset = const0_rtx;
}
else
{
emit_insn (gen_rtx (SET, VOIDmode, reg,
gen_rtx (PLUS, HImode, reg,
emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx_PLUS (HImode, reg,
GEN_INT (vh << 8))));
}
emit_move_insn (operands[0],
gen_rtx (MEM, GET_MODE (operands[1]),
gen_rtx (PLUS, Pmode, reg, offset)));
gen_rtx_MEM (GET_MODE (operands[1]),
gen_rtx_PLUS (Pmode, reg, offset)));
return 1;
}
}
@ -1501,13 +1501,13 @@ m68hc11_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
if (mode != BLKmode)
{
if (GET_MODE_SIZE (mode) == 2 * HARD_REG_SIZE)
return gen_rtx (REG, mode, HARD_X_REGNUM);
return gen_rtx_REG (mode, HARD_X_REGNUM);
if (GET_MODE_SIZE (mode) > HARD_REG_SIZE)
{
return NULL_RTX;
}
return gen_rtx (REG, mode, HARD_D_REGNUM);
return gen_rtx_REG (mode, HARD_D_REGNUM);
}
return NULL_RTX;
}
@ -1653,9 +1653,9 @@ expand_prologue (void)
{
emit_move_after_reload (stack_push_word, m68hc11_soft_tmp_reg, scratch);
emit_move_after_reload (stack_push_word,
gen_rtx (REG, HImode, SOFT_Z_REGNUM), scratch);
gen_rtx_REG (HImode, SOFT_Z_REGNUM), scratch);
emit_move_after_reload (stack_push_word,
gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM),
gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM),
scratch);
}
@ -1704,7 +1704,7 @@ expand_prologue (void)
if (regs_ever_live[regno] && !call_used_regs[regno])
{
emit_move_after_reload (stack_push_word,
gen_rtx (REG, HImode, regno), scratch);
gen_rtx_REG (HImode, regno), scratch);
}
}
}
@ -1742,7 +1742,7 @@ expand_epilogue (void)
{
if (regs_ever_live[regno] && !call_used_regs[regno])
{
emit_move_after_reload (gen_rtx (REG, HImode, regno),
emit_move_after_reload (gen_rtx_REG (HImode, regno),
stack_pop_word, scratch);
}
}
@ -1782,9 +1782,9 @@ expand_epilogue (void)
/* For an interrupt handler, restore ZTMP, ZREG and XYREG. */
if (current_function_interrupt)
{
emit_move_after_reload (gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM),
emit_move_after_reload (gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM),
stack_pop_word, scratch);
emit_move_after_reload (gen_rtx (REG, HImode, SOFT_Z_REGNUM),
emit_move_after_reload (gen_rtx_REG (HImode, SOFT_Z_REGNUM),
stack_pop_word, scratch);
emit_move_after_reload (m68hc11_soft_tmp_reg, stack_pop_word, scratch);
}
@ -1805,12 +1805,12 @@ expand_epilogue (void)
emit_move_after_reload (scratch, stack_pointer_rtx, 0);
addr_reg = scratch;
}
emit_move_after_reload (gen_rtx (MEM, HImode,
gen_rtx (PLUS, HImode, addr_reg,
emit_move_after_reload (gen_rtx_MEM (HImode,
gen_rtx_PLUS (HImode, addr_reg,
GEN_INT (1))), d_reg, 0);
if (return_size > HARD_REG_SIZE)
emit_move_after_reload (gen_rtx (MEM, HImode,
gen_rtx (PLUS, HImode, addr_reg,
emit_move_after_reload (gen_rtx_MEM (HImode,
gen_rtx_PLUS (HImode, addr_reg,
GEN_INT (3))), ix_reg, 0);
}
@ -1830,7 +1830,7 @@ m68hc11_gen_lowpart (enum machine_mode mode, rtx x)
correct order. */
if (GET_CODE (x) == MEM && m68hc11_auto_inc_p (XEXP (x, 0)))
{
return gen_rtx (MEM, mode, XEXP (x, 0));
return gen_rtx_MEM (mode, XEXP (x, 0));
}
/* Note that a CONST_DOUBLE rtx could represent either an integer or a
@ -1875,7 +1875,7 @@ m68hc11_gen_lowpart (enum machine_mode mode, rtx x)
}
if (mode == QImode && D_REG_P (x))
return gen_rtx (REG, mode, HARD_B_REGNUM);
return gen_rtx_REG (mode, HARD_B_REGNUM);
/* gen_lowpart crashes when it is called with a SUBREG. */
if (GET_CODE (x) == SUBREG && SUBREG_BYTE (x) != 0)
@ -1905,7 +1905,7 @@ m68hc11_gen_highpart (enum machine_mode mode, rtx x)
correct order. */
if (GET_CODE (x) == MEM && m68hc11_auto_inc_p (XEXP (x, 0)))
{
return gen_rtx (MEM, mode, XEXP (x, 0));
return gen_rtx_MEM (mode, XEXP (x, 0));
}
/* Note that a CONST_DOUBLE rtx could represent either an integer or a
@ -1963,7 +1963,7 @@ m68hc11_gen_highpart (enum machine_mode mode, rtx x)
}
}
if (mode == QImode && D_REG_P (x))
return gen_rtx (REG, mode, HARD_A_REGNUM);
return gen_rtx_REG (mode, HARD_A_REGNUM);
/* There is no way in GCC to represent the upper part of a word register.
To obtain the 8-bit upper part of a soft register, we change the
@ -1976,20 +1976,20 @@ m68hc11_gen_highpart (enum machine_mode mode, rtx x)
/* Avoid the '*' for direct addressing mode when this
addressing mode is disabled. */
pos = TARGET_NO_DIRECT_MODE ? 1 : 0;
return gen_rtx (MEM, QImode,
gen_rtx (SYMBOL_REF, Pmode,
return gen_rtx_MEM (QImode,
gen_rtx_SYMBOL_REF (Pmode,
&reg_names[REGNO (x)][pos]));
}
/* gen_highpart crashes when it is called with a SUBREG. */
if (GET_CODE (x) == SUBREG)
{
return gen_rtx (SUBREG, mode, XEXP (x, 0), XEXP (x, 1));
return gen_rtx_SUBREG (mode, XEXP (x, 0), XEXP (x, 1));
}
if (GET_CODE (x) == REG)
{
if (REGNO (x) < FIRST_PSEUDO_REGISTER)
return gen_rtx (REG, mode, REGNO (x));
return gen_rtx_REG (mode, REGNO (x));
else
return gen_rtx_SUBREG (mode, x, 0);
}
@ -2023,7 +2023,7 @@ dead_register_here (rtx x, rtx reg)
rtx p;
if (D_REG_P (reg))
x_reg = gen_rtx (REG, SImode, HARD_X_REGNUM);
x_reg = gen_rtx_REG (SImode, HARD_X_REGNUM);
else
x_reg = 0;
@ -2814,7 +2814,7 @@ m68hc11_split_move (rtx to, rtx from, rtx scratch)
if (TARGET_M6812
&& IS_STACK_PUSH (to)
&& reg_mentioned_p (gen_rtx (REG, HImode, HARD_SP_REGNUM), from))
&& reg_mentioned_p (gen_rtx_REG (HImode, HARD_SP_REGNUM), from))
{
if (mode == SImode)
{
@ -2975,7 +2975,7 @@ m68hc11_emit_logical (enum machine_mode mode, int code, rtx *operands)
if (!H_REG_P (operands[0]) && operands[3])
{
emit_move_insn (operands[3], operands[1]);
emit_insn (gen_rtx (SET, mode,
emit_insn (gen_rtx_SET (mode,
operands[3],
gen_rtx (code, mode,
operands[3], operands[2])));
@ -2983,7 +2983,7 @@ m68hc11_emit_logical (enum machine_mode mode, int code, rtx *operands)
}
else
{
insn = emit_insn (gen_rtx (SET, mode,
insn = emit_insn (gen_rtx_SET (mode,
operands[0],
gen_rtx (code, mode,
operands[0], operands[2])));
@ -3077,10 +3077,10 @@ m68hc11_output_swap (rtx insn ATTRIBUTE_UNUSED, rtx operands[])
{
cc_status = cc_prev_status;
if (D_REG_P (cc_status.value1))
cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_X_REGNUM);
else
cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_D_REGNUM);
}
else
@ -3096,10 +3096,10 @@ m68hc11_output_swap (rtx insn ATTRIBUTE_UNUSED, rtx operands[])
{
cc_status = cc_prev_status;
if (D_REG_P (cc_status.value1))
cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_Y_REGNUM);
else
cc_status.value1 = gen_rtx (REG, GET_MODE (cc_status.value1),
cc_status.value1 = gen_rtx_REG (GET_MODE (cc_status.value1),
HARD_D_REGNUM);
}
else
@ -4733,7 +4733,7 @@ m68hc11_find_z_replacement (rtx insn, struct replace_info *info)
if (info->regno >= 0)
{
reg = info->regno;
info->replace_reg = gen_rtx (REG, HImode, reg);
info->replace_reg = gen_rtx_REG (HImode, reg);
}
else if (info->can_use_d)
{
@ -4785,26 +4785,26 @@ m68hc11_z_replacement (rtx insn)
if (Z_REG_P (dst) && (H_REG_P (src) && !SP_REG_P (src)))
{
XEXP (body, 0) = gen_rtx (REG, GET_MODE (dst), SOFT_Z_REGNUM);
XEXP (body, 0) = gen_rtx_REG (GET_MODE (dst), SOFT_Z_REGNUM);
return;
}
else if (Z_REG_P (src)
&& ((H_REG_P (dst) && !SP_REG_P (src)) || dst == cc0_rtx))
{
XEXP (body, 1) = gen_rtx (REG, GET_MODE (src), SOFT_Z_REGNUM);
XEXP (body, 1) = gen_rtx_REG (GET_MODE (src), SOFT_Z_REGNUM);
return;
}
else if (D_REG_P (dst)
&& m68hc11_arith_operator (src, GET_MODE (src))
&& D_REG_P (XEXP (src, 0)) && Z_REG_P (XEXP (src, 1)))
{
XEXP (src, 1) = gen_rtx (REG, GET_MODE (src), SOFT_Z_REGNUM);
XEXP (src, 1) = gen_rtx_REG (GET_MODE (src), SOFT_Z_REGNUM);
return;
}
else if (Z_REG_P (dst) && GET_CODE (src) == CONST_INT
&& INTVAL (src) == 0)
{
XEXP (body, 0) = gen_rtx (REG, GET_MODE (dst), SOFT_Z_REGNUM);
XEXP (body, 0) = gen_rtx_REG (GET_MODE (dst), SOFT_Z_REGNUM);
/* Force it to be re-recognized. */
INSN_CODE (insn) = -1;
return;
@ -4822,19 +4822,19 @@ m68hc11_z_replacement (rtx insn)
rtx dst;
if (info.must_push_reg && 0)
dst = gen_rtx (MEM, HImode,
gen_rtx (PRE_DEC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
dst = gen_rtx_MEM (HImode,
gen_rtx_PRE_DEC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
dst = gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM);
dst = gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM);
emit_insn_before (gen_movhi (dst,
gen_rtx (REG, HImode, info.regno)), insn);
gen_rtx_REG (HImode, info.regno)), insn);
}
if (info.must_load_z && !info.must_push_reg)
{
emit_insn_before (gen_movhi (gen_rtx (REG, HImode, info.regno),
gen_rtx (REG, HImode, SOFT_Z_REGNUM)),
emit_insn_before (gen_movhi (gen_rtx_REG (HImode, info.regno),
gen_rtx_REG (HImode, SOFT_Z_REGNUM)),
insn);
}
@ -4894,7 +4894,7 @@ m68hc11_z_replacement (rtx insn)
if (reg_mentioned_p (z_reg, insn))
{
if (replace_reg_qi == NULL_RTX)
replace_reg_qi = gen_rtx (REG, QImode, REGNO (replace_reg));
replace_reg_qi = gen_rtx_REG (QImode, REGNO (replace_reg));
validate_replace_rtx (z_reg_qi, replace_reg_qi, insn);
}
@ -4926,8 +4926,8 @@ m68hc11_z_replacement (rtx insn)
if (info.save_before_last)
save_pos_insn = PREV_INSN (save_pos_insn);
emit_insn_before (gen_movhi (gen_rtx (REG, HImode, SOFT_Z_REGNUM),
gen_rtx (REG, HImode, info.regno)),
emit_insn_before (gen_movhi (gen_rtx_REG (HImode, SOFT_Z_REGNUM),
gen_rtx_REG (HImode, info.regno)),
save_pos_insn);
}
@ -4936,12 +4936,12 @@ m68hc11_z_replacement (rtx insn)
rtx new_body, body;
body = PATTERN (info.last);
new_body = gen_rtx (PARALLEL, VOIDmode,
new_body = gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (3, body,
gen_rtx (USE, VOIDmode,
gen_rtx_USE (VOIDmode,
replace_reg),
gen_rtx (USE, VOIDmode,
gen_rtx (REG, HImode,
gen_rtx_USE (VOIDmode,
gen_rtx_REG (HImode,
SOFT_Z_REGNUM))));
PATTERN (info.last) = new_body;
@ -4961,13 +4961,13 @@ m68hc11_z_replacement (rtx insn)
rtx dst;
if (info.must_push_reg && 0)
dst = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
dst = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
dst = gen_rtx (REG, HImode, SOFT_SAVED_XY_REGNUM);
dst = gen_rtx_REG (HImode, SOFT_SAVED_XY_REGNUM);
emit_insn_before (gen_movhi (gen_rtx (REG, HImode, info.regno),
emit_insn_before (gen_movhi (gen_rtx_REG (HImode, info.regno),
dst), insn);
}
@ -4983,10 +4983,10 @@ m68hc11_reassign_regs (rtx first)
{
rtx insn;
ix_reg = gen_rtx (REG, HImode, HARD_X_REGNUM);
iy_reg = gen_rtx (REG, HImode, HARD_Y_REGNUM);
z_reg = gen_rtx (REG, HImode, HARD_Z_REGNUM);
z_reg_qi = gen_rtx (REG, QImode, HARD_Z_REGNUM);
ix_reg = gen_rtx_REG (HImode, HARD_X_REGNUM);
iy_reg = gen_rtx_REG (HImode, HARD_Y_REGNUM);
z_reg = gen_rtx_REG (HImode, HARD_Z_REGNUM);
z_reg_qi = gen_rtx_REG (QImode, HARD_Z_REGNUM);
/* Scan all insns to replace Z by X or Y preserving the old value
of X/Y and restoring it afterward. */
@ -5049,7 +5049,7 @@ m68hc11_reorg (void)
rtx insn, first;
z_replacement_completed = 0;
z_reg = gen_rtx (REG, HImode, HARD_Z_REGNUM);
z_reg = gen_rtx_REG (HImode, HARD_Z_REGNUM);
first = get_insns ();
/* Some RTX are shared at this point. This breaks the Z register

4
gcc/config/m68hc11/m68hc11.h
View File

@ -1122,13 +1122,13 @@ typedef struct m68hc11_args
The high part is passed in X and the low part in D.
For GCC, the register number must be HARD_X_REGNUM. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), \
gen_rtx_REG (TYPE_MODE (VALTYPE), \
((TYPE_MODE (VALTYPE) == BLKmode \
|| GET_MODE_SIZE (TYPE_MODE (VALTYPE)) <= 2) \
? HARD_D_REGNUM : HARD_X_REGNUM))
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, MODE, \
gen_rtx_REG (MODE, \
(((MODE) == BLKmode || GET_MODE_SIZE (MODE) <= 2) \
? HARD_D_REGNUM : HARD_X_REGNUM))

326
gcc/config/m68hc11/m68hc11.md
View File

@ -215,7 +215,7 @@
(set (cc0) (reg:QI D_REGNUM))
(parallel [(set (reg:HI D_REGNUM) (match_dup 1))
(set (match_dup 1) (reg:HI D_REGNUM))])]
"operands[1] = gen_rtx (REG, HImode, REGNO (operands[0]));")
"operands[1] = gen_rtx_REG (HImode, REGNO (operands[0]));")
(define_insn "tstqi_1"
[(set (cc0)
@ -265,7 +265,7 @@
(set (match_dup 1) (match_dup 2))
(set (cc0) (match_dup 0))
(set (match_dup 1) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
"operands[2] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
"operands[2] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
;;--------------------------------------------------------------------
@ -304,7 +304,7 @@
[(set (match_dup 2) (match_dup 1))
(set (cc0)
(compare (match_dup 0) (match_dup 2)))]
"operands[2] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);")
"operands[2] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);")
(define_expand "cmphi"
[(set (cc0)
@ -381,7 +381,7 @@
(set (match_dup 2) (match_dup 3))
(set (cc0) (compare (match_dup 0) (match_dup 1)))
(set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
"operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
"operands[3] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
;;
;; 8-bit comparison with address register.
@ -400,7 +400,7 @@
(compare (reg:QI D_REGNUM) (match_dup 1)))
(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
(set (match_dup 3) (reg:HI D_REGNUM))])]
"operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));")
"operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));")
(define_split
[(set (cc0)
@ -410,9 +410,9 @@
[(set (match_dup 3) (match_dup 4))
(set (cc0)
(compare (match_dup 0) (match_dup 2)))]
"operands[2] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
operands[3] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[4] = gen_rtx (REG, HImode, REGNO (operands[1]));")
"operands[2] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
operands[3] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[4] = gen_rtx_REG (HImode, REGNO (operands[1]));")
(define_expand "cmpqi"
[(set (cc0)
@ -448,9 +448,9 @@
"z_replacement_completed == 2"
[(set (match_dup 3) (match_dup 2))
(set (cc0) (and:QI (match_dup 0) (match_dup 4)))]
"operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));
operands[3] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[4] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);")
"operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));
operands[3] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[4] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);")
(define_insn "bitcmpqi_z_used"
[(set (cc0)
@ -472,7 +472,7 @@
(set (match_dup 2) (match_dup 3))
(set (cc0) (and:QI (match_dup 0) (match_dup 1)))
(set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
"operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
"operands[3] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
(define_insn "bitcmphi"
[(set (cc0)
@ -562,7 +562,7 @@
(set (match_dup 2) (match_dup 3))
(set (cc0) (compare (match_dup 0) (match_dup 1)))
(set (match_dup 2) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))]
"operands[3] = gen_rtx (REG, HImode, SOFT_Z_REGNUM);")
"operands[3] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);")
;;--------------------------------------------------------------------
;;- Move strict_low_part
@ -870,7 +870,7 @@
{
rtx insn;
insn = emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1]));
insn = emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC,
stack_pointer_rtx,
REG_NOTES (insn));
@ -944,7 +944,7 @@
(set (reg:QI D_REGNUM) (match_dup 1))
(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
(set (match_dup 2) (reg:HI D_REGNUM))])]
"operands[2] = gen_rtx (REG, HImode, REGNO (operands[0]));")
"operands[2] = gen_rtx_REG (HImode, REGNO (operands[0]));")
;;
;; 8-bit operations on address registers.
@ -960,7 +960,7 @@
(set (match_dup 0) (reg:QI D_REGNUM))
(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
(set (match_dup 2) (reg:HI D_REGNUM))])]
"operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));")
"operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));")
(define_insn "*movqi2_push"
[(set (match_operand:QI 0 "push_operand" "=<,<")
@ -1010,7 +1010,7 @@
{
rtx insn;
insn = emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1]));
insn = emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
REG_NOTES (insn) = alloc_EXPR_LIST (REG_INC,
stack_pointer_rtx,
REG_NOTES (insn));
@ -1112,7 +1112,7 @@
/* Source operand must be in a hard register. */
if (!H_REG_P (src))
{
src = gen_rtx (REG, QImode, REGNO (operands[2]));
src = gen_rtx_REG (QImode, REGNO (operands[2]));
emit_move_insn (src, operands[1]);
}
@ -1129,8 +1129,8 @@
else
{
emit_move_insn (push, operands[2]);
emit_insn (gen_addhi3 (gen_rtx (REG, HImode, HARD_SP_REGNUM),
gen_rtx (REG, HImode, HARD_SP_REGNUM),
emit_insn (gen_addhi3 (gen_rtx_REG (HImode, HARD_SP_REGNUM),
gen_rtx_REG (HImode, HARD_SP_REGNUM),
const1_rtx));
}
}
@ -1138,15 +1138,15 @@
{
/* Source is in X or Y. It's better to push the 16-bit register
and then to some stack adjustment. */
src = gen_rtx (REG, HImode, REGNO (src));
src = gen_rtx_REG (HImode, REGNO (src));
emit_move_insn (push, src);
emit_move_insn (operands[2], const0_rtx);
emit_insn (gen_addhi3 (gen_rtx (REG, HImode, HARD_SP_REGNUM),
gen_rtx (REG, HImode, HARD_SP_REGNUM),
emit_insn (gen_addhi3 (gen_rtx_REG (HImode, HARD_SP_REGNUM),
gen_rtx_REG (HImode, HARD_SP_REGNUM),
const1_rtx));
emit_move_insn (push, operands[2]);
emit_insn (gen_addhi3 (gen_rtx (REG, HImode, HARD_SP_REGNUM),
gen_rtx (REG, HImode, HARD_SP_REGNUM),
emit_insn (gen_addhi3 (gen_rtx_REG (HImode, HARD_SP_REGNUM),
gen_rtx_REG (HImode, HARD_SP_REGNUM),
const1_rtx));
}
emit_move_insn (push, operands[2]);
@ -1170,13 +1170,13 @@
/* Source operand must be in a hard register. */
if (!H_REG_P (src))
{
src = gen_rtx (REG, QImode, REGNO (operands[2]));
src = gen_rtx_REG (QImode, REGNO (operands[2]));
emit_move_insn (src, operands[1]);
}
emit_move_insn (m68hc11_gen_lowpart (QImode, low2), src);
emit_move_insn (operands[2], const0_rtx);
src = gen_rtx (REG, QImode, REGNO (operands[2]));
src = gen_rtx_REG (QImode, REGNO (operands[2]));
emit_move_insn (m68hc11_gen_highpart (QImode, low2), src);
emit_move_insn (m68hc11_gen_highpart (HImode, low), operands[2]);
@ -1315,35 +1315,35 @@
"
if (X_REG_P (operands[1]))
{
emit_insn (gen_swap_areg (gen_rtx (REG, HImode, HARD_D_REGNUM),
gen_rtx (REG, HImode, HARD_X_REGNUM)));
emit_insn (gen_zero_extendqihi2 (gen_rtx (REG, HImode, HARD_D_REGNUM),
gen_rtx (REG, QImode, HARD_D_REGNUM)));
emit_move_insn (gen_rtx (REG, HImode, HARD_X_REGNUM),
emit_insn (gen_swap_areg (gen_rtx_REG (HImode, HARD_D_REGNUM),
gen_rtx_REG (HImode, HARD_X_REGNUM)));
emit_insn (gen_zero_extendqihi2 (gen_rtx_REG (HImode, HARD_D_REGNUM),
gen_rtx_REG (QImode, HARD_D_REGNUM)));
emit_move_insn (gen_rtx_REG (HImode, HARD_X_REGNUM),
const0_rtx);
DONE;
}
if (reg_mentioned_p (gen_rtx (REG, HImode, HARD_X_REGNUM), operands[1]))
if (reg_mentioned_p (gen_rtx_REG (HImode, HARD_X_REGNUM), operands[1]))
{
emit_insn (gen_zero_extendqihi2 (m68hc11_gen_lowpart (HImode,
operands[0]),
operands[1]));
emit_move_insn (gen_rtx (REG, HImode, HARD_X_REGNUM), const0_rtx);
emit_move_insn (gen_rtx_REG (HImode, HARD_X_REGNUM), const0_rtx);
DONE;
}
operands[4] = m68hc11_gen_highpart (HImode, operands[0]);
operands[5] = m68hc11_gen_lowpart (HImode, operands[0]);
if (A_REG_P (operands[1]))
{
operands[2] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[3] = gen_rtx (REG, HImode, REGNO (operands[1]));
operands[6] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
operands[2] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[3] = gen_rtx_REG (HImode, REGNO (operands[1]));
operands[6] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
}
else
{
operands[5] = operands[2] =
operands[3] = gen_rtx (REG, HImode, HARD_D_REGNUM);
operands[3] = gen_rtx_REG (HImode, HARD_D_REGNUM);
operands[6] = operands[1];
}
")
@ -1429,7 +1429,7 @@
{
if (!D_REG_P (operands[1]))
{
ops[0] = gen_rtx (REG, QImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movqi (insn, ops);
}
@ -1535,7 +1535,7 @@
{
if (!D_REG_P (operands[1]))
{
ops[0] = gen_rtx (REG, QImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movqi (insn, ops);
}
@ -1616,7 +1616,7 @@
x_reg_used = reg_mentioned_p (ix_reg, operands[1]);
if (x_reg_used)
{
ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
@ -1629,7 +1629,7 @@
Don't use it; keep it for documentation. */
if (!D_REG_P (operands[1]) && !x_reg_used)
{
ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
@ -1646,7 +1646,7 @@
}
else
{
ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
@ -1793,7 +1793,7 @@
}
else if (!D_REG_P (operands[1]))
{
ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movhi (insn, ops);
}
@ -1847,8 +1847,8 @@
{
if (H_REG_P (operands[1]))
{
ops[0] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
ops[1] = gen_rtx (REG, HImode, REGNO (operands[1]));
ops[0] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
ops[1] = gen_rtx_REG (HImode, REGNO (operands[1]));
m68hc11_gen_movhi (insn, ops);
}
else
@ -1865,7 +1865,7 @@
}
else if (!D_REG_P (operands[1]))
{
ops[0] = gen_rtx (REG, QImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_D_REGNUM);
ops[1] = operands[1];
m68hc11_gen_movqi (insn, ops);
}
@ -2015,7 +2015,7 @@
"operands[4] = m68hc11_gen_highpart (HImode, operands[2]);
if (X_REG_P (operands[0]))
{
operands[5] = operands[6] = gen_rtx (REG, HImode, HARD_D_REGNUM);
operands[5] = operands[6] = gen_rtx_REG (HImode, HARD_D_REGNUM);
}
else
{
@ -2078,13 +2078,13 @@
{
if (TARGET_M6811 && SP_REG_P (operands[0]))
{
emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2,
gen_rtx (SET, VOIDmode,
emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
gen_rtx_SET (VOIDmode,
operand0,
gen_rtx (PLUS, HImode,
gen_rtx_PLUS (HImode,
operand1, operand2)),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, HImode)))));
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (HImode)))));
DONE;
}
}")
@ -2214,8 +2214,8 @@
HOST_WIDE_INT val;
if (optimize && Y_REG_P (operands[3])
&& dead_register_here (insn, gen_rtx (REG, HImode, HARD_X_REGNUM)))
operands[3] = gen_rtx (REG, HImode, HARD_X_REGNUM);
&& dead_register_here (insn, gen_rtx_REG (HImode, HARD_X_REGNUM)))
operands[3] = gen_rtx_REG (HImode, HARD_X_REGNUM);
if (GET_CODE (operands[2]) == CONST_INT
&& (val = INTVAL (operands[2])) != 0
@ -2260,7 +2260,7 @@
output_asm_insn (\"ts%3\", operands);
if (GET_CODE (operands[2]) == CONST_INT
&& ((val = INTVAL (operands[2])) >= 0 && val < 0x100)
&& dead_register_here (insn, gen_rtx (REG, HImode, HARD_D_REGNUM)))
&& dead_register_here (insn, gen_rtx_REG (HImode, HARD_D_REGNUM)))
{
output_asm_insn (\"ldab\\t%2\", operands);
output_asm_insn (\"ab%3\", operands);
@ -2520,20 +2520,20 @@
if (A_REG_P (operands[2]))
{
if (TARGET_M6812)
ops[0] = gen_rtx (MEM, HImode,
gen_rtx (PRE_DEC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
ops[0] = gen_rtx_MEM (HImode,
gen_rtx_PRE_DEC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
ops[0] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
ops[0] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movhi (insn, ops);
if (TARGET_M6812)
operands[2] = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
operands[2] = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
else
operands[2] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[2] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
}
ops[0] = gen_label_rtx ();
output_asm_insn (\"subd\\t%2\", operands);
@ -2556,10 +2556,10 @@
if (A_REG_P (operands[2]))
{
ops[0] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
ops[0] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movhi (insn, ops);
operands[2] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
operands[2] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
}
ops[0] = gen_label_rtx ();
output_asm_insn (\"subb\\t%b2\", operands);
@ -2733,7 +2733,7 @@
{
rtx ops[2];
ops[0] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
ops[0] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
return \"subb\\t%T0\\n\\tsbca\\t#0\";
@ -2880,7 +2880,7 @@
operands[1] = temp;
}
ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
@ -2940,13 +2940,13 @@
(parallel [(set (reg:HI D_REGNUM) (match_dup 3))
(set (match_dup 3) (reg:HI D_REGNUM))])]
"
operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));
operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));
if (A_REG_P (operands[1]))
operands[5] = gen_rtx (REG, QImode, HARD_D_REGNUM);
operands[5] = gen_rtx_REG (QImode, HARD_D_REGNUM);
else
operands[5] = operands[1];
if (A_REG_P (operands[2]))
operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
operands[6] = gen_rtx_REG (QImode, HARD_D_REGNUM);
else
operands[6] = operands[2];
")
@ -2977,7 +2977,7 @@
{
rtx ops[2];
ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
}
@ -3675,9 +3675,9 @@
{
operands[5] = operands[1];
/* Make all the (set (REG:x) (REG:y)) a nop set. */
operands[4] = gen_rtx (REG, QImode, HARD_A_REGNUM);
operands[7] = gen_rtx (REG, QImode, HARD_D_REGNUM);
operands[6] = gen_rtx (REG, HImode, HARD_X_REGNUM);
operands[4] = gen_rtx_REG (QImode, HARD_A_REGNUM);
operands[7] = gen_rtx_REG (QImode, HARD_D_REGNUM);
operands[6] = gen_rtx_REG (HImode, HARD_X_REGNUM);
}
else
{
@ -3710,8 +3710,8 @@
{
operands[5] = operands[1];
/* Make all the (set (REG:x) (REG:y)) a nop set. */
operands[4] = gen_rtx (REG, HImode, HARD_D_REGNUM);
operands[6] = gen_rtx (REG, HImode, HARD_X_REGNUM);
operands[4] = gen_rtx_REG (HImode, HARD_D_REGNUM);
operands[6] = gen_rtx_REG (HImode, HARD_X_REGNUM);
}
else
{
@ -3760,16 +3760,16 @@
PUT_MODE (operands[3], QImode);
if (D_REG_P (operands[2]))
{
operands[4] = gen_rtx (REG, QImode, HARD_A_REGNUM);
operands[4] = gen_rtx_REG (QImode, HARD_A_REGNUM);
operands[5] = operands[1];
operands[6] = gen_rtx (REG, QImode, HARD_B_REGNUM);
operands[6] = gen_rtx_REG (QImode, HARD_B_REGNUM);
}
else
{
operands[4] = m68hc11_gen_highpart (QImode, operands[2]);
operands[5] = m68hc11_gen_lowpart (QImode, operands[2]);
if (D_REG_P (operands[1]))
operands[6] = gen_rtx (REG, QImode, HARD_B_REGNUM);
operands[6] = gen_rtx_REG (QImode, HARD_B_REGNUM);
else
operands[6] = operands[1];
}
@ -3802,7 +3802,7 @@
operands[5] = operands[1];
if (D_REG_P (operands[2]))
{
operands[4] = gen_rtx (REG, QImode, HARD_B_REGNUM);
operands[4] = gen_rtx_REG (QImode, HARD_B_REGNUM);
}
else
{
@ -3835,8 +3835,8 @@
"operands[5] = m68hc11_gen_highpart (HImode, operands[1]);
if (X_REG_P (operands[2]))
{
operands[4] = gen_rtx (REG, HImode, HARD_D_REGNUM);
operands[6] = gen_rtx (REG, HImode, HARD_X_REGNUM);
operands[4] = gen_rtx_REG (HImode, HARD_D_REGNUM);
operands[6] = gen_rtx_REG (HImode, HARD_X_REGNUM);
}
else
{
@ -3878,7 +3878,7 @@
if (GET_CODE (operands[3]) == AND)
operands[5] = const0_rtx;
else
operands[5] = gen_rtx (REG, HImode, HARD_D_REGNUM);
operands[5] = gen_rtx_REG (HImode, HARD_D_REGNUM);
")
@ -3977,12 +3977,12 @@
|| (m68hc11_small_indexed_indirect_p (operands[2], HImode)
&& reg_mentioned_p (operands[0], operands[2]))))
{
operands[4] = gen_rtx (MEM, HImode,
gen_rtx (PRE_DEC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
operands[6] = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
operands[4] = gen_rtx_MEM (HImode,
gen_rtx_PRE_DEC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
operands[6] = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
operands[5] = operands[2];
operands[8] = operands[7] = operands[0];
}
@ -3994,20 +3994,20 @@
if (GET_CODE (operands[3]) == MINUS
&& reg_mentioned_p (operands[0], operands[2]))
{
operands[9] = gen_rtx (MEM, HImode,
gen_rtx (PRE_DEC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
operands[1] = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
operands[8] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[9] = gen_rtx_MEM (HImode,
gen_rtx_PRE_DEC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
operands[1] = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
operands[8] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[4] = operands[7] = operands[0];
operands[6] = operands[8];
operands[5] = operands[2];
}
else
{
operands[4] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[4] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[6] = operands[4];
if (!H_REG_P (operands[2]))
{
@ -4075,7 +4075,7 @@
&& z_replacement_completed == 2 && !SP_REG_P (operands[2])"
[(set (match_dup 4) (match_dup 2))
(set (match_dup 0) (match_op_dup 3 [(match_dup 0) (match_dup 4)]))]
"operands[4] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);")
"operands[4] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);")
;;
;; For 68HC12, push the operand[2] value on the stack and do the
@ -4090,12 +4090,12 @@
&& z_replacement_completed == 2 && !SP_REG_P (operands[2])"
[(set (match_dup 4) (match_dup 2))
(set (match_dup 0) (match_op_dup 3 [(match_dup 0) (match_dup 5)]))]
"operands[4] = gen_rtx (MEM, HImode,
gen_rtx (PRE_DEC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
operands[5] = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode,
gen_rtx (REG, HImode, HARD_SP_REGNUM)));
"operands[4] = gen_rtx_MEM (HImode,
gen_rtx_PRE_DEC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
operands[5] = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));
")
;;--------------------------------------------------------------------
@ -4134,12 +4134,12 @@
|| reg_mentioned_p (operands[0], operands[1]))
{
/* Move to the destination register, before the xgdx. */
operands[4] = gen_rtx (REG, GET_MODE (operands[1]),
operands[4] = gen_rtx_REG (GET_MODE (operands[1]),
REGNO (operands[0]));
operands[5] = operands[1];
/* Apply the operation on D. */
operands[3] = gen_rtx (REG, GET_MODE (operands[1]), HARD_D_REGNUM);
operands[3] = gen_rtx_REG (GET_MODE (operands[1]), HARD_D_REGNUM);
}
else
{
@ -4175,7 +4175,7 @@
(set (reg:QI D_REGNUM) (match_op_dup 3 [(reg:QI D_REGNUM) (match_dup 7)]))
(parallel [(set (reg:HI D_REGNUM) (match_dup 4))
(set (match_dup 4) (reg:HI D_REGNUM))])]
"operands[4] = gen_rtx (REG, HImode, REGNO (operands[0]));
"operands[4] = gen_rtx_REG (HImode, REGNO (operands[0]));
/* For the second operand is a hard register or if the address
register appears in the source, we have to save the operand[2]
@ -4184,19 +4184,19 @@
will result in a nop. */
if (H_REG_P (operands[2]))
{
operands[5] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[6] = gen_rtx (REG, HImode, REGNO (operands[2]));
operands[7] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
operands[5] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[6] = gen_rtx_REG (HImode, REGNO (operands[2]));
operands[7] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
}
else if (reg_mentioned_p (operands[0], operands[2]))
{
operands[5] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
operands[5] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
operands[6] = operands[2];
operands[7] = operands[5];
}
else
{
operands[5] = operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
operands[5] = operands[6] = gen_rtx_REG (QImode, HARD_D_REGNUM);
operands[7] = operands[2];
}
")
@ -4221,9 +4221,9 @@
"reload_completed"
[(set (match_dup 5) (match_dup 6))
(set (match_dup 0) (match_op_dup 3 [(match_dup 0) (match_dup 4)]))]
"operands[4] = gen_rtx (REG, QImode, SOFT_TMP_REGNUM);
operands[5] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
operands[6] = gen_rtx (REG, HImode, REGNO (operands[2]));")
"operands[4] = gen_rtx_REG (QImode, SOFT_TMP_REGNUM);
operands[5] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM);
operands[6] = gen_rtx_REG (HImode, REGNO (operands[2]));")
;;--------------------------------------------------------------------
;; 8-bit Unary operations on X and Y:
@ -4256,7 +4256,7 @@
(set (match_dup 3) (reg:HI D_REGNUM))])]
"
{
operands[3] = gen_rtx (REG, HImode, REGNO (operands[0]));
operands[3] = gen_rtx_REG (HImode, REGNO (operands[0]));
if ((H_REG_P (operands[1])
&& !rtx_equal_p (operands[0], operands[1]))
|| reg_mentioned_p (operands[0], operands[1]))
@ -4266,7 +4266,7 @@
operands[5] = operands[1];
/* Apply the operation on D. */
operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
operands[6] = gen_rtx_REG (QImode, HARD_D_REGNUM);
}
else
{
@ -4660,7 +4660,7 @@
rtx ops[2];
ops[1] = m68hc11_gen_lowpart (HImode, operands[1]);
ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"lsld\", ops);
if (!X_REG_P (operands[0]))
@ -4676,7 +4676,7 @@
{
/* Load the high part in X in case the source operand
uses X as a memory pointer. */
ops[0] = gen_rtx (REG, HImode, HARD_X_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_X_REGNUM);
ops[1] = m68hc11_gen_highpart (HImode, operands[1]);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"xgdx\", ops);
@ -4756,12 +4756,12 @@
{
rtx scratch = gen_reg_rtx (HImode);
emit_move_insn (scratch, operands[2]);
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2, gen_rtx (SET, VOIDmode,
emit_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ASHIFT (HImode,
operand1, scratch)),
gen_rtx (CLOBBER, VOIDmode, scratch))));
gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
@ -4949,7 +4949,7 @@
if (!D_REG_P (operands[0]) && !Q_REG_P (operands[0]))
return \"#\";
ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
@ -4969,12 +4969,12 @@
rtx scratch = gen_reg_rtx (HImode);
emit_move_insn (scratch, operands[2]);
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2, gen_rtx (SET, VOIDmode,
emit_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ASHIFTRT (HImode,
operand1, scratch)),
gen_rtx (CLOBBER, VOIDmode, scratch))));
gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
@ -5213,7 +5213,7 @@
if (!D_REG_P (operands[0]) && !Q_REG_P (operands[0]))
return \"#\";
ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
@ -5424,7 +5424,7 @@
rtx ops[2];
ops[1] = m68hc11_gen_highpart (HImode, operands[1]);
ops[0] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"lsrd\", ops);
if (!X_REG_P (operands[0]))
@ -5439,7 +5439,7 @@
else
{
/* Load the lowpart in X in case the operands is some N,x. */
ops[0] = gen_rtx (REG, HImode, HARD_X_REGNUM);
ops[0] = gen_rtx_REG (HImode, HARD_X_REGNUM);
ops[1] = m68hc11_gen_lowpart (HImode, operands[1]);
m68hc11_gen_movhi (insn, ops);
output_asm_insn (\"xgdx\", ops);
@ -5516,12 +5516,12 @@
operand1 = force_reg (HImode, operand1);
emit_move_insn (scratch, operands[2]);
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2, gen_rtx (SET, VOIDmode,
emit_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_LSHIFTRT (HImode,
operand1, scratch)),
gen_rtx (CLOBBER, VOIDmode, scratch))));
gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
@ -5738,7 +5738,7 @@
return \"#\";
CC_STATUS_INIT;
ops[0] = gen_rtx (REG, QImode, HARD_A_REGNUM);
ops[0] = gen_rtx_REG (QImode, HARD_A_REGNUM);
ops[1] = operands[2];
m68hc11_gen_movqi (insn, ops);
@ -5835,12 +5835,12 @@
operand1 = force_reg (HImode, operand1);
emit_move_insn (scratch, operands[2]);
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2, gen_rtx (SET, VOIDmode,
emit_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ROTATE (HImode,
operand1, scratch)),
gen_rtx (CLOBBER, VOIDmode, scratch))));
gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
@ -5883,12 +5883,12 @@
operand1 = force_reg (HImode, operand1);
emit_move_insn (scratch, operands[2]);
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2, gen_rtx (SET, VOIDmode,
emit_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_ROTATERT (HImode,
operand1, scratch)),
gen_rtx (CLOBBER, VOIDmode, scratch))));
gen_rtx_CLOBBER (VOIDmode, scratch))));
DONE;
}
}")
@ -5979,14 +5979,14 @@
if (GET_MODE (operands[0]) == HImode)
{
emit_jump_insn (gen_m68hc12_dbcc_dec_hi (operands[0],
gen_rtx (NE, HImode),
gen_rtx_NE (HImode),
operands[4]));
DONE;
}
if (GET_MODE (operands[0]) == QImode)
{
emit_jump_insn (gen_m68hc12_dbcc_dec_qi (operands[0],
gen_rtx (NE, QImode),
gen_rtx_NE (QImode),
operands[4]));
DONE;
}
@ -6746,7 +6746,7 @@
if (ret_size && ret_size <= 2)
{
emit_jump_insn (gen_rtx (PARALLEL, VOIDmode,
emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_RETURN (VOIDmode),
gen_rtx_USE (VOIDmode,
gen_rtx_REG (HImode, 1)))));
@ -6754,7 +6754,7 @@
}
if (ret_size)
{
emit_jump_insn (gen_rtx (PARALLEL, VOIDmode,
emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, gen_rtx_RETURN (VOIDmode),
gen_rtx_USE (VOIDmode,
gen_rtx_REG (SImode, 0)))));
@ -6936,8 +6936,8 @@
(match_scratch:HI 0 "xy")]
"0 && TARGET_M6812 && optimize_size"
[(set (match_dup 0) (match_dup 1))]
"operands[1] = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode,
"operands[1] = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode,
gen_rtx_REG (HImode, HARD_SP_REGNUM)));")
;;
@ -7019,11 +7019,11 @@
&& reg_mentioned_p (operands[0], operands[2])"
[(set (cc0) (match_dup 3))]
"if (INTVAL (operands[1]) == 1)
operands[3] = gen_rtx (MEM, QImode,
gen_rtx (PRE_INC, HImode, operands[0]));
operands[3] = gen_rtx_MEM (QImode,
gen_rtx_PRE_INC (HImode, operands[0]));
else
operands[3] = gen_rtx (MEM, QImode,
gen_rtx (PRE_DEC, HImode, operands[0]));
operands[3] = gen_rtx_MEM (QImode,
gen_rtx_PRE_DEC (HImode, operands[0]));
")
;;
@ -7041,11 +7041,11 @@
&& reg_mentioned_p (operands[0], operands[3])"
[(set (cc0) (compare (match_dup 2) (match_dup 4)))]
"if (INTVAL (operands[1]) == 1)
operands[4] = gen_rtx (MEM, QImode,
gen_rtx (PRE_INC, HImode, operands[0]));
operands[4] = gen_rtx_MEM (QImode,
gen_rtx_PRE_INC (HImode, operands[0]));
else
operands[4] = gen_rtx (MEM, QImode,
gen_rtx (PRE_DEC, HImode, operands[0]));
operands[4] = gen_rtx_MEM (QImode,
gen_rtx_PRE_DEC (HImode, operands[0]));
")
(define_peephole2
@ -7060,11 +7060,11 @@
&& reg_mentioned_p (operands[0], operands[2])"
[(set (cc0) (compare (match_dup 4) (match_dup 3)))]
"if (INTVAL (operands[1]) == 1)
operands[4] = gen_rtx (MEM, QImode,
gen_rtx (PRE_INC, HImode, operands[0]));
operands[4] = gen_rtx_MEM (QImode,
gen_rtx_PRE_INC (HImode, operands[0]));
else
operands[4] = gen_rtx (MEM, QImode,
gen_rtx (PRE_DEC, HImode, operands[0]));
operands[4] = gen_rtx_MEM (QImode,
gen_rtx_PRE_DEC (HImode, operands[0]));
")
;;
@ -7271,7 +7271,7 @@
rtx ops[2];
ops[0] = operands[0];
ops[1] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[1] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
return \"\";
}
@ -7324,7 +7324,7 @@
rtx ops[2];
ops[0] = operands[0];
ops[1] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[1] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
return \"\";
}
@ -7344,7 +7344,7 @@
rtx ops[2];
ops[0] = operands[0];
ops[1] = gen_rtx (REG, HImode, HARD_D_REGNUM);
ops[1] = gen_rtx_REG (HImode, HARD_D_REGNUM);
m68hc11_gen_movhi (insn, ops);
return \"\";
}
@ -7381,8 +7381,8 @@
rtx ops[2];
ops[0] = operands[2];
ops[1] = gen_rtx (MEM, HImode,
gen_rtx (POST_INC, HImode, stack_pointer_rtx));
ops[1] = gen_rtx_MEM (HImode,
gen_rtx_POST_INC (HImode, stack_pointer_rtx));
m68hc11_gen_movhi (insn, ops);
return \"\";
}

4
gcc/config/m68k/m68k.md
View File

@ -738,7 +738,7 @@
operands[0] = force_reg (SImode, XEXP (operands[0], 0));
else if (GET_CODE (operands[0]) == MEM
&& symbolic_operand (XEXP (operands[0], 0), SImode))
operands[0] = gen_rtx (MEM, SImode,
operands[0] = gen_rtx_MEM (SImode,
force_reg (SImode, XEXP (operands[0], 0)));
}
}")
@ -997,7 +997,7 @@
m68k doesn't consider PC-relative addresses to be writable. */
if (GET_CODE (operands[0]) == MEM
&& symbolic_operand (XEXP (operands[0], 0), SImode))
operands[0] = gen_rtx (MEM, XFmode,
operands[0] = gen_rtx_MEM (XFmode,
force_reg (SImode, XEXP (operands[0], 0)));
}
}

84
gcc/config/mcore/mcore.c
View File

@ -207,14 +207,14 @@ output_stack_adjust (int direction, int size)
/* If extending stack a lot, we do it incrementally. */
if (direction < 0 && size > mcore_stack_increment && mcore_stack_increment > 0)
{
rtx tmp = gen_rtx (REG, SImode, 1);
rtx tmp = gen_rtx_REG (SImode, 1);
rtx memref;
emit_insn (gen_movsi (tmp, GEN_INT (mcore_stack_increment)));
do
{
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
memref = gen_rtx (MEM, SImode, stack_pointer_rtx);
memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
MEM_VOLATILE_P (memref) = 1;
emit_insn (gen_movsi (memref, stack_pointer_rtx));
size -= mcore_stack_increment;
@ -232,7 +232,7 @@ output_stack_adjust (int direction, int size)
if (size > 32)
{
rtx nval = gen_rtx (REG, SImode, 1);
rtx nval = gen_rtx_REG (SImode, 1);
emit_insn (gen_movsi (nval, val));
val = nval;
}
@ -550,7 +550,7 @@ mcore_gen_compare_reg (enum rtx_code code)
{
rtx op0 = arch_compare_op0;
rtx op1 = arch_compare_op1;
rtx cc_reg = gen_rtx (REG, CCmode, CC_REG);
rtx cc_reg = gen_rtx_REG (CCmode, CC_REG);
if (CONSTANT_P (op1) && GET_CODE (op1) != CONST_INT)
op1 = force_reg (SImode, op1);
@ -623,7 +623,7 @@ mcore_gen_compare_reg (enum rtx_code code)
break;
}
emit_insn (gen_rtx (SET, VOIDmode, cc_reg, gen_rtx (code, CCmode, op0, op1)));
emit_insn (gen_rtx_SET (VOIDmode, cc_reg, gen_rtx (code, CCmode, op0, op1)));
return cc_reg;
}
@ -1641,14 +1641,14 @@ mcore_expand_insv (rtx operands[])
if ((INTVAL(operands[3])&1) == 0)
{
mask = ~(1 << posn);
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (AND, SImode, operands[0], GEN_INT (mask))));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_AND (SImode, operands[0], GEN_INT (mask))));
}
else
{
mask = 1 << posn;
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (IOR, SImode, operands[0], GEN_INT (mask))));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_IOR (SImode, operands[0], GEN_INT (mask))));
}
return 1;
@ -1677,8 +1677,8 @@ mcore_expand_insv (rtx operands[])
INTVAL (operands[3]) == ((1 << width) - 1))
{
mreg = force_reg (SImode, GEN_INT (INTVAL (operands[3]) << posn));
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (IOR, SImode, operands[0], mreg)));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_IOR (SImode, operands[0], mreg)));
return 1;
}
@ -1686,8 +1686,8 @@ mcore_expand_insv (rtx operands[])
mreg = force_reg (SImode, GEN_INT (~(((1 << width) - 1) << posn)));
/* Clear the field, to overlay it later with the source. */
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (AND, SImode, operands[0], mreg)));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_AND (SImode, operands[0], mreg)));
/* If the source is constant 0, we've nothing to add back. */
if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) == 0)
@ -1706,17 +1706,17 @@ mcore_expand_insv (rtx operands[])
if (width + posn != (int) GET_MODE_SIZE (SImode))
{
ereg = force_reg (SImode, GEN_INT ((1 << width) - 1));
emit_insn (gen_rtx (SET, SImode, sreg,
gen_rtx (AND, SImode, sreg, ereg)));
emit_insn (gen_rtx_SET (SImode, sreg,
gen_rtx_AND (SImode, sreg, ereg)));
}
/* Insert source value in dest. */
if (posn != 0)
emit_insn (gen_rtx (SET, SImode, sreg,
gen_rtx (ASHIFT, SImode, sreg, GEN_INT (posn))));
emit_insn (gen_rtx_SET (SImode, sreg,
gen_rtx_ASHIFT (SImode, sreg, GEN_INT (posn))));
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (IOR, SImode, operands[0], sreg)));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_IOR (SImode, operands[0], sreg)));
return 1;
}
@ -1870,19 +1870,19 @@ block_move_sequence (rtx dest, rtx dst_mem, rtx src, rtx src_mem,
}
size -= amount[next];
srcp = gen_rtx (MEM,
srcp = gen_rtx_MEM (
#if 0
MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode,
#else
mode[next],
#endif
gen_rtx (PLUS, Pmode, src,
gen_rtx (CONST_INT, SImode, offset_ld)));
gen_rtx_PLUS (Pmode, src,
gen_rtx_CONST_INT (SImode, offset_ld)));
RTX_UNCHANGING_P (srcp) = RTX_UNCHANGING_P (src_mem);
MEM_VOLATILE_P (srcp) = MEM_VOLATILE_P (src_mem);
MEM_IN_STRUCT_P (srcp) = 1;
emit_insn (gen_rtx (SET, VOIDmode, temp[next], srcp));
emit_insn (gen_rtx_SET (VOIDmode, temp[next], srcp));
offset_ld += amount[next];
active[next] = TRUE;
}
@ -1891,19 +1891,19 @@ block_move_sequence (rtx dest, rtx dst_mem, rtx src, rtx src_mem,
{
active[phase] = FALSE;
dstp = gen_rtx (MEM,
dstp = gen_rtx_MEM (
#if 0
MEM_IN_STRUCT_P (dst_mem) ? mode[phase] : BLKmode,
#else
mode[phase],
#endif
gen_rtx (PLUS, Pmode, dest,
gen_rtx (CONST_INT, SImode, offset_st)));
gen_rtx_PLUS (Pmode, dest,
gen_rtx_CONST_INT (SImode, offset_st)));
RTX_UNCHANGING_P (dstp) = RTX_UNCHANGING_P (dst_mem);
MEM_VOLATILE_P (dstp) = MEM_VOLATILE_P (dst_mem);
MEM_IN_STRUCT_P (dstp) = 1;
emit_insn (gen_rtx (SET, VOIDmode, dstp, temp[phase]));
emit_insn (gen_rtx_SET (VOIDmode, dstp, temp[phase]));
offset_st += amount[phase];
}
}
@ -1940,7 +1940,7 @@ mcore_expand_block_move (rtx dst_mem, rtx src_mem, rtx * operands)
}
/* If we get here, just use the library routine. */
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, VOIDmode, 3,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3,
operands[0], Pmode, operands[1], Pmode, operands[2],
SImode);
}
@ -2303,9 +2303,9 @@ mcore_expand_prolog (void)
for (offset = fi.arg_offset; remaining >= 4; offset -= 4, rn--, remaining -= 4)
{
emit_insn (gen_movsi
(gen_rtx (MEM, SImode,
(gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, offset)),
gen_rtx (REG, SImode, rn)));
gen_rtx_REG (SImode, rn)));
}
}
@ -2328,8 +2328,8 @@ mcore_expand_prolog (void)
first_reg--;
first_reg++;
emit_insn (gen_store_multiple (gen_rtx (MEM, SImode, stack_pointer_rtx),
gen_rtx (REG, SImode, first_reg),
emit_insn (gen_store_multiple (gen_rtx_MEM (SImode, stack_pointer_rtx),
gen_rtx_REG (SImode, first_reg),
GEN_INT (16 - first_reg)));
i -= (15 - first_reg);
@ -2338,9 +2338,9 @@ mcore_expand_prolog (void)
else if (fi.reg_mask & (1 << i))
{
emit_insn (gen_movsi
(gen_rtx (MEM, SImode,
(gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, offs)),
gen_rtx (REG, SImode, i)));
gen_rtx_REG (SImode, i)));
offs += 4;
}
}
@ -2422,8 +2422,8 @@ mcore_expand_epilog (void)
first_reg++;
emit_insn (gen_load_multiple (gen_rtx (REG, SImode, first_reg),
gen_rtx (MEM, SImode, stack_pointer_rtx),
emit_insn (gen_load_multiple (gen_rtx_REG (SImode, first_reg),
gen_rtx_MEM (SImode, stack_pointer_rtx),
GEN_INT (16 - first_reg)));
i -= (15 - first_reg);
@ -2432,8 +2432,8 @@ mcore_expand_epilog (void)
else if (fi.reg_mask & (1 << i))
{
emit_insn (gen_movsi
(gen_rtx (REG, SImode, i),
gen_rtx (MEM, SImode,
(gen_rtx_REG (SImode, i),
gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, offs))));
offs += 4;
}
@ -3224,7 +3224,7 @@ mcore_mark_dllexport (tree decl)
idp = get_identifier (newname);
XEXP (DECL_RTL (decl), 0) =
gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
}
/* Mark a DECL as being dllimport'd. */
@ -3285,8 +3285,8 @@ mcore_mark_dllimport (tree decl)
/* ??? At least I think that's why we do this. */
idp = get_identifier (newname);
newrtl = gen_rtx (MEM, Pmode,
gen_rtx (SYMBOL_REF, Pmode,
newrtl = gen_rtx_MEM (Pmode,
gen_rtx_SYMBOL_REF (Pmode,
IDENTIFIER_POINTER (idp)));
XEXP (DECL_RTL (decl), 0) = newrtl;
}
@ -3337,7 +3337,7 @@ mcore_encode_section_info (tree decl, rtx rtl ATTRIBUTE_UNUSED, int first ATTRIB
{
const char * oldname = XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0);
tree idp = get_identifier (oldname + 9);
rtx newrtl = gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (idp));
rtx newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
XEXP (DECL_RTL (decl), 0) = newrtl;

6
gcc/config/mcore/mcore.h
View File

@ -656,7 +656,7 @@ extern const enum reg_class reg_class_from_letter[];
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, FIRST_RET_REG)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RET_REG)
/* 1 if N is a possible register number for a function value.
On the MCore, only r4 can return results. */
@ -775,9 +775,9 @@ extern const enum reg_class reg_class_from_letter[];
CXT is an RTX for the static chain value for the function. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
}

68
gcc/config/mcore/mcore.md
View File

@ -1413,13 +1413,13 @@
count = INTVAL (operands[2]);
regno = REGNO (operands[0]);
operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count));
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
for (i = 0; i < count; i++)
XVECEXP (operands[3], 0, i)
= gen_rtx (SET, VOIDmode,
gen_rtx (REG, SImode, regno + i),
gen_rtx (MEM, SImode, plus_constant (stack_pointer_rtx,
= gen_rtx_SET (VOIDmode,
gen_rtx_REG (SImode, regno + i),
gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx,
i * 4)));
}")
@ -1452,14 +1452,14 @@
count = INTVAL (operands[2]);
regno = REGNO (operands[1]);
operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count));
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
for (i = 0; i < count; i++)
XVECEXP (operands[3], 0, i)
= gen_rtx (SET, VOIDmode,
gen_rtx (MEM, SImode, plus_constant (stack_pointer_rtx,
= gen_rtx_SET (VOIDmode,
gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx,
i * 4)),
gen_rtx (REG, SImode, regno + i));
gen_rtx_REG (SImode, regno + i));
}")
(define_insn ""
@ -1729,7 +1729,7 @@
if (GET_CODE (operands[0]) == MEM
&& ! register_operand (XEXP (operands[0], 0), SImode)
&& ! mcore_symbolic_address_p (XEXP (operands[0], 0)))
operands[0] = gen_rtx (MEM, GET_MODE (operands[0]),
operands[0] = gen_rtx_MEM (GET_MODE (operands[0]),
force_reg (Pmode, XEXP (operands[0], 0)));
}")
@ -1751,7 +1751,7 @@
if (GET_CODE (operands[0]) == MEM
&& ! register_operand (XEXP (operands[0], 0), SImode)
&& ! mcore_symbolic_address_p (XEXP (operands[0], 0)))
operands[1] = gen_rtx (MEM, GET_MODE (operands[1]),
operands[1] = gen_rtx_MEM (GET_MODE (operands[1]),
force_reg (Pmode, XEXP (operands[1], 0)));
}")
@ -2627,11 +2627,11 @@
; rtx lshft = GEN_INT (32 - (INTVAL (operands[2]) + INTVAL (operands[3])));
; rtx rshft = GEN_INT (32 - INTVAL (operands[2]));
;
; emit_insn (gen_rtx (SET, SImode, operands[0], operands[1]));
; emit_insn (gen_rtx (SET, SImode, operands[0],
; gen_rtx (ASHIFT, SImode, operands[0], lshft)));
; emit_insn (gen_rtx (SET, SImode, operands[0],
; gen_rtx (ASHIFTRT, SImode, operands[0], rshft)));
; emit_insn (gen_rtx_SET (SImode, operands[0], operands[1]));
; emit_insn (gen_rtx_SET (SImode, operands[0],
; gen_rtx_ASHIFT (SImode, operands[0], lshft)));
; emit_insn (gen_rtx_SET (SImode, operands[0],
; gen_rtx_ASHIFTRT (SImode, operands[0], rshft)));
; DONE;
; }
; else
@ -2662,11 +2662,11 @@
rtx tmp1 = gen_reg_rtx (SImode);
rtx tmp2 = gen_reg_rtx (SImode);
emit_insn (gen_rtx (SET, SImode, tmp1, operands[1]));
emit_insn (gen_rtx (SET, SImode, tmp2,
gen_rtx (ASHIFT, SImode, tmp1, lshft)));
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (ASHIFTRT, SImode, tmp2, rshft)));
emit_insn (gen_rtx_SET (SImode, tmp1, operands[1]));
emit_insn (gen_rtx_SET (SImode, tmp2,
gen_rtx_ASHIFT (SImode, tmp1, lshft)));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_ASHIFTRT (SImode, tmp2, rshft)));
DONE;
}
else
@ -2707,11 +2707,11 @@
{
rtx rshft = GEN_INT (INTVAL (operands[3]));
shifted = gen_reg_rtx (SImode);
emit_insn (gen_rtx (SET, SImode, shifted,
gen_rtx (LSHIFTRT, SImode, operands[1], rshft)));
emit_insn (gen_rtx_SET (SImode, shifted,
gen_rtx_LSHIFTRT (SImode, operands[1], rshft)));
}
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (AND, SImode, shifted, mask)));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_AND (SImode, shifted, mask)));
DONE;
}
else if (TARGET_W_FIELD)
@ -2723,11 +2723,11 @@
rtx tmp1 = gen_reg_rtx (SImode);
rtx tmp2 = gen_reg_rtx (SImode);
emit_insn (gen_rtx (SET, SImode, tmp1, operands[1]));
emit_insn (gen_rtx (SET, SImode, tmp2,
gen_rtx (ASHIFT, SImode, tmp1, lshft)));
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (LSHIFTRT, SImode, tmp2, rshft)));
emit_insn (gen_rtx_SET (SImode, tmp1, operands[1]));
emit_insn (gen_rtx_SET (SImode, tmp2,
gen_rtx_ASHIFT (SImode, tmp1, lshft)));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_LSHIFTRT (SImode, tmp2, rshft)));
DONE;
}
else
@ -3072,10 +3072,10 @@
abort ();
if (ofs > 0)
operands[4] = gen_rtx (MEM, mode,
gen_rtx (PLUS, SImode, base_reg, GEN_INT(ofs)));
operands[4] = gen_rtx_MEM (mode,
gen_rtx_PLUS (SImode, base_reg, GEN_INT(ofs)));
else
operands[4] = gen_rtx (MEM, mode, base_reg);
operands[4] = gen_rtx_MEM (mode, base_reg);
if (mode == QImode)
return \"movi %0,0\\n\\tst.b %0,%4\";
@ -3284,7 +3284,7 @@
emit_insn (gen_movsi (tmp, GEN_INT (STACK_UNITS_MAXSTEP)));
do
{
rtx memref = gen_rtx (MEM, SImode, stack_pointer_rtx);
rtx memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
MEM_VOLATILE_P (memref) = 1;
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
@ -3322,7 +3322,7 @@
/* Extend a step, probe, and adjust remaining count. */
emit_insn(gen_subsi3(stack_pointer_rtx, stack_pointer_rtx, step));
memref = gen_rtx (MEM, SImode, stack_pointer_rtx);
memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
MEM_VOLATILE_P (memref) = 1;
emit_insn(gen_movsi(memref, stack_pointer_rtx));
emit_insn(gen_subsi3(tmp, tmp, step));

43
gcc/config/mips/mips.c
View File

@ -3008,7 +3008,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0,
{
if (! TARGET_MIPS16)
{
convert_move (result, gen_rtx (GTU, mode, reg, const0_rtx), 0);
convert_move (result, gen_rtx_GTU (mode, reg, const0_rtx), 0);
if (p_invert != NULL)
*p_invert = 0;
invert = 0;
@ -3016,7 +3016,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0,
else
{
reg2 = invert ? gen_reg_rtx (mode) : result;
convert_move (reg2, gen_rtx (LTU, mode, reg, const1_rtx), 0);
convert_move (reg2, gen_rtx_LTU (mode, reg, const1_rtx), 0);
reg = reg2;
}
}
@ -3044,7 +3044,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0,
reg = reg2;
one = force_reg (mode, const1_rtx);
}
convert_move (result, gen_rtx (XOR, mode, reg, one), 0);
convert_move (result, gen_rtx_XOR (mode, reg, one), 0);
}
return result;
@ -7050,10 +7050,10 @@ mips_expand_epilogue (int sibcall_p)
{
/* The mips16 loads the return address into $7, not $31. */
if (TARGET_MIPS16 && (cfun->machine->frame.mask & RA_MASK) != 0)
emit_jump_insn (gen_return_internal (gen_rtx (REG, Pmode,
emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode,
GP_REG_FIRST + 7)));
else
emit_jump_insn (gen_return_internal (gen_rtx (REG, Pmode,
emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode,
GP_REG_FIRST + 31)));
}
}
@ -8076,9 +8076,9 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
: ""),
fp_code);
id = get_identifier (buf);
stub_fn = gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (id));
stub_fn = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (id));
emit_move_insn (gen_rtx (REG, Pmode, 2), fn);
emit_move_insn (gen_rtx_REG (Pmode, 2), fn);
if (retval == NULL_RTX)
insn = gen_call_internal (stub_fn, arg_size);
@ -8090,9 +8090,9 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
if (GET_CODE (insn) != CALL_INSN)
abort ();
CALL_INSN_FUNCTION_USAGE (insn) =
gen_rtx (EXPR_LIST, VOIDmode,
gen_rtx (USE, VOIDmode, gen_rtx (REG, Pmode, 2)),
CALL_INSN_FUNCTION_USAGE (insn));
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, 2)),
CALL_INSN_FUNCTION_USAGE (insn));
/* If we are handling a floating point return value, we need to
save $18 in the function prologue. Putting a note on the
@ -8101,9 +8101,10 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
code. */
if (fpret)
CALL_INSN_FUNCTION_USAGE (insn) =
gen_rtx (EXPR_LIST, VOIDmode,
gen_rtx (USE, VOIDmode, gen_rtx (REG, word_mode, 18)),
CALL_INSN_FUNCTION_USAGE (insn));
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_USE (VOIDmode,
gen_rtx_REG (word_mode, 18)),
CALL_INSN_FUNCTION_USAGE (insn));
/* Return 1 to tell the caller that we've generated the call
insn. */
@ -8292,9 +8293,9 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
abort ();
CALL_INSN_FUNCTION_USAGE (insn) =
gen_rtx (EXPR_LIST, VOIDmode,
gen_rtx (USE, VOIDmode, gen_rtx (REG, word_mode, 18)),
CALL_INSN_FUNCTION_USAGE (insn));
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_USE (VOIDmode, gen_rtx_REG (word_mode, 18)),
CALL_INSN_FUNCTION_USAGE (insn));
/* Return 1 to tell the caller that we've generated the call
insn. */
@ -8556,12 +8557,12 @@ mips16_lay_out_constants (void)
particular string constant. */
lab = add_constant (&constants, val, mode);
newsrc = gen_rtx (MEM, mode,
gen_rtx (LABEL_REF, VOIDmode, lab));
newsrc = gen_rtx_MEM (mode,
gen_rtx_LABEL_REF (VOIDmode, lab));
RTX_UNCHANGING_P (newsrc) = 1;
PATTERN (insn) = gen_rtx (SET, VOIDmode,
SET_DEST (PATTERN (insn)),
newsrc);
PATTERN (insn) = gen_rtx_SET (VOIDmode,
SET_DEST (PATTERN (insn)),
newsrc);
INSN_CODE (insn) = -1;
if (first_constant_ref < 0)

4
gcc/config/ns32k/ns32k.h
View File

@ -569,7 +569,7 @@ enum reg_class
Before the prologue, RA is at 0(sp). */
#define INCOMING_RETURN_ADDR_RTX \
gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
/* A C expression whose value is RTL representing the value of the
return address for the frame COUNT steps up from the current frame,
@ -581,7 +581,7 @@ enum reg_class
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT> 0 && flag_omit_frame_pointer)? NULL_RTX \
: gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, (FRAME), GEN_INT(4))))
: gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
/* A C expression whose value is an integer giving the offset, in
bytes, from the value of the stack pointer register to the top of

46
gcc/config/ns32k/ns32k.md
View File

@ -1249,16 +1249,16 @@
last = emit_move_insn(temp, temp);
{
rtx divdi, moddi, divsi, modsi;
divsi = gen_rtx (UDIV, SImode, operands[1], operands[2]);
modsi = gen_rtx (UMOD, SImode, operands[1], operands[2]);
divdi = gen_rtx (ZERO_EXTEND, DImode, divsi);
moddi = gen_rtx (ZERO_EXTEND, DImode, modsi);
REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
divsi = gen_rtx_UDIV (SImode, operands[1], operands[2]);
modsi = gen_rtx_UMOD (SImode, operands[1], operands[2]);
divdi = gen_rtx_ZERO_EXTEND (DImode, divsi);
moddi = gen_rtx_ZERO_EXTEND (DImode, modsi);
REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
REG_NOTES (first));
REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first,
gen_rtx (EXPR_LIST, REG_EQUAL,
gen_rtx (IOR, DImode, moddi,
gen_rtx (ASHIFT, DImode, divdi, GEN_INT(32))),
REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
gen_rtx_EXPR_LIST (REG_EQUAL,
gen_rtx_IOR (DImode, moddi,
gen_rtx_ASHIFT (DImode, divdi, GEN_INT(32))),
REG_NOTES (last)));
}
@ -1314,14 +1314,14 @@
;; last = emit_move_insn(temp, temp);
;; {
;; rtx divdi, moddi, divhi, modhi;
;; divhi = gen_rtx (UDIV, HImode, operands[1], operands[2]);
;; modhi = gen_rtx (UMOD, HImode, operands[1], operands[2]);
;; divdi = gen_rtx (ZERO_EXTEND, DImode, divhi);
;; moddi = gen_rtx (ZERO_EXTEND, DImode, modhi);
;; REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
;; divhi = gen_rtx_UDIV (HImode, operands[1], operands[2]);
;; modhi = gen_rtx_UMOD (HImode, operands[1], operands[2]);
;; divdi = gen_rtx_ZERO_EXTEND (DImode, divhi);
;; moddi = gen_rtx_ZERO_EXTEND (DImode, modhi);
;; REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
;; REG_NOTES (first));
;; REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first,
;; gen_rtx (EXPR_LIST, REG_EQUAL,
;; REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
;; gen_rtx_EXPR_LIST (REG_EQUAL,
;; gen_rtx(IOR, DImode, moddi,
;; gen_rtx(ASHIFT, DImode, divdi, GEN_INT(32))),
;; REG_NOTES (last)));
@ -1371,14 +1371,14 @@
;; last = emit_move_insn(temp, temp);
;; {
;; rtx divdi, moddi, divqi, modqi;
;; divqi = gen_rtx (UDIV, QImode, operands[1], operands[2]);
;; modqi = gen_rtx (UMOD, QImode, operands[1], operands[2]);
;; divdi = gen_rtx (ZERO_EXTEND, DImode, divqi);
;; moddi = gen_rtx (ZERO_EXTEND, DImode, modqi);
;; REG_NOTES (first) = gen_rtx (INSN_LIST, REG_LIBCALL, last,
;; divqi = gen_rtx_UDIV (QImode, operands[1], operands[2]);
;; modqi = gen_rtx_UMOD (QImode, operands[1], operands[2]);
;; divdi = gen_rtx_ZERO_EXTEND (DImode, divqi);
;; moddi = gen_rtx_ZERO_EXTEND (DImode, modqi);
;; REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last,
;; REG_NOTES (first));
;; REG_NOTES (last) = gen_rtx (INSN_LIST, REG_RETVAL, first,
;; gen_rtx (EXPR_LIST, REG_EQUAL,
;; REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first,
;; gen_rtx_EXPR_LIST (REG_EQUAL,
;; gen_rtx(IOR, DImode, moddi,
;; gen_rtx(ASHIFT, DImode, divdi, GEN_INT(32))),
;; REG_NOTES (last)));

8
gcc/config/rs6000/rs6000.c
View File

@ -5563,7 +5563,7 @@ altivec_expand_predicate_builtin (enum insn_code icode, const char *opcode,
scratch = gen_reg_rtx (mode0);
pat = GEN_FCN (icode) (scratch, op0, op1,
gen_rtx (SYMBOL_REF, Pmode, opcode));
gen_rtx_SYMBOL_REF (Pmode, opcode));
if (! pat)
return 0;
emit_insn (pat);
@ -9606,8 +9606,8 @@ rs6000_generate_compare (enum rtx_code code)
However, we must be careful to emit correct RTL in
the meantime, so optimizations don't get confused. */
or1 = gen_rtx (NE, SImode, compare_result, const0_rtx);
or2 = gen_rtx (NE, SImode, compare_result2, const0_rtx);
or1 = gen_rtx_NE (SImode, compare_result, const0_rtx);
or2 = gen_rtx_NE (SImode, compare_result2, const0_rtx);
/* OR them together. */
cmp = gen_rtx_SET (VOIDmode, or_result,
@ -15112,7 +15112,7 @@ rs6000_machopic_legitimize_pic_address (rtx orig, enum machine_mode mode,
return machopic_legitimize_pic_address (mem, Pmode, reg);
}
}
return gen_rtx (PLUS, Pmode, base, offset);
return gen_rtx_PLUS (Pmode, base, offset);
}
/* Fall back on generic machopic code. */

4
gcc/config/s390/s390.c
View File

@ -6131,7 +6131,7 @@ s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
return 0;
else
return gen_rtx (REG, mode, cum->fprs + 16);
return gen_rtx_REG (mode, cum->fprs + 16);
}
else if (s390_function_arg_integer (mode, type))
{
@ -6141,7 +6141,7 @@ s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
if (cum->gprs + n_gprs > 5)
return 0;
else
return gen_rtx (REG, mode, cum->gprs + 2);
return gen_rtx_REG (mode, cum->gprs + 2);
}
/* After the real arguments, expand_call calls us once again

4
gcc/config/s390/s390.md
View File

@ -7249,8 +7249,8 @@
(reg 15))]
"TARGET_BACKCHAIN"
{
rtx stack = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
rtx chain = gen_rtx (MEM, Pmode, stack);
rtx stack = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
rtx chain = gen_rtx_MEM (Pmode, stack);
rtx temp = gen_reg_rtx (Pmode);
emit_move_insn (temp, chain);

6
gcc/config/sparc/sparc.c
View File

@ -6567,7 +6567,7 @@ epilogue_renumber (register rtx *where, int test)
if (REGNO (*where) >= 8 && REGNO (*where) < 24) /* oX or lX */
return 1;
if (! test && REGNO (*where) >= 24 && REGNO (*where) < 32)
*where = gen_rtx (REG, GET_MODE (*where), OUTGOING_REGNO (REGNO(*where)));
*where = gen_rtx_REG (GET_MODE (*where), OUTGOING_REGNO (REGNO(*where)));
case SCRATCH:
case CC0:
case PC:
@ -7354,7 +7354,7 @@ sparc_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
/* Call __enable_execute_stack after writing onto the stack to make sure
the stack address is accessible. */
#ifdef TRANSFER_FROM_TRAMPOLINE
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"),
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
LCT_NORMAL, VOIDmode, 1, tramp, Pmode);
#endif
@ -7395,7 +7395,7 @@ sparc64_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt)
/* Call __enable_execute_stack after writing onto the stack to make sure
the stack address is accessible. */
#ifdef TRANSFER_FROM_TRAMPOLINE
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"),
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
LCT_NORMAL, VOIDmode, 1, tramp, Pmode);
#endif
}

2
gcc/config/v850/v850.c
View File

@ -615,7 +615,7 @@ print_operand (FILE * file, rtx x, int code)
{
case MEM:
if (GET_CODE (XEXP (x, 0)) == CONST_INT)
output_address (gen_rtx_PLUS (SImode, gen_rtx (REG, SImode, 0),
output_address (gen_rtx_PLUS (SImode, gen_rtx_REG (SImode, 0),
XEXP (x, 0)));
else
output_address (XEXP (x, 0));

10
gcc/config/xtensa/xtensa.h
View File

@ -908,7 +908,7 @@ typedef struct xtensa_args {
rtx addr = ADDR; \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 12)), CHAIN); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 16)), FUNC); \
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__xtensa_sync_caches"), \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__xtensa_sync_caches"), \
0, VOIDmode, 1, addr, Pmode); \
} while (0)
@ -953,7 +953,7 @@ typedef struct xtensa_args {
when count == 0 and the stack pointer when count > 0. */
#define DYNAMIC_CHAIN_ADDRESS(frame) \
gen_rtx (PLUS, Pmode, frame, GEN_INT (-3 * UNITS_PER_WORD))
gen_rtx_PLUS (Pmode, frame, GEN_INT (-3 * UNITS_PER_WORD))
/* Define this if the return address of a particular stack frame is
accessed from the frame pointer of the previous stack frame. */
@ -1098,10 +1098,10 @@ typedef struct xtensa_args {
&& xtensa_simm8x256 (INTVAL (plus1) & ~0xff)) \
{ \
rtx temp = gen_reg_rtx (Pmode); \
emit_insn (gen_rtx (SET, Pmode, temp, \
gen_rtx (PLUS, Pmode, plus0, \
emit_insn (gen_rtx_SET (Pmode, temp, \
gen_rtx_PLUS (Pmode, plus0, \
GEN_INT (INTVAL (plus1) & ~0xff)))); \
(X) = gen_rtx (PLUS, Pmode, temp, \
(X) = gen_rtx_PLUS (Pmode, temp, \
GEN_INT (INTVAL (plus1) & 0xff)); \
goto WIN; \
} \

12
gcc/config/xtensa/xtensa.md
View File

@ -1648,7 +1648,7 @@
(match_dup 1))]
""
{
operands[1] = gen_rtx (EQ, SImode, branch_cmp[0], branch_cmp[1]);
operands[1] = gen_rtx_EQ (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
@ -1659,7 +1659,7 @@
(match_dup 1))]
""
{
operands[1] = gen_rtx (NE, SImode, branch_cmp[0], branch_cmp[1]);
operands[1] = gen_rtx_NE (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
@ -1670,7 +1670,7 @@
(match_dup 1))]
""
{
operands[1] = gen_rtx (GT, SImode, branch_cmp[0], branch_cmp[1]);
operands[1] = gen_rtx_GT (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
@ -1681,7 +1681,7 @@
(match_dup 1))]
""
{
operands[1] = gen_rtx (GE, SImode, branch_cmp[0], branch_cmp[1]);
operands[1] = gen_rtx_GE (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
@ -1692,7 +1692,7 @@
(match_dup 1))]
""
{
operands[1] = gen_rtx (LT, SImode, branch_cmp[0], branch_cmp[1]);
operands[1] = gen_rtx_LT (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;
@ -1703,7 +1703,7 @@
(match_dup 1))]
""
{
operands[1] = gen_rtx (LE, SImode, branch_cmp[0], branch_cmp[1]);
operands[1] = gen_rtx_LE (SImode, branch_cmp[0], branch_cmp[1]);
if (!xtensa_expand_scc (operands))
FAIL;
DONE;