ffi.c (ffi_prep_cif_machdep): Handle functions that return long long values.
* src/arm/ffi.c (ffi_prep_cif_machdep): Handle functions that return long long values. Round stack allocation to a multiple of 8 bytes for ATPCS compatibility. * src/arm/sysv.S (ffi_call_SYSV): Rework to avoid use of APCS register names. Handle returning long long types. Add Thumb and interworking support. Improve soft-float code. From-SVN: r89681
This commit is contained in:
Richard Earnshaw
Richard Earnshaw
parent
5ae4c56561
commit
f20459f1b2
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@ -1,3 +1,12 @@
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2004-10-27 Richard Earnshaw <rearnsha@arm.com>
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* src/arm/ffi.c (ffi_prep_cif_machdep): Handle functions that return
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long long values. Round stack allocation to a multiple of 8 bytes
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for ATPCS compatibility.
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* src/arm/sysv.S (ffi_call_SYSV): Rework to avoid use of APCS register
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names. Handle returning long long types. Add Thumb and interworking
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support. Improve soft-float code.
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2004-10-27 Richard Earnshaw <rearnsha@arm.com>
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* testsuite/lib/libffi-db.exp (load_gcc_lib): New function.
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@ -108,6 +108,11 @@ void ffi_prep_args(char *stack, extended_cif *ecif)
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/* Perform machine dependent cif processing */
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ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
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{
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/* Round the stack up to a multiple of 8 bytes. This isn't needed
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everywhere, but it is on some platforms, and it doesn't harm anything
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when it isn't needed. */
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cif->bytes = (cif->bytes + 7) & ~7;
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/* Set the return type flag */
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switch (cif->rtype->type)
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{
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@ -118,6 +123,11 @@ ffi_status ffi_prep_cif_machdep(ffi_cif *cif)
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cif->flags = (unsigned) cif->rtype->type;
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break;
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case FFI_TYPE_SINT64:
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case FFI_TYPE_UINT64:
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cif->flags = (unsigned) FFI_TYPE_SINT64;
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break;
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default:
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cif->flags = FFI_TYPE_INT;
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break;
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@ -40,87 +40,169 @@
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#endif
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#define ENTRY(x) .globl CNAME(x); .type CNAME(x),%function; CNAME(x):
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#endif
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#ifdef __ELF__
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#define LSYM(x) .x
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#else
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#define LSYM(x) x
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#endif
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/* We need a better way of testing for this, but for now, this is all
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we can do. */
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@ This selects the minimum architecture level required.
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#define __ARM_ARCH__ 3
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#if defined(__ARM_ARCH_4__) || defined(__ARM_ARCH_4T__)
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# undef __ARM_ARCH__
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# define __ARM_ARCH__ 4
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#endif
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#if defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5T__) \
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|| defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
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|| defined(__ARM_ARCH_5TEJ__)
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# undef __ARM_ARCH__
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# define __ARM_ARCH__ 5
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#endif
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#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
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|| defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) \
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|| defined(__ARM_ARCH_6ZK__)
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# undef __ARM_ARCH__
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# define __ARM_ARCH__ 6
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#endif
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#if __ARM_ARCH__ >= 5
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# define call_reg(x) blx x
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#elif defined (__ARM_ARCH_4T__)
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# define call_reg(x) mov lr, pc ; bx x
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# if defined(__thumb__) || defined(__THUMB_INTERWORK__)
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# define __INTERWORKING__
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# endif
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#else
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# define call_reg(x) mov lr, pc ; mov pc, x
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#endif
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#if defined(__thumb__) && !defined(__THUMB_INTERWORK__)
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.macro ARM_FUNC_START name
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.text
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.align 0
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.thumb
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.thumb_func
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ENTRY(\name)
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bx pc
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nop
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.arm
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/* A hook to tell gdb that we've switched to ARM mode. Also used to call
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directly from other local arm routines. */
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_L__\name:
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.endm
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#else
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.macro ARM_FUNC_START name
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.text
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.align 0
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.arm
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ENTRY(\name)
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.endm
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#endif
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.macro RETLDM regs=, cond=, dirn=ia
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#if defined (__INTERWORKING__)
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.ifc "\regs",""
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ldr\cond lr, [sp], #4
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.else
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ldm\cond\dirn sp!, {\regs, lr}
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.endif
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bx\cond lr
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#else
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.ifc "\regs",""
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ldr\cond pc, [sp], #4
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.else
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ldm\cond\dirn sp!, {\regs, pc}
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.endif
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#endif
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.endm
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@ r0: ffi_prep_args
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@ r1: &ecif
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@ r2: cif->bytes
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@ r3: fig->flags
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@ sp+0: ecif.rvalue
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@ sp+4: fn
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@ This assumes we are using gas.
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ARM_FUNC_START ffi_call_SYSV
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@ Save registers
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stmfd sp!, {r0-r3, fp, lr}
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mov fp, sp
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@ Make room for all of the new args.
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sub sp, fp, r2
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@ Place all of the ffi_prep_args in position
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mov ip, r0
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mov r0, sp
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@ r1 already set
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@ Call ffi_prep_args(stack, &ecif)
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call_reg(ip)
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@ move first 4 parameters in registers
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ldmia sp, {r0-r3}
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@ and adjust stack
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ldr ip, [fp, #8]
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cmp ip, #16
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movhs ip, #16
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add sp, sp, ip
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@ call (fn) (...)
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ldr ip, [fp, #28]
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call_reg(ip)
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.text
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@ Remove the space we pushed for the args
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mov sp, fp
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# a1: ffi_prep_args
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# a2: &ecif
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# a3: cif->bytes
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# a4: fig->flags
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# sp+0: ecif.rvalue
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# sp+4: fn
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@ Load r2 with the pointer to storage for the return value
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ldr r2, [sp, #24]
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# This assumes we are using gas.
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ENTRY(ffi_call_SYSV)
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# Save registers
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stmfd sp!, {a1-a4, fp, lr}
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mov fp, sp
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@ Load r3 with the return type code
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ldr r3, [sp, #12]
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# Make room for all of the new args.
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sub sp, fp, a3
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@ If the return value pointer is NULL, assume no return value.
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cmp r2, #0
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beq LSYM(Lepilogue)
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# Place all of the ffi_prep_args in position
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mov ip, a1
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mov a1, sp
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# a2 already set
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# And call
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mov lr, pc
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mov pc, ip
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# move first 4 parameters in registers
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ldr a1, [sp, #0]
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ldr a2, [sp, #4]
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ldr a3, [sp, #8]
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ldr a4, [sp, #12]
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# and adjust stack
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ldr ip, [fp, #8]
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cmp ip, #16
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movge ip, #16
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add sp, sp, ip
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# call function
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mov lr, pc
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ldr pc, [fp, #28]
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# Remove the space we pushed for the args
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mov sp, fp
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# Load a3 with the pointer to storage for the return value
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ldr a3, [sp, #24]
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# Load a4 with the return type code
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ldr a4, [sp, #12]
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# If the return value pointer is NULL, assume no return value.
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cmp a3, #0
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beq epilogue
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# return INT
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cmp a4, #FFI_TYPE_INT
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streq a1, [a3]
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beq epilogue
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# return FLOAT
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cmp a4, #FFI_TYPE_FLOAT
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@ return INT
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cmp r3, #FFI_TYPE_INT
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#ifdef __SOFTFP__
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streq a1, [a3]
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#else
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stfeqs f0, [a3]
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cmpne r3, #FFI_TYPE_FLOAT
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#endif
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beq epilogue
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streq r0, [r2]
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beq LSYM(Lepilogue)
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# return DOUBLE or LONGDOUBLE
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cmp a4, #FFI_TYPE_DOUBLE
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@ return INT64
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cmp r3, #FFI_TYPE_SINT64
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#ifdef __SOFTFP__
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stmeqia a3, {a1, a2}
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#else
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stfeqd f0, [a3]
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cmpne r3, #FFI_TYPE_DOUBLE
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#endif
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stmeqia r2, {r0, r1}
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#ifndef __SOFTFP__
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beq LSYM(Lepilogue)
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@ return FLOAT
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cmp r3, #FFI_TYPE_FLOAT
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stfeqs f0, [r2]
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beq LSYM(Lepilogue)
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@ return DOUBLE or LONGDOUBLE
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cmp r3, #FFI_TYPE_DOUBLE
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stfeqd f0, [r2]
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#endif
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epilogue:
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ldmfd sp!, {a1-a4, fp, pc}
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LSYM(Lepilogue):
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RETLDM "r0-r3,fp"
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.ffi_call_SYSV_end:
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.size CNAME(ffi_call_SYSV),.ffi_call_SYSV_end-CNAME(ffi_call_SYSV)
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