target-insns.def (clear_cache): New targetm instruction pattern.
gcc/ * target-insns.def (clear_cache): New targetm instruction pattern. * builtins.c (expand_builtin___clear_cache): Use it instead of HAVE_*/gen_* interface. From-SVN: r225430
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@ -1,3 +1,9 @@
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2015-07-05 Richard Sandiford <richard.sandiford@arm.com>
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* target-insns.def (clear_cache): New targetm instruction pattern.
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* builtins.c (expand_builtin___clear_cache): Use it instead of
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HAVE_*/gen_* interface.
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2015-07-05 Richard Sandiford <richard.sandiford@arm.com>
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* target-insns.def (allocate_stack, check_stack, probe_stack)
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@ -4807,20 +4807,22 @@ expand_builtin_copysign (tree exp, rtx target, rtx subtarget)
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/* Expand a call to __builtin___clear_cache. */
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static rtx
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expand_builtin___clear_cache (tree exp ATTRIBUTE_UNUSED)
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expand_builtin___clear_cache (tree exp)
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{
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#ifndef HAVE_clear_cache
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if (!targetm.code_for_clear_cache)
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{
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#ifdef CLEAR_INSN_CACHE
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/* There is no "clear_cache" insn, and __clear_cache() in libgcc
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does something. Just do the default expansion to a call to
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__clear_cache(). */
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return NULL_RTX;
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/* There is no "clear_cache" insn, and __clear_cache() in libgcc
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does something. Just do the default expansion to a call to
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__clear_cache(). */
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return NULL_RTX;
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#else
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/* There is no "clear_cache" insn, and __clear_cache() in libgcc
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does nothing. There is no need to call it. Do nothing. */
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return const0_rtx;
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/* There is no "clear_cache" insn, and __clear_cache() in libgcc
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does nothing. There is no need to call it. Do nothing. */
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return const0_rtx;
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#endif /* CLEAR_INSN_CACHE */
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#else
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}
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/* We have a "clear_cache" insn, and it will handle everything. */
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tree begin, end;
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rtx begin_rtx, end_rtx;
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@ -4834,7 +4836,7 @@ expand_builtin___clear_cache (tree exp ATTRIBUTE_UNUSED)
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return const0_rtx;
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}
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if (HAVE_clear_cache)
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if (targetm.have_clear_cache ())
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{
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struct expand_operand ops[2];
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@ -4846,11 +4848,10 @@ expand_builtin___clear_cache (tree exp ATTRIBUTE_UNUSED)
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create_address_operand (&ops[0], begin_rtx);
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create_address_operand (&ops[1], end_rtx);
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if (maybe_expand_insn (CODE_FOR_clear_cache, 2, ops))
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if (maybe_expand_insn (targetm.code_for_clear_cache, 2, ops))
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return const0_rtx;
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}
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return const0_rtx;
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#endif /* HAVE_clear_cache */
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}
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/* Given a trampoline address, make sure it satisfies TRAMPOLINE_ALIGNMENT. */
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@ -37,6 +37,7 @@ DEF_TARGET_INSN (builtin_setjmp_setup, (rtx x0))
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DEF_TARGET_INSN (canonicalize_funcptr_for_compare, (rtx x0, rtx x1))
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DEF_TARGET_INSN (casesi, (rtx x0, rtx x1, rtx x2, rtx x3, rtx x4))
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DEF_TARGET_INSN (check_stack, (rtx x0))
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DEF_TARGET_INSN (clear_cache, (rtx x0, rtx x1))
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DEF_TARGET_INSN (epilogue, (void))
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DEF_TARGET_INSN (exception_receiver, (void))
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DEF_TARGET_INSN (jump, (rtx x0))
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