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[AArch64] Use aarch64_reg_or_imm instead of nonmemory_operand

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Some of the shift expanders accepted nonmemory_operands but were only
able to handle register_operands or CONST_INTs.  This is probably
academic without SVE, since we're not likely to see shifts by other
types of constant (const_wide_ints, consts, etc).  But for SVE,
it's possible for a vectorised shift induction to have a CONST_POLY_INT
shift amount.

This patch makes the expanders use aarch64_reg_or_imm instead.

2017-11-07  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/aarch64/aarch64.md (ashl<mode>3, ashr<mode>3, lshr<mode>3)
	(rotr<mode>3, rotl<mode>3): Use aarch64_reg_or_imm instead of
	nonmmory_operand.

From-SVN: r254499
This commit is contained in:
Richard Sandiford 2017-11-07 16:08:47 +00:00 committed by Richard Sandiford
parent 56ccfbd608
commit f32c3adb8d
2 changed files with 9 additions and 3 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2017-11-07 Richard Sandiford <richard.sandiford@linaro.org>
* config/aarch64/aarch64.md (ashl<mode>3, ashr<mode>3, lshr<mode>3)
(rotr<mode>3, rotl<mode>3): Use aarch64_reg_or_imm instead of
nonmmory_operand.
2017-11-07 Richard Biener <rguenther@suse.de>
* match.pd: Fix build.

6
gcc/config/aarch64/aarch64.md
View File

@ -3958,7 +3958,7 @@
(define_expand "<optab><mode>3"
[(set (match_operand:GPI 0 "register_operand")
(ASHIFT:GPI (match_operand:GPI 1 "register_operand")
(match_operand:QI 2 "nonmemory_operand")))]
(match_operand:QI 2 "aarch64_reg_or_imm")))]
""
{
if (CONST_INT_P (operands[2]))
@ -3994,7 +3994,7 @@
(define_expand "rotr<mode>3"
[(set (match_operand:GPI 0 "register_operand")
(rotatert:GPI (match_operand:GPI 1 "register_operand")
(match_operand:QI 2 "nonmemory_operand")))]
(match_operand:QI 2 "aarch64_reg_or_imm")))]
""
{
if (CONST_INT_P (operands[2]))
@ -4014,7 +4014,7 @@
(define_expand "rotl<mode>3"
[(set (match_operand:GPI 0 "register_operand")
(rotatert:GPI (match_operand:GPI 1 "register_operand")
(match_operand:QI 2 "nonmemory_operand")))]
(match_operand:QI 2 "aarch64_reg_or_imm")))]
""
{
/* (SZ - cnt) % SZ == -cnt % SZ */