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[AArch64] Pass a mode to some SVE immediate queries

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It helps the SVE2 ACLE support if aarch64_sve_arith_immediate_p and
aarch64_sve_sqadd_sqsub_immediate_p accept scalars as well as vectors.

2020-01-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
	(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
	* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
	(aarch64_sve_sqadd_sqsub_immediate_p): Likewise.  Handle scalar
	immediates as well as vector ones.
	* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
	(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
	(aarch64_sve_qsub_immediate): Update calls accordingly.

From-SVN: r280059
This commit is contained in:
Richard Sandiford 2020-01-09 16:26:47 +00:00 committed by Richard Sandiford
parent df0f21028e
commit f3582fda78
4 changed files with 28 additions and 23 deletions
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11
gcc/ChangeLog
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@ -1,3 +1,14 @@
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
immediates as well as vector ones.
* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
(aarch64_sve_qsub_immediate): Update calls accordingly.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve2.md: Add banner comments.

4
gcc/config/aarch64/aarch64-protos.h
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@ -550,8 +550,8 @@ bool aarch64_simd_valid_immediate (rtx, struct simd_immediate_info *,
enum simd_immediate_check w = AARCH64_CHECK_MOV);
rtx aarch64_check_zero_based_sve_index_immediate (rtx);
bool aarch64_sve_index_immediate_p (rtx);
bool aarch64_sve_arith_immediate_p (rtx, bool);
bool aarch64_sve_sqadd_sqsub_immediate_p (rtx, bool);
bool aarch64_sve_arith_immediate_p (machine_mode, rtx, bool);
bool aarch64_sve_sqadd_sqsub_immediate_p (machine_mode, rtx, bool);
bool aarch64_sve_bitmask_immediate_p (rtx);
bool aarch64_sve_dup_immediate_p (rtx);
bool aarch64_sve_cmp_immediate_p (rtx, bool);

28
gcc/config/aarch64/aarch64.c
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@ -16407,22 +16407,20 @@ aarch64_sve_index_immediate_p (rtx base_or_step)
&& IN_RANGE (INTVAL (base_or_step), -16, 15));
}
/* Return true if X is a valid immediate for the SVE ADD and SUB
instructions. Negate X first if NEGATE_P is true. */
/* Return true if X is a valid immediate for the SVE ADD and SUB instructions
when applied to mode MODE. Negate X first if NEGATE_P is true. */
bool
aarch64_sve_arith_immediate_p (rtx x, bool negate_p)
aarch64_sve_arith_immediate_p (machine_mode mode, rtx x, bool negate_p)
{
rtx elt;
if (!const_vec_duplicate_p (x, &elt)
|| !CONST_INT_P (elt))
rtx elt = unwrap_const_vec_duplicate (x);
if (!CONST_INT_P (elt))
return false;
HOST_WIDE_INT val = INTVAL (elt);
if (negate_p)
val = -val;
val &= GET_MODE_MASK (GET_MODE_INNER (GET_MODE (x)));
val &= GET_MODE_MASK (GET_MODE_INNER (mode));
if (val & 0xff)
return IN_RANGE (val, 0, 0xff);
@ -16430,23 +16428,19 @@ aarch64_sve_arith_immediate_p (rtx x, bool negate_p)
}
/* Return true if X is a valid immediate for the SVE SQADD and SQSUB
instructions. Negate X first if NEGATE_P is true. */
instructions when applied to mode MODE. Negate X first if NEGATE_P
is true. */
bool
aarch64_sve_sqadd_sqsub_immediate_p (rtx x, bool negate_p)
aarch64_sve_sqadd_sqsub_immediate_p (machine_mode mode, rtx x, bool negate_p)
{
rtx elt;
if (!const_vec_duplicate_p (x, &elt)
|| !CONST_INT_P (elt))
return false;
if (!aarch64_sve_arith_immediate_p (x, negate_p))
if (!aarch64_sve_arith_immediate_p (mode, x, negate_p))
return false;
/* After the optional negation, the immediate must be nonnegative.
E.g. a saturating add of -127 must be done via SQSUB Zn.B, Zn.B, #127
instead of SQADD Zn.B, Zn.B, #129. */
rtx elt = unwrap_const_vec_duplicate (x);
return negate_p == (INTVAL (elt) < 0);
}

8
gcc/config/aarch64/predicates.md
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@ -636,19 +636,19 @@
(define_predicate "aarch64_sve_arith_immediate"
(and (match_code "const,const_vector")
(match_test "aarch64_sve_arith_immediate_p (op, false)")))
(match_test "aarch64_sve_arith_immediate_p (mode, op, false)")))
(define_predicate "aarch64_sve_sub_arith_immediate"
(and (match_code "const,const_vector")
(match_test "aarch64_sve_arith_immediate_p (op, true)")))
(match_test "aarch64_sve_arith_immediate_p (mode, op, true)")))
(define_predicate "aarch64_sve_qadd_immediate"
(and (match_code "const,const_vector")
(match_test "aarch64_sve_sqadd_sqsub_immediate_p (op, false)")))
(match_test "aarch64_sve_sqadd_sqsub_immediate_p (mode, op, false)")))
(define_predicate "aarch64_sve_qsub_immediate"
(and (match_code "const,const_vector")
(match_test "aarch64_sve_sqadd_sqsub_immediate_p (op, true)")))
(match_test "aarch64_sve_sqadd_sqsub_immediate_p (mode, op, true)")))
(define_predicate "aarch64_sve_vector_inc_dec_immediate"
(and (match_code "const,const_vector")