dominance.c, [...]: Fix comment typos.
* dominance.c, gthr-win32.h, reg-stack.c, tree-ssa-copy.c, tree-ssa-operands.c, tree-ssa.c, tree-vrp.c, varasm.c, config/alpha/alpha.c, config/arm/arm.c, config/m32r/m32r.h, config/rs6000/predicates.md: Fix comment typos. From-SVN: r97904
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@ -1,3 +1,10 @@
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2005-04-09 Kazu Hirata <kazu@cs.umass.edu>
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* dominance.c, gthr-win32.h, reg-stack.c, tree-ssa-copy.c,
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tree-ssa-operands.c, tree-ssa.c, tree-vrp.c, varasm.c,
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config/alpha/alpha.c, config/arm/arm.c, config/m32r/m32r.h,
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config/rs6000/predicates.md: Fix comment typos.
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2005-04-09 Jan Hubicka <jh@suse.cz>
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Steven Bosscher <stevenb@suse.de>
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@ -8418,7 +8418,7 @@ alphaev4_next_group (rtx insn, int *pin_use, int *plen)
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if (in_use)
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goto done;
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/* If this is a completely unrecognized insn, its an asm.
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/* If this is a completely unrecognized insn, it's an asm.
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We don't know how long it is, so record length as -1 to
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signal a needed realignment. */
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if (recog_memoized (insn) < 0)
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@ -8516,7 +8516,7 @@ alphaev5_next_group (rtx insn, int *pin_use, int *plen)
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if (in_use)
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goto done;
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/* If this is a completely unrecognized insn, its an asm.
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/* If this is a completely unrecognized insn, it's an asm.
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We don't know how long it is, so record length as -1 to
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signal a needed realignment. */
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if (recog_memoized (insn) < 0)
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@ -7420,7 +7420,7 @@ arm_const_double_inline_cost (rtx val)
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NULL_RTX, NULL_RTX, 0, 0));
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}
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/* Return true if it is worthwile to split a 64-bit constant into two
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/* Return true if it is worthwhile to split a 64-bit constant into two
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32-bit operations. This is the case if optimizing for size, or
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if we have load delay slots, or if one 32-bit part can be done with
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a single data operation. */
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@ -1609,7 +1609,7 @@ extern char m32r_punct_chars[256];
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After generation of rtl, the compiler makes no further distinction
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between pointers and any other objects of this machine mode. */
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/* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has
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it's own problems (you have to add extendpsisi2 and truncsipsi2).
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its own problems (you have to add extendpsisi2 and truncsipsi2).
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Try to avoid it. */
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#define Pmode SImode
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@ -339,7 +339,7 @@
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;; Return 1 if the operand is in volatile memory. Note that during the
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;; RTL generation phase, memory_operand does not return TRUE for volatile
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;; memory references. So this function allows us to recognize volatile
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;; references where its safe.
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;; references where it's safe.
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(define_predicate "volatile_mem_operand"
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(and (and (match_code "mem")
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(match_test "MEM_VOLATILE_P (op)"))
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@ -30,7 +30,7 @@
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The algorithm computes this dominator tree implicitly by computing for
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each block its immediate dominator. We use tree balancing and path
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compression, so its the O(e*a(e,v)) variant, where a(e,v) is the very
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compression, so it's the O(e*a(e,v)) variant, where a(e,v) is the very
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slowly growing functional inverse of the Ackerman function. */
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#include "config.h"
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@ -71,7 +71,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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#ifdef _LIBOBJC
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/* This is necessary to prevent windef.h (included from windows.h) from
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defining it's own BOOL as a typedef. */
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defining its own BOOL as a typedef. */
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#ifndef __OBJC__
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#define __OBJC__
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#endif
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@ -1424,7 +1424,7 @@ subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
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if (pat != PATTERN (insn))
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{
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/* The fix_truncdi_1 pattern wants to be able to allocate
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it's own scratch register. It does this by clobbering
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its own scratch register. It does this by clobbering
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an fp reg so that it is assured of an empty reg-stack
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register. If the register is live, kill it now.
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Remove the DEAD/UNUSED note so we don't try to kill it
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@ -430,7 +430,7 @@ get_last_copy_of (tree var)
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/* Set FIRST to be the first variable in the copy-of chain for DEST.
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If DEST's copy-of value or its copy-of chain have changed, return
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If DEST's copy-of value or its copy-of chain has changed, return
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true.
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MEM_REF is the memory reference where FIRST is stored. This is
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@ -67,7 +67,7 @@ Boston, MA 02111-1307, USA. */
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on each of the 5 operand vectors which have been built up.
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If the stmt had a previous operand cache, the finalization routines
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attempt to match up the new operands with the old ones. If its a perfect
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attempt to match up the new operands with the old ones. If it's a perfect
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match, the old vector is simply reused. If it isn't a perfect match, then
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a new vector is created and the new operands are placed there. For
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virtual operands, if the previous cache had SSA_NAME version of a
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@ -473,7 +473,7 @@ correct_use_link (ssa_imm_use_t *ptr, tree stmt)
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if (prev)
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{
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bool stmt_mod = true;
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/* Find the first element which isn't a SAFE iterator, is in a sifferent
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/* Find the first element which isn't a SAFE iterator, is in a different
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stmt, and is not a a modified stmt, That node is in the correct list,
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see if we are too. */
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root = prev->stmt;
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else
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root = *(prev->use);
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/* If its the right list, simply return. */
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/* If it's the right list, simply return. */
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if (root == *(ptr->use))
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return;
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}
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@ -261,7 +261,7 @@ verify_use (basic_block bb, basic_block def_bb, use_operand_p use_p,
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}
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/* Make sure the use is in an appropriate list by checking the previous
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element to make sure its the same. */
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element to make sure it's the same. */
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if (use_p->prev == NULL)
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{
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error ("No immediate_use list");
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@ -2000,7 +2000,7 @@ vrp_meet (value_range *vr0, value_range *vr1)
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if (compare_values (vr0->min, vr1->min) == 1)
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min = vr1->min;
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/* The upper limit of the new range is the maximium of the
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/* The upper limit of the new range is the maximum of the
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two ranges. */
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if (compare_values (vr0->max, vr1->max) == -1)
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max = vr1->max;
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@ -5402,7 +5402,7 @@ default_valid_pointer_mode (enum machine_mode mode)
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}
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/* Default function to output code that will globalize a label. A
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target must define GLOBAL_ASM_OP or provide it's own function to
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target must define GLOBAL_ASM_OP or provide its own function to
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globalize a label. */
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#ifdef GLOBAL_ASM_OP
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void
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