testsuite/97299 - more gcc.dg/vect/slp-reduc-3.c massaging

This adds more guards to the VEC_PERM_EXPR scan, namely that
we also could end up with load-lanes and of course no vectorization
at all.  Need dependent scans (scan-if-scan-X PASSed ...).

2021-01-21  Richard Biener  <rguenther@suse.de>

	PR testsuite/97299
	* gcc.dg/vect/slp-reduc-3.c: Amend target selectors.
This commit is contained in:
Richard Biener 2021-01-21 10:57:18 +01:00
parent 8afef308b4
commit f46a40112c

View File

@ -46,6 +46,7 @@ int main (void)
for (i=0; i<N; i++) { for (i=0; i<N; i++) {
X[i] = i; X[i] = i;
Y[i] = 64-i; Y[i] = 64-i;
asm volatile ("" ::: "memory");
} }
foo1 (N/2, &dot1, &dot2); foo1 (N/2, &dot1, &dot2);
@ -58,7 +59,7 @@ int main (void)
/* The initialization loop in main also gets vectorized. */ /* The initialization loop in main also gets vectorized. */
/* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected" 1 "vect" { xfail *-*-* } } } */ /* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected" 1 "vect" { xfail *-*-* } } } */
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_short_mult && { vect_widen_sum_hi_to_si && vect_unpack } } } } } */ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_short_mult && { vect_widen_sum_hi_to_si && vect_unpack } } } } } */
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_widen_sum_hi_to_si_pattern || { ! vect_unpack } } } } } */ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_widen_sum_hi_to_si_pattern || { ! { vect_short_mult && { vect_widen_sum_hi_to_si && vect_unpack } } } } } } } */
/* Check we can elide permutes if SLP vectorizing the reduction. */ /* Check we can elide permutes if SLP vectorizing the reduction. */
/* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 0 "vect" { xfail { vect_widen_sum_hi_to_si_pattern || { ! vect_unpack } } } } } */ /* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 0 "vect" { xfail { { { vect_widen_sum_hi_to_si_pattern || { ! vect_unpack } } && { ! vect_load_lanes } } && { vect_short_mult && { vect_widen_sum_hi_to_si && vect_unpack } } } } } } */