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sourcebuild.texi: (dfp_hw): Document.

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gcc/
	* doc/sourcebuild.texi: (dfp_hw): Document.
	(p8vector_hw): Likewise.
	(powerpc_eabi_ok): Likewise.
	(powerpc_elfv2): Likewise.
	(powerpc_htm_ok): Likewise.
	(ppc_recip_hw): Likewise.
	(vsx_hw): Likewise.

gcc/testsuite/
	* lib/target-support.exp (check_dfp_hw_available): New function.
	(is-effective-target): Check $arg for dfp_hw.
	(is-effective-target-keyword): Likewise.
	* gcc.target/powerpc/pack03.c: (dg-require-effective-target):
	Change target to dfp_hw.

From-SVN: r210404
This commit is contained in:
Peter Bergner 2014-05-13 18:44:42 -05:00 committed by Peter Bergner
parent f0035dca69
commit f4853e92cf
5 changed files with 75 additions and 4 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2014-05-13 Peter Bergner <bergner@vnet.ibm.com>
* doc/sourcebuild.texi: (dfp_hw): Document.
(p8vector_hw): Likewise.
(powerpc_eabi_ok): Likewise.
(powerpc_elfv2): Likewise.
(powerpc_htm_ok): Likewise.
(ppc_recip_hw): Likewise.
(vsx_hw): Likewise.
2014-05-13 Cary Coutant <ccoutant@google.com>
* opts.c (finish_options): Use -ggnu-pubnames with -gsplit-dwarf.

31
gcc/doc/sourcebuild.texi
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@ -1601,6 +1601,13 @@ MIPS target supports @code{-mpaired-single}.
@subsubsection PowerPC-specific attributes
@table @code
@item dfp_hw
PowerPC target supports executing hardware DFP instructions.
@item p8vector_hw
PowerPC target supports executing VSX instructions (ISA 2.07).
@item powerpc64
Test system supports executing 64-bit instructions.
@ -1610,12 +1617,24 @@ PowerPC target supports AltiVec.
@item powerpc_altivec_ok
PowerPC target supports @code{-maltivec}.
@item powerpc_eabi_ok
PowerPC target supports @code{-meabi}.
@item powerpc_elfv2
PowerPC target supports @code{-mabi=elfv2}.
@item powerpc_fprs
PowerPC target supports floating-point registers.
@item powerpc_hard_double
PowerPC target supports hardware double-precision floating-point.
@item powerpc_htm_ok
PowerPC target supports @code{-mhtm}
@item powerpc_p8vector_ok
PowerPC target supports @code{-mpower8-vector}
@item powerpc_ppu_ok
PowerPC target supports @code{-mcpu=cell}.
@ -1629,9 +1648,6 @@ PowerPC target supports PowerPC SPE.
@item powerpc_spu
PowerPC target supports PowerPC SPU.
@item spu_auto_overlay
SPU target has toolchain that supports automatic overlay generation.
@item powerpc_vsx_ok
PowerPC target supports @code{-mvsx}.
@ -1639,8 +1655,17 @@ PowerPC target supports @code{-mvsx}.
Including the options used to compile this particular test, the
PowerPC target supports PowerPC 405.
@item ppc_recip_hw
PowerPC target supports executing reciprocal estimate instructions.
@item spu_auto_overlay
SPU target has toolchain that supports automatic overlay generation.
@item vmx_hw
PowerPC target supports executing AltiVec instructions.
@item vsx_hw
PowerPC target supports executing VSX instructions (ISA 2.06).
@end table
@subsubsection Other hardware attributes

8
gcc/testsuite/ChangeLog
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@ -1,3 +1,11 @@
2014-05-13 Peter Bergner <bergner@vnet.ibm.com>
* lib/target-support.exp (check_dfp_hw_available): New function.
(is-effective-target): Check $arg for dfp_hw.
(is-effective-target-keyword): Likewise.
* gcc.target/powerpc/pack03.c: (dg-require-effective-target):
Change target to dfp_hw.
2014-05-13 Marek Polacek <polacek@redhat.com>
PR c/61162

2
gcc/testsuite/gcc.target/powerpc/pack03.c
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@ -1,7 +1,7 @@
/* { dg-do run { target { powerpc*-*-linux* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */
/* { dg-require-effective-target dfprt } */
/* { dg-require-effective-target dfp_hw } */
/* { dg-options "-O2 -mhard-dfp" } */
#include <stddef.h>

28
gcc/testsuite/lib/target-supports.exp
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@ -1956,6 +1956,32 @@ proc check_effective_target_dfprt { } {
}]
}
# Return 1 if the target supports executing DFP hardware instructions,
# 0 otherwise. Cache the result.
proc check_dfp_hw_available { } {
return [check_cached_effective_target dfp_hw_available {
# For now, disable on Darwin
if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
expr 0
} else {
check_runtime_nocache dfp_hw_available {
volatile _Decimal64 r;
volatile _Decimal64 a = 4.0DD;
volatile _Decimal64 b = 2.0DD;
int main()
{
asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
return 0;
}
} "-mcpu=power6 -mhard-float"
}
}]
}
# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
proc check_effective_target_ucn_nocache { } {
@ -4936,6 +4962,7 @@ proc is-effective-target { arg } {
"vsx_hw" { set selected [check_vsx_hw_available] }
"p8vector_hw" { set selected [check_p8vector_hw_available] }
"ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
"dfp_hw" { set selected [check_dfp_hw_available] }
"named_sections" { set selected [check_named_sections_available] }
"gc_sections" { set selected [check_gc_sections_available] }
"cxa_atexit" { set selected [check_cxa_atexit_available] }
@ -4958,6 +4985,7 @@ proc is-effective-target-keyword { arg } {
"vsx_hw" { return 1 }
"p8vector_hw" { return 1 }
"ppc_recip_hw" { return 1 }
"dfp_hw" { return 1 }
"named_sections" { return 1 }
"gc_sections" { return 1 }
"cxa_atexit" { return 1 }