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emit-rtl.c (adjust_address): New function. 

* emit-rtl.c (adjust_address): New function.
	* expr.h (adjust_address): Add declaration.
	* builtins.c: Replace some calls to change_address with calls to it
	or to validize_mem.
	* caller-save.c, dwarf2out.c, except.c, expmed.c, expr.c: Likewise.
	* function.c, config/a29k/a29k.md, config/alpha/alpha.c: Likewise.
	* config/arm/arm.c, config/convex/convex.c: Likewise.
	* config/dsp16xx/dsp16xx.md, config/fr30/fr30.c: Likewise.
	* config/i386/i386.c, config/i386/i386.md: Likewise.
	* config/ia64/ia64.c, config/ia64/ia64.md: Likewise.
	* config/m32r/m32r.c, config/m68k/m68k.md: Likewise.
	* config/m88k/m88k.c, config/mips/mips.md: Likewise.
	* config/ns32k/ns32k.c, config/rs6000/rs6000.c: Likewise.
	* config/sh/sh.c, config/sparc/sparc.md: Likewise.

From-SVN: r43702
This commit is contained in:
Richard Kenner 2001-07-02 19:47:44 +00:00 committed by Richard Kenner
parent 494fff4cea
commit f4ef873c31
29 changed files with 235 additions and 346 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
gcc/ChangeLog
View File

@ -1,3 +1,20 @@
Mon Jul 2 15:33:31 2001 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* emit-rtl.c (adjust_address): New function.
* expr.h (adjust_address): Add declaration.
* builtins.c: Replace some calls to change_address with calls to it
or to validize_mem.
* caller-save.c, dwarf2out.c, except.c, expmed.c, expr.c: Likewise.
* function.c, config/a29k/a29k.md, config/alpha/alpha.c: Likewise.
* config/arm/arm.c, config/convex/convex.c: Likewise.
* config/dsp16xx/dsp16xx.md, config/fr30/fr30.c: Likewise.
* config/i386/i386.c, config/i386/i386.md: Likewise.
* config/ia64/ia64.c, config/ia64/ia64.md: Likewise.
* config/m32r/m32r.c, config/m68k/m68k.md: Likewise.
* config/m88k/m88k.c, config/mips/mips.md: Likewise.
* config/ns32k/ns32k.c, config/rs6000/rs6000.c: Likewise.
* config/sh/sh.c, config/sparc/sparc.md: Likewise.
2001-07-02 Jim Wilson <wilson@redhat.com>
* config/ia64/ia64.h: Delete obsolete lib1funcs.asm comment.

34
gcc/builtins.c
View File

@ -947,8 +947,7 @@ result_vector (savep, result)
if (size % align != 0)
size = CEIL (size, align) * align;
reg = gen_rtx_REG (mode, savep ? regno : INCOMING_REGNO (regno));
mem = change_address (result, mode,
plus_constant (XEXP (result, 0), size));
mem = adjust_address (result, mode, size);
savevec[nelts++] = (savep
? gen_rtx_SET (VOIDmode, mem, reg)
: gen_rtx_SET (VOIDmode, reg, mem));
@ -989,15 +988,12 @@ expand_builtin_apply_args_1 ()
tem = gen_rtx_REG (mode, INCOMING_REGNO (regno));
emit_move_insn (change_address (registers, mode,
plus_constant (XEXP (registers, 0),
size)),
tem);
emit_move_insn (adjust_address (registers, mode, size), tem);
size += GET_MODE_SIZE (mode);
}
/* Save the arg pointer to the block. */
emit_move_insn (change_address (registers, Pmode, XEXP (registers, 0)),
emit_move_insn (adjust_address (registers, Pmode, 0),
copy_to_reg (virtual_incoming_args_rtx));
size = GET_MODE_SIZE (Pmode);
@ -1005,9 +1001,7 @@ expand_builtin_apply_args_1 ()
"invisible" first argument. */
if (struct_value_incoming_rtx)
{
emit_move_insn (change_address (registers, Pmode,
plus_constant (XEXP (registers, 0),
size)),
emit_move_insn (adjust_address (registers, Pmode, size),
copy_to_reg (struct_value_incoming_rtx));
size += GET_MODE_SIZE (Pmode);
}
@ -1124,11 +1118,7 @@ expand_builtin_apply (function, arguments, argsize)
if (size % align != 0)
size = CEIL (size, align) * align;
reg = gen_rtx_REG (mode, regno);
emit_move_insn (reg,
change_address (arguments, mode,
plus_constant (XEXP (arguments, 0),
size)));
emit_move_insn (reg, adjust_address (arguments, mode, size));
use_reg (&call_fusage, reg);
size += GET_MODE_SIZE (mode);
}
@ -1139,10 +1129,7 @@ expand_builtin_apply (function, arguments, argsize)
if (struct_value_rtx)
{
rtx value = gen_reg_rtx (Pmode);
emit_move_insn (value,
change_address (arguments, Pmode,
plus_constant (XEXP (arguments, 0),
size)));
emit_move_insn (value, adjust_address (arguments, Pmode, size));
emit_move_insn (struct_value_rtx, value);
if (GET_CODE (struct_value_rtx) == REG)
use_reg (&call_fusage, struct_value_rtx);
@ -1186,9 +1173,7 @@ expand_builtin_apply (function, arguments, argsize)
gen_rtx_MEM (FUNCTION_MODE, function),
const0_rtx, NULL_RTX, const0_rtx));
emit_move_insn (change_address (result, GET_MODE (valreg),
XEXP (result, 0)),
valreg);
emit_move_insn (adjust_address (result, GET_MODE (valreg), 0), valreg);
}
else
#endif
@ -1264,10 +1249,7 @@ expand_builtin_return (result)
if (size % align != 0)
size = CEIL (size, align) * align;
reg = gen_rtx_REG (mode, INCOMING_REGNO (regno));
emit_move_insn (reg,
change_address (result, mode,
plus_constant (XEXP (result, 0),
size)));
emit_move_insn (reg, adjust_address (result, mode, size));
push_to_sequence (call_fusage);
emit_insn (gen_rtx_USE (VOIDmode, reg));

6
gcc/caller-save.c
View File

@ -1,6 +1,6 @@
/* Save and restore call-clobbered registers which are live across a call.
Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
1999, 2000 Free Software Foundation, Inc.
1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -677,7 +677,7 @@ insert_restore (chain, before_p, regno, maxrestore, save_mode)
if (save_mode [regno] != VOIDmode
&& save_mode [regno] != GET_MODE (mem)
&& numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
mem = change_address (mem, save_mode[regno], XEXP (mem, 0));
mem = adjust_address (mem, save_mode[regno], 0);
pat = gen_rtx_SET (VOIDmode,
gen_rtx_REG (GET_MODE (mem),
regno), mem);
@ -754,7 +754,7 @@ insert_save (chain, before_p, regno, to_save, save_mode)
if (save_mode [regno] != VOIDmode
&& save_mode [regno] != GET_MODE (mem)
&& numregs == HARD_REGNO_NREGS (regno, save_mode [regno]))
mem = change_address (mem, save_mode[regno], XEXP (mem, 0));
mem = adjust_address (mem, save_mode[regno], 0);
pat = gen_rtx_SET (VOIDmode, mem,
gen_rtx_REG (GET_MODE (mem),
regno));

6
gcc/config/a29k/a29k.md
View File

@ -1,5 +1,6 @@
;;- Machine description for AMD Am29000 for GNU C compiler
;; Copyright (C) 1991, 1992, 1994, 1998, 1999 Free Software Foundation, Inc.
;; Copyright (C) 1991, 1992, 1994, 1998, 1999, 2001
;; Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GNU CC.
@ -2375,8 +2376,7 @@
operands[1] = force_const_mem (TImode, operands[1]);
if (! memory_address_p (TImode, XEXP (operands[1], 0))
&& ! reload_in_progress)
operands[1] = change_address (operands[1], TImode,
XEXP (operands[1], 0));
operands[1] = adjust_address (operands[1], TImode, 0);
}
}")

105
gcc/config/alpha/alpha.c
View File

@ -2397,9 +2397,8 @@ alpha_split_tfmode_pair (operands)
}
else if (GET_CODE (operands[1]) == MEM)
{
operands[3] = change_address (operands[1], DImode,
plus_constant (XEXP (operands[1], 0), 8));
operands[2] = change_address (operands[1], DImode, NULL_RTX);
operands[3] = adjust_address (operands[1], DImode, 8);
operands[2] = adjust_address (operands[1], DImode, 0);
}
else if (operands[1] == CONST0_RTX (TFmode))
operands[2] = operands[3] = const0_rtx;
@ -2413,9 +2412,8 @@ alpha_split_tfmode_pair (operands)
}
else if (GET_CODE (operands[0]) == MEM)
{
operands[1] = change_address (operands[0], DImode,
plus_constant (XEXP (operands[0], 0), 8));
operands[0] = change_address (operands[0], DImode, NULL_RTX);
operands[1] = adjust_address (operands[0], DImode, 8);
operands[0] = adjust_address (operands[0], DImode, 0);
}
else
abort ();
@ -2694,8 +2692,7 @@ alpha_expand_unaligned_load_words (out_regs, smem, words, ofs)
data_regs[words] = gen_reg_rtx (DImode);
if (ofs != 0)
smem = change_address (smem, GET_MODE (smem),
plus_constant (XEXP (smem, 0), ofs));
smem = adjust_address (smem, GET_MODE (smem), ofs);
/* Load up all of the source data. */
for (i = 0; i < words; ++i)
@ -2771,9 +2768,7 @@ alpha_expand_unaligned_store_words (data_regs, dmem, words, ofs)
st_tmp_2 = gen_reg_rtx(DImode);
if (ofs != 0)
dmem = change_address (dmem, GET_MODE (dmem),
plus_constant (XEXP (dmem, 0), ofs));
dmem = adjust_address (dmem, GET_MODE (dmem), ofs);
st_addr_2 = change_address (dmem, DImode,
gen_rtx_AND (DImode,
@ -2950,9 +2945,7 @@ alpha_expand_block_move (operands)
for (i = 0; i < words; ++i)
emit_move_insn (data_regs[nregs + i],
change_address (orig_src, DImode,
plus_constant (XEXP (orig_src, 0),
ofs + i * 8)));
adjust_address (orig_src, DImode, ofs + i * 8));
nregs += words;
bytes -= words * 8;
@ -3006,10 +2999,7 @@ alpha_expand_block_move (operands)
{
do {
data_regs[nregs++] = tmp = gen_reg_rtx (HImode);
emit_move_insn (tmp,
change_address (orig_src, HImode,
plus_constant (XEXP (orig_src, 0),
ofs)));
emit_move_insn (tmp, adjust_address (orig_src, HImode, ofs));
bytes -= 2;
ofs += 2;
} while (bytes >= 2);
@ -3026,10 +3016,7 @@ alpha_expand_block_move (operands)
while (bytes > 0)
{
data_regs[nregs++] = tmp = gen_reg_rtx (QImode);
emit_move_insn (tmp,
change_address (orig_src, QImode,
plus_constant (XEXP (orig_src, 0),
ofs)));
emit_move_insn (tmp, adjust_address (orig_src, QImode, ofs));
bytes -= 1;
ofs += 1;
}
@ -3099,9 +3086,7 @@ alpha_expand_block_move (operands)
{
while (i < nregs && GET_MODE (data_regs[i]) == DImode)
{
emit_move_insn (change_address (orig_dst, DImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
emit_move_insn (adjust_address (orig_dst, DImode, ofs),
data_regs[i]);
ofs += 8;
i++;
@ -3117,13 +3102,9 @@ alpha_expand_block_move (operands)
tmp = expand_binop (DImode, lshr_optab, data_regs[i], GEN_INT (32),
NULL_RTX, 1, OPTAB_WIDEN);
emit_move_insn (change_address (orig_dst, SImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
emit_move_insn (adjust_address (orig_dst, SImode, ofs),
gen_lowpart (SImode, data_regs[i]));
emit_move_insn (change_address (orig_dst, SImode,
plus_constant (XEXP (orig_dst, 0),
ofs + 4)),
emit_move_insn (adjust_address (orig_dst, SImode, ofs + 4),
gen_lowpart (SImode, tmp));
ofs += 8;
i++;
@ -3131,9 +3112,7 @@ alpha_expand_block_move (operands)
while (i < nregs && GET_MODE (data_regs[i]) == SImode)
{
emit_move_insn (change_address(orig_dst, SImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
emit_move_insn (adjust_address (orig_dst, SImode, ofs),
data_regs[i]);
ofs += 4;
i++;
@ -3171,10 +3150,7 @@ alpha_expand_block_move (operands)
if (dst_align >= 16)
while (i < nregs && GET_MODE (data_regs[i]) == HImode)
{
emit_move_insn (change_address (orig_dst, HImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
data_regs[i]);
emit_move_insn (adjust_address (orig_dst, HImode, ofs), data_regs[i]);
i++;
ofs += 2;
}
@ -3188,10 +3164,7 @@ alpha_expand_block_move (operands)
while (i < nregs && GET_MODE (data_regs[i]) == QImode)
{
emit_move_insn (change_address (orig_dst, QImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
data_regs[i]);
emit_move_insn (adjust_address (orig_dst, QImode, ofs), data_regs[i]);
i++;
ofs += 1;
}
@ -3278,9 +3251,7 @@ alpha_expand_block_clear (operands)
rtx mem, tmp;
HOST_WIDE_INT mask;
mem = change_address (orig_dst, mode,
plus_constant (XEXP (orig_dst, 0),
ofs - inv_alignofs));
mem = adjust_address (orig_dst, mode, ofs - inv_alignofs);
MEM_ALIAS_SET (mem) = 0;
mask = ~(~(HOST_WIDE_INT)0 << (inv_alignofs * 8));
@ -3306,30 +3277,21 @@ alpha_expand_block_clear (operands)
if (TARGET_BWX && (alignofs & 1) && bytes >= 1)
{
emit_move_insn (change_address (orig_dst, QImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
const0_rtx);
emit_move_insn (adjust_address (orig_dst, QImode, ofs), const0_rtx);
bytes -= 1;
ofs += 1;
alignofs -= 1;
}
if (TARGET_BWX && align >= 16 && (alignofs & 3) == 2 && bytes >= 2)
{
emit_move_insn (change_address (orig_dst, HImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
const0_rtx);
emit_move_insn (adjust_address (orig_dst, HImode, ofs), const0_rtx);
bytes -= 2;
ofs += 2;
alignofs -= 2;
}
if (alignofs == 4 && bytes >= 4)
{
emit_move_insn (change_address (orig_dst, SImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
const0_rtx);
emit_move_insn (adjust_address (orig_dst, SImode, ofs), const0_rtx);
bytes -= 4;
ofs += 4;
alignofs = 0;
@ -3351,10 +3313,8 @@ alpha_expand_block_clear (operands)
words = bytes / 8;
for (i = 0; i < words; ++i)
emit_move_insn (change_address(orig_dst, DImode,
plus_constant (XEXP (orig_dst, 0),
ofs + i * 8)),
const0_rtx);
emit_move_insn (adjust_address(orig_dst, DImode, ofs + i * 8),
const0_rtx);
bytes -= words * 8;
ofs += words * 8;
@ -3365,9 +3325,7 @@ alpha_expand_block_clear (operands)
if (align >= 32 && bytes > 16)
{
emit_move_insn (change_address (orig_dst, SImode,
plus_constant (XEXP (orig_dst, 0), ofs)),
const0_rtx);
emit_move_insn (adjust_address (orig_dst, SImode, ofs), const0_rtx);
bytes -= 4;
ofs += 4;
@ -3400,9 +3358,7 @@ alpha_expand_block_clear (operands)
words = bytes / 4;
for (i = 0; i < words; ++i)
emit_move_insn (change_address (orig_dst, SImode,
plus_constant (XEXP (orig_dst, 0),
ofs + i * 4)),
emit_move_insn (adjust_address (orig_dst, SImode, ofs + i * 4),
const0_rtx);
bytes -= words * 4;
@ -3440,8 +3396,7 @@ alpha_expand_block_clear (operands)
rtx mem, tmp;
HOST_WIDE_INT mask;
mem = change_address (orig_dst, DImode,
plus_constant (XEXP (orig_dst, 0), ofs));
mem = adjust_address (orig_dst, DImode, ofs);
MEM_ALIAS_SET (mem) = 0;
mask = ~(HOST_WIDE_INT)0 << (bytes * 8);
@ -3457,8 +3412,7 @@ alpha_expand_block_clear (operands)
rtx mem, tmp;
HOST_WIDE_INT mask;
mem = change_address (orig_dst, SImode,
plus_constant (XEXP (orig_dst, 0), ofs));
mem = adjust_address (orig_dst, SImode, ofs);
MEM_ALIAS_SET (mem) = 0;
mask = ~(HOST_WIDE_INT)0 << (bytes * 8);
@ -3484,9 +3438,7 @@ alpha_expand_block_clear (operands)
if (align >= 16)
{
do {
emit_move_insn (change_address (orig_dst, HImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
emit_move_insn (adjust_address (orig_dst, HImode, ofs),
const0_rtx);
bytes -= 2;
ofs += 2;
@ -3502,10 +3454,7 @@ alpha_expand_block_clear (operands)
while (bytes > 0)
{
emit_move_insn (change_address (orig_dst, QImode,
plus_constant (XEXP (orig_dst, 0),
ofs)),
const0_rtx);
emit_move_insn (adjust_address (orig_dst, QImode, ofs), const0_rtx);
bytes -= 1;
ofs += 1;
}

6
gcc/config/arm/arm.md
View File

@ -4291,7 +4291,7 @@
operands[4] = change_address (operands[1], QImode,
plus_constant (addr, 1));
operands[1] = change_address (operands[1], QImode, NULL_RTX);
operands[1] = adjust_address (operands[1], QImode, 0);
operands[3] = gen_lowpart (QImode, operands[0]);
operands[0] = gen_lowpart (SImode, operands[0]);
operands[2] = gen_reg_rtx (SImode);
@ -4315,7 +4315,7 @@
operands[4] = change_address (operands[1], QImode,
plus_constant (addr, 1));
operands[1] = change_address (operands[1], QImode, NULL_RTX);
operands[1] = adjust_address (operands[1], QImode, 0);
operands[3] = gen_lowpart (QImode, operands[0]);
operands[0] = gen_lowpart (SImode, operands[0]);
operands[2] = gen_reg_rtx (SImode);
@ -4364,7 +4364,7 @@
operands[3] = change_address (operands[0], QImode,
plus_constant (addr, 1));
operands[0] = change_address (operands[0], QImode, NULL_RTX);
operands[0] = adjust_address (operands[0], QImode, 0);
}"
)

10
gcc/config/convex/convex.c
View File

@ -1,6 +1,6 @@
/* Subroutines for insn-output.c for Convex.
Copyright (C) 1988, 1993, 1994, 1997, 1998,
1999, 2000 Free Software Foundation, Inc.
Copyright (C) 1988, 1993, 1994, 1997, 1998, 1999, 2000, 2001
Free Software Foundation, Inc.
This file is part of GNU CC.
@ -369,8 +369,10 @@ expand_movstr (operands)
/* Get src and dest in the right mode */
if (GET_MODE (src) != mode)
src = change_address (src, mode, 0),
dest = change_address (dest, mode, 0);
{
src = adjust_address (src, mode, 0);
dest = adjust_address (dest, mode, 0);
}
/* Make load and store patterns for this piece */
load = gen_rtx_SET (VOIDmode, reg, src);

12
gcc/config/dsp16xx/dsp16xx.md
View File

@ -1467,7 +1467,7 @@
rtx stack_slot;
stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
stack_slot = validize_mem (stack_slot);
emit_move_insn (stack_slot, operands[2]);
operands[2] = stack_slot;
}
@ -1592,7 +1592,7 @@
rtx stack_slot;
stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
stack_slot = validize_mem (stack_slot);
emit_move_insn (stack_slot, operands[2]);
operands[2] = stack_slot;
}
@ -1729,16 +1729,18 @@
emit_barrier ();
emit_label (label1);
if (GET_CODE(operands[2]) != MEM)
if (GET_CODE (operands[2]) != MEM)
{
rtx stack_slot;
stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
stack_slot = validize_mem (stack_slot);
emit_move_insn (stack_slot, operands[2]);
operands[2] = stack_slot;
}
emit_insn (gen_match_ashlhi3_nobmu (operands[0], operands[1], operands[2]));
emit_insn (gen_match_ashlhi3_nobmu (operands[0], operands[1],
operands[2]));
emit_label (label2);
DONE;
#endif

42
gcc/config/fr30/fr30.c
View File

@ -1,7 +1,5 @@
/*{{{ Introduction */
/* FR30 specific functions.
Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
This file is part of GNU CC.
@ -1008,9 +1006,12 @@ fr30_move_double (operands)
if (reverse)
{
emit_insn (gen_rtx_SET (VOIDmode, dest1, change_address (src, SImode, addr)));
emit_insn (gen_rtx_SET (SImode, dest0, gen_rtx_REG (SImode, REGNO (addr))));
emit_insn (gen_rtx_SET (SImode, dest0, plus_constant (dest0, UNITS_PER_WORD)));
emit_insn (gen_rtx_SET (VOIDmode, dest1,
change_address (src, SImode, addr)));
emit_insn (gen_rtx_SET (SImode, dest0,
gen_rtx_REG (SImode, REGNO (addr))));
emit_insn (gen_rtx_SET (SImode, dest0,
plus_constant (dest0, UNITS_PER_WORD)));
new_mem = gen_rtx_MEM (SImode, dest0);
MEM_COPY_ATTRIBUTES (new_mem, src);
@ -1019,9 +1020,12 @@ fr30_move_double (operands)
}
else
{
emit_insn (gen_rtx_SET (VOIDmode, dest0, change_address (src, SImode, addr)));
emit_insn (gen_rtx_SET (SImode, dest1, gen_rtx_REG (SImode, REGNO (addr))));
emit_insn (gen_rtx_SET (SImode, dest1, plus_constant (dest1, UNITS_PER_WORD)));
emit_insn (gen_rtx_SET (VOIDmode, dest0,
change_address (src, SImode, addr)));
emit_insn (gen_rtx_SET (SImode, dest1,
gen_rtx_REG (SImode, REGNO (addr))));
emit_insn (gen_rtx_SET (SImode, dest1,
plus_constant (dest1, UNITS_PER_WORD)));
new_mem = gen_rtx_MEM (SImode, dest1);
MEM_COPY_ATTRIBUTES (new_mem, src);
@ -1054,12 +1058,15 @@ fr30_move_double (operands)
src0 = operand_subword (src, 0, TRUE, mode);
src1 = operand_subword (src, 1, TRUE, mode);
emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, addr), src0));
emit_insn (gen_rtx_SET (VOIDmode,
change_address (dest, SImode, addr),
src0));
if (REGNO (addr) == STACK_POINTER_REGNUM)
emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, plus_constant (stack_pointer_rtx, UNITS_PER_WORD)), src1));
else if (REGNO (addr) == FRAME_POINTER_REGNUM)
emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, plus_constant (frame_pointer_rtx, UNITS_PER_WORD)), src1));
if (REGNO (addr) == STACK_POINTER_REGNUM
|| REGNO (addr) == FRAME_POINTER_REGNUM)
emit_insn (gen_rtx_SET (VOIDmode,
adjust_address (dest, SImode, UNITS_PER_WORD),
src1));
else
{
rtx new_mem;
@ -1087,10 +1094,3 @@ fr30_move_double (operands)
return val;
}
/*}}}*/
/* Local Variables: */
/* folded-file: t */
/* End: */

4
gcc/config/fr30/fr30.md
View File

@ -1,5 +1,3 @@
;;{{{ Comment
;; FR30 machine description.
;; Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
;; Contributed by Cygnus Solutions.
@ -1441,5 +1439,3 @@
;; mode: md
;; folded-file: t
;; End:
;;}}}

15
gcc/config/i386/i386.c
View File

@ -4408,9 +4408,9 @@ split_di (operands, num, lo_half, hi_half)
}
else if (offsettable_memref_p (op))
{
rtx lo_addr = XEXP (op, 0);
rtx hi_addr = XEXP (adj_offsettable_operand (op, 4), 0);
lo_half[num] = change_address (op, SImode, lo_addr);
lo_half[num] = adjust_address (op, SImode, 0);
hi_half[num] = change_address (op, SImode, hi_addr);
}
else
@ -6865,7 +6865,7 @@ ix86_split_to_parts (operand, parts, mode)
}
else if (offsettable_memref_p (operand))
{
operand = change_address (operand, SImode, XEXP (operand, 0));
operand = adjust_address (operand, SImode, 0);
parts[0] = operand;
parts[1] = adj_offsettable_operand (operand, 4);
if (size == 3)
@ -7061,7 +7061,7 @@ ix86_split_long_move (operands)
if (GET_MODE (part[1][1]) == SImode)
{
if (GET_CODE (part[1][1]) == MEM)
part[1][1] = change_address (part[1][1], DImode, XEXP (part[1][1], 0));
part[1][1] = adjust_address (part[1][1], DImode, 0);
else if (REG_P (part[1][1]))
part[1][1] = gen_rtx_REG (DImode, REGNO (part[1][1]));
else
@ -10185,17 +10185,16 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
case IX86_BUILTIN_SETPS1:
target = assign_386_stack_local (SFmode, 0);
arg0 = TREE_VALUE (arglist);
emit_move_insn (change_address (target, SFmode, XEXP (target, 0)),
emit_move_insn (adjust_address (target, SFmode, 0),
expand_expr (arg0, NULL_RTX, VOIDmode, 0));
op0 = gen_reg_rtx (V4SFmode);
emit_insn (gen_sse_loadss (op0, change_address (target, V4SFmode,
XEXP (target, 0))));
emit_insn (gen_sse_loadss (op0, adjust_address (target, V4SFmode, 0)));
emit_insn (gen_sse_shufps (op0, op0, op0, GEN_INT (0)));
return op0;
case IX86_BUILTIN_SETPS:
target = assign_386_stack_local (V4SFmode, 0);
op0 = change_address (target, SFmode, XEXP (target, 0));
op0 = adjust_address (target, SFmode, 0);
arg0 = TREE_VALUE (arglist);
arg1 = TREE_VALUE (TREE_CHAIN (arglist));
arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));

2
gcc/config/i386/i386.md
View File

@ -8059,7 +8059,7 @@
if (! MEM_VOLATILE_P (operands[0]))
{
mode = smallest_mode_for_size (pos + len, MODE_INT);
operands[0] = change_address (operands[0], mode, NULL_RTX);
operands[0] = adjust_address (operands[0], mode, 0);
}
}
else if (mode == HImode && pos + len <= 8)

20
gcc/config/ia64/ia64.c
View File

@ -928,11 +928,11 @@ ia64_split_timode (out, in, scratch)
switch (GET_CODE (base))
{
case REG:
out[0] = change_address (in, DImode, NULL_RTX);
out[0] = adjust_address (in, DImode, 0);
break;
case POST_MODIFY:
base = XEXP (base, 0);
out[0] = change_address (in, DImode, NULL_RTX);
out[0] = adjust_address (in, DImode, 0);
break;
/* Since we're changing the mode, we need to change to POST_MODIFY
@ -941,13 +941,17 @@ ia64_split_timode (out, in, scratch)
register handy so let's use it. */
case POST_INC:
base = XEXP (base, 0);
out[0] = change_address (in, DImode,
gen_rtx_POST_MODIFY (Pmode, base,plus_constant (base, 16)));
out[0]
= change_address (in, DImode,
gen_rtx_POST_MODIFY
(Pmode, base, plus_constant (base, 16)));
break;
case POST_DEC:
base = XEXP (base, 0);
out[0] = change_address (in, DImode,
gen_rtx_POST_MODIFY (Pmode, base,plus_constant (base, -16)));
out[0]
= change_address (in, DImode,
gen_rtx_POST_MODIFY
(Pmode, base, plus_constant (base, -16)));
break;
default:
abort ();
@ -998,9 +1002,7 @@ spill_tfmode_operand (in, force)
}
else if (GET_CODE (in) == MEM
&& GET_CODE (XEXP (in, 0)) == ADDRESSOF)
{
return change_address (in, TFmode, copy_to_reg (XEXP (in, 0)));
}
return change_address (in, TFmode, copy_to_reg (XEXP (in, 0)));
else
return in;
}

9
gcc/config/ia64/ia64.md
View File

@ -1,5 +1,5 @@
;; IA-64 Machine description template
;; Copyright (C) 1999, 2000 Free Software Foundation, Inc.
;; Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
;; Contributed by James E. Wilson <wilson@cygnus.com> and
;; David Mosberger <davidm@hpl.hp.com>.
@ -725,11 +725,8 @@
out[WORDS_BIG_ENDIAN] = gen_rtx_REG (DImode, REGNO (operands[0]));
out[!WORDS_BIG_ENDIAN] = gen_rtx_REG (DImode, REGNO (operands[0])+1);
emit_move_insn (out[0], change_address (operands[1], DImode, NULL));
emit_move_insn (out[1],
change_address (operands[1], DImode,
plus_constant (XEXP (operands[1], 0),
8)));
emit_move_insn (out[0], adjust_address (operands[1], DImode, 0));
emit_move_insn (out[1], adjust_address (operands[1], DImode, 8));
DONE;
}

24
gcc/config/m32r/m32r.c
View File

@ -1,5 +1,6 @@
/* Subroutines used for code generation on the Mitsubishi M32R cpu.
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
Free Software Foundation, Inc.
This file is part of GNU CC.
@ -1263,8 +1264,8 @@ gen_split_move_double (operands)
{
/* If the high-address word is used in the address, we must load it
last. Otherwise, load it first. */
rtx addr = XEXP (src, 0);
int reverse = (refers_to_regno_p (dregno, dregno+1, addr, 0) != 0);
int reverse
= (refers_to_regno_p (dregno, dregno + 1, XEXP (src, 0), 0) != 0);
/* We used to optimize loads from single registers as
@ -1279,15 +1280,13 @@ gen_split_move_double (operands)
which saves 2 bytes and doesn't force longword alignment. */
emit_insn (gen_rtx_SET (VOIDmode,
operand_subword (dest, reverse, TRUE, mode),
change_address (src, SImode,
plus_constant (addr,
reverse * UNITS_PER_WORD))));
adjust_address (src, SImode,
reverse * UNITS_PER_WORD)));
emit_insn (gen_rtx_SET (VOIDmode,
operand_subword (dest, !reverse, TRUE, mode),
change_address (src, SImode,
plus_constant (addr,
(!reverse) * UNITS_PER_WORD))));
adjust_address (src, SImode,
!reverse * UNITS_PER_WORD)));
}
else
@ -1308,15 +1307,12 @@ gen_split_move_double (operands)
which saves 2 bytes and doesn't force longword alignment. */
else if (GET_CODE (dest) == MEM && GET_CODE (src) == REG)
{
rtx addr = XEXP (dest, 0);
emit_insn (gen_rtx_SET (VOIDmode,
change_address (dest, SImode, addr),
adjust_address (dest, SImode, 0),
operand_subword (src, 0, TRUE, mode)));
emit_insn (gen_rtx_SET (VOIDmode,
change_address (dest, SImode,
plus_constant (addr, UNITS_PER_WORD)),
adjust_address (dest, SImode, UNITS_PER_WORD),
operand_subword (src, 1, TRUE, mode)));
}

5
gcc/config/m68k/m68k.md
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU compiler, Motorola 68000 Version
;; Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999
;; Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2001
;; Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -1255,8 +1255,7 @@
operands[1] = force_const_mem (XFmode, operands[1]);
if (! memory_address_p (XFmode, XEXP (operands[1], 0))
&& ! reload_in_progress)
operands[1] = change_address (operands[1], XFmode,
XEXP (operands[1], 0));
operands[1] = adjust_address (operands[1], XFmode, 0);
}
if (flag_pic && TARGET_PCREL && ! reload_in_progress)
{

8
gcc/config/m88k/m88k.c
View File

@ -1,6 +1,6 @@
/* Subroutines for insn-output.c for Motorola 88000.
Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
Free Software Foundation, Inc.
Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
2001 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@mcc.com)
Currently maintained by (gcc@dg-rtp.dg.com)
@ -2613,9 +2613,7 @@ m88k_builtin_saveregs ()
/* Now store the incoming registers. */
if (fixed < 8)
{
dest = change_address (addr, Pmode,
plus_constant (XEXP (addr, 0),
fixed * UNITS_PER_WORD));
dest = adjust_address (addr, Pmode, fixed * UNITS_PER_WORD);
move_block_from_reg (2 + fixed, dest, 8 - fixed,
UNITS_PER_WORD * (8 - fixed));

14
gcc/config/mips/mips.md
View File

@ -1,6 +1,6 @@
;; Mips.md Machine Description for MIPS based processors
;; Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
;; 1999, 2000 Free Software Foundation, Inc.
;; 1999, 2000, 2001 Free Software Foundation, Inc.
;; Contributed by A. Lichnewsky, lich@inria.inria.fr
;; Changes by Michael Meissner, meissner@osf.org
;; 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and
@ -4542,7 +4542,7 @@ move\\t%0,%z4\\n\\
FAIL;
/* Change the mode to BLKmode for aliasing purposes. */
operands[1] = change_address (operands[1], BLKmode, XEXP (operands[1], 0));
operands[1] = adjust_address (operands[1], BLKmode, 0);
/* Otherwise, emit a l[wd]l/l[wd]r pair to load the value. */
if (INTVAL (operands[2]) == 64)
@ -4590,7 +4590,7 @@ move\\t%0,%z4\\n\\
FAIL;
/* Change the mode to BLKmode for aliasing purposes. */
operands[1] = change_address (operands[1], BLKmode, XEXP (operands[1], 0));
operands[1] = adjust_address (operands[1], BLKmode, 0);
/* Otherwise, emit a lwl/lwr pair to load the value. */
if (INTVAL (operands[2]) == 64)
@ -4638,7 +4638,7 @@ move\\t%0,%z4\\n\\
FAIL;
/* Change the mode to BLKmode for aliasing purposes. */
operands[0] = change_address (operands[0], BLKmode, XEXP (operands[0], 0));
operands[0] = adjust_address (operands[0], BLKmode, 0);
/* Otherwise, emit a s[wd]l/s[wd]r pair to load the value. */
if (INTVAL (operands[1]) == 64)
@ -5069,7 +5069,7 @@ move\\t%0,%z4\\n\\
rtx op1 = change_address (operands[1], VOIDmode, addr);
scratch = gen_rtx_REG (SImode, REGNO (scratch));
memword = change_address (op1, SImode, NULL_RTX);
memword = adjust_address (op1, SImode, 0);
offword = change_address (adj_offsettable_operand (op1, 4),
SImode, NULL_RTX);
if (BYTES_BIG_ENDIAN)
@ -5149,7 +5149,7 @@ move\\t%0,%z4\\n\\
rtx op0 = change_address (operands[0], VOIDmode, addr);
scratch = gen_rtx_REG (SImode, REGNO (operands[2]));
memword = change_address (op0, SImode, NULL_RTX);
memword = adjust_address (op0, SImode, 0);
offword = change_address (adj_offsettable_operand (op0, 4),
SImode, NULL_RTX);
if (BYTES_BIG_ENDIAN)
@ -5679,7 +5679,7 @@ move\\t%0,%z4\\n\\
/* We need to get the source in SFmode so that the insn is
recognized. */
if (GET_CODE (operands[1]) == MEM)
source = change_address (operands[1], SFmode, NULL_RTX);
source = adjust_address (operands[1], SFmode, 0);
else if (GET_CODE (operands[1]) == REG || GET_CODE (operands[1]) == SUBREG)
source = gen_rtx_REG (SFmode, true_regnum (operands[1]));
else

32
gcc/config/ns32k/ns32k.c
View File

@ -1,5 +1,5 @@
/* Subroutines for assembler code output on the NS32000.
Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000
Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
Free Software Foundation, Inc.
This file is part of GNU CC.
@ -423,23 +423,13 @@ move_tail (operands, bytes, offset)
{
if (bytes & 2)
{
rtx src, dest;
dest = change_address (operands[0], HImode,
plus_constant (XEXP (operands[0], 0), offset));
src = change_address (operands[1], HImode,
plus_constant (XEXP (operands[1], 0), offset));
emit_move_insn (dest, src);
emit_move_insn (adjust_address (operands[0], HImode, offset),
adjust_address (operands[1], HImode, offset));
offset += 2;
}
if (bytes & 1)
{
rtx src, dest;
dest = change_address (operands[0], QImode,
plus_constant (XEXP (operands[0], 0), offset));
src = change_address (operands[1], QImode,
plus_constant (XEXP (operands[1], 0), offset));
emit_move_insn (dest, src);
}
emit_move_insn (adjust_address (operands[0], QImode, offset),
adjust_address (operands[1], QImode, offset));
}
void
@ -461,20 +451,16 @@ expand_block_move (operands)
if (constp && bytes < 20)
{
int words = bytes >> 2;
if (words)
{
if (words < 3 || flag_unroll_loops)
{
int offset = 0;
for (; words; words--, offset += 4)
{
rtx src, dest;
dest = change_address (operands[0], SImode,
plus_constant (XEXP (operands[0], 0), offset));
src = change_address (operands[1], SImode,
plus_constant (XEXP (operands[1], 0), offset));
emit_move_insn (dest, src);
}
emit_move_insn (adjust_address (operands[0], SImode, offset),
adjust_address (operands[1], SImode, offset));
}
else
{

3
gcc/config/rs6000/rs6000.c
View File

@ -1886,8 +1886,7 @@ rs6000_emit_move (dest, source, mode)
if (GET_CODE (operands[1]) == MEM
&& ! memory_address_p (mode, XEXP (operands[1], 0))
&& ! reload_in_progress)
operands[1] = change_address (operands[1], mode,
XEXP (operands[1], 0));
operands[1] = adjust_address (operands[1], mode, 0);
emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
return;

6
gcc/config/sh/sh.c
View File

@ -4232,10 +4232,8 @@ sh_builtin_saveregs ()
named args need not be saved. */
if (n_intregs > 0)
move_block_from_reg (BASE_ARG_REG (SImode) + first_intreg,
change_address (regbuf, BLKmode,
plus_constant (XEXP (regbuf, 0),
(n_floatregs
* UNITS_PER_WORD))),
adjust_address (regbuf, BLKmode,
n_floatregs * UNITS_PER_WORD),
n_intregs, n_intregs * UNITS_PER_WORD);
/* Save float args.

21
gcc/config/sparc/sparc.md
View File

@ -2957,7 +2957,7 @@
[(clobber (const_int 0))]
"
{
rtx word0 = change_address (operands[1], SImode, NULL_RTX);
rtx word0 = adjust_address (operands[1], SImode, 0);
rtx word1 = change_address (operands[1], SImode,
plus_constant_for_output (XEXP (word0, 0), 4));
rtx high_part = gen_highpart (SImode, operands[0]);
@ -2985,7 +2985,7 @@
[(clobber (const_int 0))]
"
{
rtx word0 = change_address (operands[0], SImode, NULL_RTX);
rtx word0 = adjust_address (operands[0], SImode, 0);
rtx word1 = change_address (operands[0], SImode,
plus_constant_for_output (XEXP (word0, 0), 4));
rtx high_part = gen_highpart (SImode, operands[1]);
@ -3594,7 +3594,7 @@
[(clobber (const_int 0))]
"
{
rtx word0 = change_address (operands[1], SFmode, NULL_RTX);
rtx word0 = adjust_address (operands[1], SFmode, 0);
rtx word1 = change_address (operands[1], SFmode,
plus_constant_for_output (XEXP (word0, 0), 4));
@ -3629,7 +3629,7 @@
[(clobber (const_int 0))]
"
{
rtx word0 = change_address (operands[0], SFmode, NULL_RTX);
rtx word0 = adjust_address (operands[0], SFmode, 0);
rtx word1 = change_address (operands[0], SFmode,
plus_constant_for_output (XEXP (word0, 0), 4));
@ -3655,7 +3655,7 @@
{
rtx dest1, dest2;
dest1 = change_address (operands[0], SFmode, NULL_RTX);
dest1 = adjust_address (operands[0], SFmode, 0);
dest2 = change_address (operands[0], SFmode,
plus_constant_for_output (XEXP (dest1, 0), 4));
emit_insn (gen_movsf (dest1, CONST0_RTX (SFmode)));
@ -3929,7 +3929,7 @@
dest2 = gen_df_reg (set_dest, 1);
break;
case MEM:
dest1 = change_address (set_dest, DFmode, NULL_RTX);
dest1 = adjust_address (set_dest, DFmode, 0);
dest2 = change_address (set_dest, DFmode,
plus_constant_for_output (XEXP (dest1, 0), 8));
break;
@ -3950,7 +3950,7 @@
[(clobber (const_int 0))]
"
{
rtx word0 = change_address (operands[1], DFmode, NULL_RTX);
rtx word0 = adjust_address (operands[1], DFmode, 0);
rtx word1 = change_address (operands[1], DFmode,
plus_constant_for_output (XEXP (word0, 0), 8));
rtx set_dest, dest1, dest2;
@ -3986,7 +3986,7 @@
[(clobber (const_int 0))]
"
{
rtx word1 = change_address (operands[0], DFmode, NULL_RTX);
rtx word1 = adjust_address (operands[0], DFmode, 0);
rtx word2 = change_address (operands[0], DFmode,
plus_constant_for_output (XEXP (word1, 0), 8));
rtx set_src;
@ -8906,10 +8906,9 @@
}
/* Reload the function value registers. */
emit_move_insn (valreg1, change_address (result, DImode, XEXP (result, 0)));
emit_move_insn (valreg1, adjust_address (result, DImode, 0));
emit_move_insn (valreg2,
change_address (result, TARGET_ARCH64 ? TFmode : DFmode,
plus_constant (XEXP (result, 0), 8)));
adjust_address (result, TARGET_ARCH64 ? TFmode : DFmode, 8));
/* Put USE insns before the return. */
emit_insn (gen_rtx_USE (VOIDmode, valreg1));

4
gcc/dwarf2out.c
View File

@ -399,9 +399,7 @@ expand_builtin_init_dwarf_reg_sizes (address)
if (offset < 0)
continue;
emit_move_insn (change_address (mem, mode,
plus_constant (addr, offset)),
GEN_INT (size));
emit_move_insn (adjust_address (mem, mode, offset), GEN_INT (size));
}
}

16
gcc/emit-rtl.c
View File

@ -1108,7 +1108,7 @@ gen_lowpart (mode, x)
offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
- MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
return adjust_address (x, mode, offset);
}
else if (GET_CODE (x) == ADDRESSOF)
return gen_lowpart (mode, force_reg (GET_MODE (x), x));
@ -1601,6 +1601,20 @@ change_address (memref, mode, addr)
MEM_COPY_ATTRIBUTES (new, memref);
return new;
}
/* Return a memory reference like MEMREF, but with its mode changed
to MODE and its address offset by OFFSET bytes. */
rtx
adjust_address (memref, mode, offset)
rtx memref;
enum machine_mode mode;
HOST_WIDE_INT offset;
{
/* For now, this is just a wrapper for change_address, but eventually
will do memref tracking. */
return
change_address (memref, mode, plus_constant (XEXP (memref, 0), offset));
}
/* Return a newly created CODE_LABEL rtx with a unique label number. */

22
gcc/except.c
View File

@ -2038,9 +2038,8 @@ sjlj_mark_call_sites (lp_info)
int last_call_site = -2;
rtx insn, mem;
mem = change_address (cfun->eh->sjlj_fc, TYPE_MODE (integer_type_node),
plus_constant (XEXP (cfun->eh->sjlj_fc, 0),
sjlj_fc_call_site_ofs));
mem = adjust_address (cfun->eh->sjlj_fc, TYPE_MODE (integer_type_node),
sjlj_fc_call_site_ofs);
for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
{
@ -2156,12 +2155,10 @@ sjlj_emit_function_enter (dispatch_label)
calling it directly. Thus, we must call assemble_external_libcall
here, as we can not depend on emit_library_call to do it for us. */
assemble_external_libcall (eh_personality_libfunc);
mem = change_address (fc, Pmode,
plus_constant (XEXP (fc, 0), sjlj_fc_personality_ofs));
mem = adjust_address (fc, Pmode, sjlj_fc_personality_ofs);
emit_move_insn (mem, eh_personality_libfunc);
mem = change_address (fc, Pmode,
plus_constant (XEXP (fc, 0), sjlj_fc_lsda_ofs));
mem = adjust_address (fc, Pmode, sjlj_fc_lsda_ofs);
if (cfun->uses_eh_lsda)
{
char buf[20];
@ -2258,12 +2255,11 @@ sjlj_emit_dispatch_table (dispatch_label, lp_info)
/* Load up dispatch index, exc_ptr and filter values from the
function context. */
mem = change_address (fc, TYPE_MODE (integer_type_node),
plus_constant (XEXP (fc, 0), sjlj_fc_call_site_ofs));
mem = adjust_address (fc, TYPE_MODE (integer_type_node),
sjlj_fc_call_site_ofs);
dispatch = copy_to_reg (mem);
mem = change_address (fc, word_mode,
plus_constant (XEXP (fc, 0), sjlj_fc_data_ofs));
mem = adjust_address (fc, word_mode, sjlj_fc_data_ofs);
if (word_mode != Pmode)
{
#ifdef POINTERS_EXTEND_UNSIGNED
@ -2274,9 +2270,7 @@ sjlj_emit_dispatch_table (dispatch_label, lp_info)
}
emit_move_insn (cfun->eh->exc_ptr, mem);
mem = change_address (fc, word_mode,
plus_constant (XEXP (fc, 0),
sjlj_fc_data_ofs + UNITS_PER_WORD));
mem = adjust_address (fc, word_mode, sjlj_fc_data_ofs + UNITS_PER_WORD);
emit_move_insn (cfun->eh->filter, mem);
/* Jump to one of the directly reachable regions. */

38
gcc/expmed.c
View File

@ -315,8 +315,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
(bitnum % BITS_PER_WORD) / BITS_PER_UNIT
+ (offset * UNITS_PER_WORD));
else
op0 = change_address (op0, fieldmode,
plus_constant (XEXP (op0, 0), offset));
op0 = adjust_address (op0, fieldmode, offset);
}
emit_move_insn (op0, value);
return value;
@ -331,7 +330,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
if (imode != GET_MODE (op0))
{
if (GET_CODE (op0) == MEM)
op0 = change_address (op0, imode, NULL_RTX);
op0 = adjust_address (op0, imode, 0);
else if (imode != BLKmode)
op0 = gen_lowpart (imode, op0);
else
@ -532,8 +531,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
/* Compute offset as multiple of this unit, counting in bytes. */
offset = (bitnum / unit) * GET_MODE_SIZE (bestmode);
bitpos = bitnum % unit;
op0 = change_address (op0, bestmode,
plus_constant (XEXP (op0, 0), offset));
op0 = adjust_address (op0, bestmode, offset);
/* Fetch that unit, store the bitfield in it, then store
the unit. */
@ -547,8 +545,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size)
/* Add OFFSET into OP0's address. */
if (GET_CODE (xop0) == MEM)
xop0 = change_address (xop0, byte_mode,
plus_constant (XEXP (xop0, 0), offset));
xop0 = adjust_address (xop0, byte_mode, offset);
/* If xop0 is a register, we need it in MAXMODE
to make it acceptable to the format of insv. */
@ -710,8 +707,7 @@ store_fixed_bit_field (op0, offset, bitsize, bitpos, value, struct_align)
Then alter OP0 to refer to that word. */
bitpos += (offset % (total_bits / BITS_PER_UNIT)) * BITS_PER_UNIT;
offset -= (offset % (total_bits / BITS_PER_UNIT));
op0 = change_address (op0, mode,
plus_constant (XEXP (op0, 0), offset));
op0 = adjust_address (op0, mode, offset);
}
mode = GET_MODE (op0);
@ -1048,7 +1044,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
if (imode != GET_MODE (op0))
{
if (GET_CODE (op0) == MEM)
op0 = change_address (op0, imode, NULL_RTX);
op0 = adjust_address (op0, imode, 0);
else if (imode != BLKmode)
op0 = gen_lowpart (imode, op0);
else
@ -1115,8 +1111,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
(bitnum % BITS_PER_WORD) / BITS_PER_UNIT
+ (offset * UNITS_PER_WORD));
else
op0 = change_address (op0, mode1,
plus_constant (XEXP (op0, 0), offset));
op0 = adjust_address (op0, mode1, offset);
}
if (mode1 != mode)
return convert_to_mode (tmode, op0, unsignedp);
@ -1291,9 +1286,8 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
unit = GET_MODE_BITSIZE (bestmode);
xoffset = (bitnum / unit) * GET_MODE_SIZE (bestmode);
xbitpos = bitnum % unit;
xop0 = change_address (xop0, bestmode,
plus_constant (XEXP (xop0, 0),
xoffset));
xop0 = adjust_address (xop0, bestmode, xoffset);
/* Fetch it to a register in that size. */
xop0 = force_reg (bestmode, xop0);
@ -1301,8 +1295,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
}
else
/* Get ref to first byte containing part of the field. */
xop0 = change_address (xop0, byte_mode,
plus_constant (XEXP (xop0, 0), xoffset));
xop0 = adjust_address (xop0, byte_mode, xoffset);
volatile_ok = save_volatile_ok;
}
@ -1428,9 +1421,8 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
unit = GET_MODE_BITSIZE (bestmode);
xoffset = (bitnum / unit) * GET_MODE_SIZE (bestmode);
xbitpos = bitnum % unit;
xop0 = change_address (xop0, bestmode,
plus_constant (XEXP (xop0, 0),
xoffset));
xop0 = adjust_address (xop0, bestmode, xoffset);
/* Fetch it to a register in that size. */
xop0 = force_reg (bestmode, xop0);
@ -1438,8 +1430,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp,
}
else
/* Get ref to first byte containing part of the field. */
xop0 = change_address (xop0, byte_mode,
plus_constant (XEXP (xop0, 0), xoffset));
xop0 = adjust_address (xop0, byte_mode, xoffset);
}
/* If op0 is a register, we need it in MAXMODE (which is usually
@ -1606,8 +1597,7 @@ extract_fixed_bit_field (tmode, op0, offset, bitsize, bitpos,
Then alter OP0 to refer to that word. */
bitpos += (offset % (total_bits / BITS_PER_UNIT)) * BITS_PER_UNIT;
offset -= (offset % (total_bits / BITS_PER_UNIT));
op0 = change_address (op0, mode,
plus_constant (XEXP (op0, 0), offset));
op0 = adjust_address (op0, mode, offset);
}
mode = GET_MODE (op0);

76
gcc/expr.c
View File

@ -1581,8 +1581,7 @@ move_by_pieces_1 (genfun, mode, data)
MEM_COPY_ATTRIBUTES (to1, data->to);
}
else
to1 = change_address (data->to, mode,
plus_constant (data->to_addr, data->offset));
to1 = adjust_address (data->to, mode, data->offset);
}
if (data->autinc_from)
@ -1591,8 +1590,7 @@ move_by_pieces_1 (genfun, mode, data)
MEM_COPY_ATTRIBUTES (from1, data->from);
}
else
from1 = change_address (data->from, mode,
plus_constant (data->from_addr, data->offset));
from1 = adjust_address (data->from, mode, data->offset);
if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size)));
@ -2005,10 +2003,7 @@ emit_group_load (dst, orig_src, ssize, align)
&& bytelen == GET_MODE_SIZE (mode))
{
tmps[i] = gen_reg_rtx (mode);
emit_move_insn (tmps[i],
change_address (src, mode,
plus_constant (XEXP (src, 0),
bytepos)));
emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
}
else if (GET_CODE (src) == CONCAT)
{
@ -2128,13 +2123,10 @@ emit_group_store (orig_dst, src, ssize, align)
&& align >= GET_MODE_ALIGNMENT (mode)
&& bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
&& bytelen == GET_MODE_SIZE (mode))
emit_move_insn (change_address (dst, mode,
plus_constant (XEXP (dst, 0),
bytepos)),
tmps[i]);
emit_move_insn (adjust_address (dst, mode, bytepos), tmps[i]);
else
store_bit_field (dst, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
mode, tmps[i], align, ssize);
mode, tmps[i], align, ssize);
}
emit_queue ();
@ -2521,8 +2513,7 @@ store_by_pieces_2 (genfun, mode, data)
MEM_COPY_ATTRIBUTES (to1, data->to);
}
else
to1 = change_address (data->to, mode,
plus_constant (data->to_addr, data->offset));
to1 = adjust_address (data->to, mode, data->offset);
if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr,
@ -2911,7 +2902,7 @@ emit_move_insn_1 (x, y)
{
rtx mem = assign_stack_temp (reg_mode,
GET_MODE_SIZE (mode), 0);
rtx cmem = change_address (mem, mode, NULL_RTX);
rtx cmem = adjust_address (mem, mode, 0);
cfun->cannot_inline
= N_("function using short complex types cannot be inline");
@ -3265,8 +3256,7 @@ emit_push_insn (x, mode, type, size, align, partial, reg, extra,
because registers will take care of them. */
if (partial != 0)
xinner = change_address (xinner, BLKmode,
plus_constant (XEXP (xinner, 0), used));
xinner = adjust_address (xinner, BLKmode, used);
/* If the partial register-part of the arg counts in its stack size,
skip the part of stack space corresponding to the registers.
@ -3725,10 +3715,9 @@ expand_assignment (to, from, want_value, suggest_reg)
&& (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
&& alignment == GET_MODE_ALIGNMENT (mode1))
{
rtx temp = change_address (to_rtx, mode1,
plus_constant (XEXP (to_rtx, 0),
(bitpos /
BITS_PER_UNIT)));
rtx temp
= adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
if (GET_CODE (XEXP (temp, 0)) == REG)
to_rtx = temp;
else
@ -3810,9 +3799,7 @@ expand_assignment (to, from, want_value, suggest_reg)
unsigned int from_align;
rtx from_rtx = expand_expr_unaligned (from, &from_align);
rtx inner_to_rtx
= change_address (to_rtx, BLKmode,
plus_constant (XEXP (to_rtx, 0),
bitpos / BITS_PER_UNIT));
= adjust_address (to_rtx, BLKmode, bitpos / BITS_PER_UNIT);
emit_block_move (inner_to_rtx, from_rtx, expr_size (from),
MIN (alignment, from_align));
@ -4459,13 +4446,11 @@ store_constructor_field (target, bitsize, bitpos,
{
if (bitpos != 0)
target
= change_address (target,
= adjust_address (target,
GET_MODE (target) == BLKmode
|| 0 != (bitpos
% GET_MODE_ALIGNMENT (GET_MODE (target)))
? BLKmode : VOIDmode,
plus_constant (XEXP (target, 0),
bitpos / BITS_PER_UNIT));
? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
/* Show the alignment may no longer be what it was and update the alias
@ -4991,10 +4976,7 @@ store_constructor (exp, target, align, cleared, size)
XEXP if the set is multi-word, but not if
it's single-word. */
if (GET_CODE (target) == MEM)
{
to_rtx = plus_constant (XEXP (target, 0), offset);
to_rtx = change_address (target, mode, to_rtx);
}
to_rtx = adjust_address (target, mode, offset);
else if (offset == 0)
to_rtx = target;
else
@ -5252,9 +5234,7 @@ store_field (target, bitsize, bitpos, mode, exp, value_mode,
|| bitpos % BITS_PER_UNIT != 0)
abort ();
target = change_address (target, VOIDmode,
plus_constant (XEXP (target, 0),
bitpos / BITS_PER_UNIT));
target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
/* Make sure that ALIGN is no stricter than the alignment of EXP. */
align = MIN (exp_align, align);
@ -7079,10 +7059,8 @@ expand_expr (exp, target, tmode, modifier)
&& (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
&& alignment == GET_MODE_ALIGNMENT (mode1))
{
rtx temp = change_address (op0, mode1,
plus_constant (XEXP (op0, 0),
(bitpos /
BITS_PER_UNIT)));
rtx temp = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
if (GET_CODE (XEXP (temp, 0)) == REG)
op0 = temp;
else
@ -7181,9 +7159,7 @@ expand_expr (exp, target, tmode, modifier)
|| bitpos % BITS_PER_UNIT != 0)
abort ();
op0 = change_address (op0, VOIDmode,
plus_constant (XEXP (op0, 0),
bitpos / BITS_PER_UNIT));
op0 = adjust_address (op0, VOIDmode, bitpos / BITS_PER_UNIT);
if (target == 0)
target = assign_temp (type, 0, 1, 1);
@ -7248,9 +7224,7 @@ expand_expr (exp, target, tmode, modifier)
op0 = new;
}
else
op0 = change_address (op0, mode1,
plus_constant (XEXP (op0, 0),
(bitpos / BITS_PER_UNIT)));
op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
set_mem_attributes (op0, exp, 0);
if (GET_CODE (XEXP (op0, 0)) == REG)
@ -7450,7 +7424,7 @@ expand_expr (exp, target, tmode, modifier)
if (GET_CODE (target) == MEM)
/* Store data into beginning of memory target. */
store_expr (TREE_OPERAND (exp, 0),
change_address (target, TYPE_MODE (valtype), 0), 0);
adjust_address (target, TYPE_MODE (valtype), 0), 0);
else if (GET_CODE (target) == REG)
/* Store this field into a union of the proper type. */
@ -9122,9 +9096,7 @@ expand_expr_unaligned (exp, palign)
|| bitpos % BITS_PER_UNIT != 0)
abort ();
op0 = change_address (op0, VOIDmode,
plus_constant (XEXP (op0, 0),
bitpos / BITS_PER_UNIT));
op0 = adjust_address (op0, VOIDmode, bitpos / BITS_PER_UNIT);
}
else
{
@ -9156,9 +9128,7 @@ expand_expr_unaligned (exp, palign)
}
else
/* Get a reference to just this component. */
op0 = change_address (op0, mode1,
plus_constant (XEXP (op0, 0),
(bitpos / BITS_PER_UNIT)));
op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
MEM_ALIAS_SET (op0) = get_alias_set (exp);

4
gcc/expr.h
View File

@ -1150,6 +1150,10 @@ extern rtx memory_address_noforce PARAMS ((enum machine_mode, rtx));
NULL for ADDR means don't change the address.) */
extern rtx change_address PARAMS ((rtx, enum machine_mode, rtx));
/* Return a memory reference like MEMREF, but with its mode changed
to MODE and its address offset by OFFSET bytes. */
extern rtx adjust_address PARAMS ((rtx, enum machine_mode, HOST_WIDE_INT));
/* Return a memory reference like MEMREF, but which is known to have a
valid address. */
extern rtx validize_mem PARAMS ((rtx));

20
gcc/function.c
View File

@ -2518,12 +2518,13 @@ fixup_memory_subreg (x, insn, uncritical)
&& ! uncritical)
abort ();
addr = plus_constant (addr, offset);
if (!flag_force_addr && memory_address_p (mode, addr))
if (!flag_force_addr
&& memory_address_p (mode, plus_constant (addr, offset)))
/* Shortcut if no insns need be emitted. */
return change_address (SUBREG_REG (x), mode, addr);
return adjust_address (SUBREG_REG (x), mode, offset);
start_sequence ();
result = change_address (SUBREG_REG (x), mode, addr);
result = adjust_address (SUBREG_REG (x), mode, offset);
emit_insn_before (gen_sequence (), insn);
end_sequence ();
return result;
@ -2721,8 +2722,7 @@ optimize_bit_field (body, insn, equiv_mem)
}
start_sequence ();
memref = change_address (memref, mode,
plus_constant (XEXP (memref, 0), offset));
memref = adjust_address (memref, mode, offset);
insns = get_insns ();
end_sequence ();
emit_insns_before (insns, insn);
@ -4987,11 +4987,9 @@ assign_parms (fndecl)
entry_parm = convert_to_mode (nominal_mode, tempreg,
TREE_UNSIGNED (TREE_TYPE (parm)));
if (stack_parm)
{
/* ??? This may need a big-endian conversion on sparc64. */
stack_parm = change_address (stack_parm, nominal_mode,
NULL_RTX);
}
/* ??? This may need a big-endian conversion on sparc64. */
stack_parm = adjust_address (stack_parm, nominal_mode, 0);
conversion_insns = get_insns ();
did_conversion = 1;
end_sequence ();