frv.md (reload_incc, [...]): Remove invalid patterns.
* config/frv/frv.md (reload_incc, reload_outcc, reload_incc_uns, reload_outcc_uns, reload_incc_nz, reload_outcc_nz): Remove invalid patterns. From-SVN: r121981
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@ -1,3 +1,9 @@
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2007-02-15 Alexandre Oliva <aoliva@redhat.com>
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* config/frv/frv.md (reload_incc, reload_outcc, reload_incc_uns,
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reload_outcc_uns, reload_incc_nz, reload_outcc_nz): Remove
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invalid patterns.
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2007-02-15 Alexandre Oliva <aoliva@redhat.com>
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2007-02-15 Alexandre Oliva <aoliva@redhat.com>
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* tree-sra.c (instantiate_missing_elements): Canonicalize
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* tree-sra.c (instantiate_missing_elements): Canonicalize
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@ -2256,26 +2256,6 @@
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end_sequence ();
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end_sequence ();
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}")
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}")
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(define_expand "reload_incc"
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[(parallel [(set (match_operand:CC 2 "integer_register_operand" "=&d")
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(match_operand:CC 1 "memory_operand" "m"))
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(clobber (match_scratch:CC_CCR 3 ""))])
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(parallel [(set (match_operand:CC 0 "icc_operand" "=t")
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(match_dup 2))
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(clobber (match_scratch:CC_CCR 4 ""))])]
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""
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"")
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(define_expand "reload_outcc"
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[(parallel [(set (match_operand:CC 2 "integer_register_operand" "=&d")
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(match_operand:CC 1 "icc_operand" "t"))
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(clobber (match_dup 3))])
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(parallel [(set (match_operand:CC 0 "memory_operand" "=m")
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(match_dup 2))
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(clobber (match_scratch:CC_CCR 4 ""))])]
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""
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"operands[3] = gen_rtx_REG (CC_CCRmode, ICR_TEMP);")
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;; Reload CC_UNSmode for unsigned integer comparisons
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;; Reload CC_UNSmode for unsigned integer comparisons
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;; Use define_expand so that cse/gcse/combine can't create movcc_uns insns
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;; Use define_expand so that cse/gcse/combine can't create movcc_uns insns
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@ -2343,26 +2323,6 @@
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end_sequence ();
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end_sequence ();
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}")
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}")
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(define_expand "reload_incc_uns"
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[(parallel [(set (match_operand:CC_UNS 2 "integer_register_operand" "=&d")
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(match_operand:CC_UNS 1 "memory_operand" "m"))
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(clobber (match_scratch:CC_CCR 3 ""))])
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(parallel [(set (match_operand:CC_UNS 0 "icc_operand" "=t")
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(match_dup 2))
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(clobber (match_scratch:CC_CCR 4 ""))])]
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""
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"")
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(define_expand "reload_outcc_uns"
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[(parallel [(set (match_operand:CC_UNS 2 "integer_register_operand" "=&d")
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(match_operand:CC_UNS 1 "icc_operand" "t"))
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(clobber (match_dup 3))])
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(parallel [(set (match_operand:CC_UNS 0 "memory_operand" "=m")
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(match_dup 2))
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(clobber (match_scratch:CC_CCR 4 ""))])]
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""
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"operands[3] = gen_rtx_REG (CC_CCRmode, ICR_TEMP);")
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;; Reload CC_NZmode. This is mostly the same as the CCmode and CC_UNSmode
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;; Reload CC_NZmode. This is mostly the same as the CCmode and CC_UNSmode
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;; handling, but it uses different sequences for moving between GPRs and ICCs.
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;; handling, but it uses different sequences for moving between GPRs and ICCs.
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@ -2423,26 +2383,6 @@
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(set (match_dup 3) (const_int 0)))]
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(set (match_dup 3) (const_int 0)))]
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"operands[3] = simplify_gen_subreg (SImode, operands[0], CC_NZmode, 0);")
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"operands[3] = simplify_gen_subreg (SImode, operands[0], CC_NZmode, 0);")
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(define_expand "reload_incc_nz"
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[(parallel [(set (match_operand:CC_NZ 2 "integer_register_operand" "=&d")
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(match_operand:CC_NZ 1 "memory_operand" "m"))
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(clobber (match_scratch:CC_CCR 3 ""))])
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(parallel [(set (match_operand:CC_NZ 0 "icc_operand" "=t")
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(match_dup 2))
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(clobber (match_scratch:CC_CCR 4 ""))])]
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""
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"")
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(define_expand "reload_outcc_nz"
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[(parallel [(set (match_operand:CC_NZ 2 "integer_register_operand" "=&d")
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(match_operand:CC_NZ 1 "icc_operand" "t"))
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(clobber (match_dup 3))])
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(parallel [(set (match_operand:CC_NZ 0 "memory_operand" "=m")
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(match_dup 2))
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(clobber (match_scratch:CC_CCR 4 ""))])]
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""
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"operands[3] = gen_rtx_REG (CC_CCRmode, ICR_TEMP);")
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;; Reload CC_FPmode for floating point comparisons
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;; Reload CC_FPmode for floating point comparisons
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;; We use a define_expand here so that cse/gcse/combine can't accidentally
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;; We use a define_expand here so that cse/gcse/combine can't accidentally
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;; create movcc insns. If this was a named define_insn, we would not be able
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;; create movcc insns. If this was a named define_insn, we would not be able
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