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rs6000.c (rs6000_expand_binop_builtin): Add evsubifw to builtins accepting 5-bit unsigned constants.

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2003-05-05  Aldy Hernandez  <aldyh@redhat.com>

        * config/rs6000/rs6000.c (rs6000_expand_binop_builtin): Add
        evsubifw to builtins accepting 5-bit unsigned constants.
        (easy_vector_constant): Return if V1DImode.  Fix typo.

[[Split portion of a mixed commit.]]

From-SVN: r66490.2
This commit is contained in:
Aldy Hernandez 2003-05-05 17:40:03 +00:00 committed by Aldy Hernandez
parent 25ecd459a1
commit f5119d10fa
2 changed files with 11 additions and 1 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2003-05-05 Aldy Hernandez <aldyh@redhat.com>
* config/rs6000/rs6000.c (rs6000_expand_binop_builtin): Add
evsubifw to builtins accepting 5-bit unsigned constants.
(easy_vector_constant): Return if V1DImode. Fix typo.
2003-05-05 Aldy Hernandez <aldyh@redhat.com>
* config/rs6000/spe.h: Revert licensing change from last patch.

6
gcc/config/rs6000/rs6000.c
View File

@ -1510,6 +1510,9 @@ easy_vector_constant (op, mode)
if (GET_MODE_CLASS (mode) != MODE_VECTOR_INT)
return 0;
if (TARGET_SPE && mode == V1DImode)
return 0;
cst = INTVAL (CONST_VECTOR_ELT (op, 0));
cst2 = INTVAL (CONST_VECTOR_ELT (op, 1));
@ -1524,7 +1527,7 @@ easy_vector_constant (op, mode)
have the e500 timing specs. */
if (TARGET_SPE && mode == V2SImode
&& cst >= -0x7fff && cst <= 0x7fff
&& cst2 >= -0x7fff && cst <= 0x7fff)
&& cst2 >= -0x7fff && cst2 <= 0x7fff)
return 1;
if (TARGET_ALTIVEC && EASY_VECTOR_15 (cst, op, mode))
@ -4721,6 +4724,7 @@ rs6000_expand_binop_builtin (icode, arglist, target)
|| icode == CODE_FOR_spe_evrlwi
|| icode == CODE_FOR_spe_evslwi
|| icode == CODE_FOR_spe_evsrwis
|| icode == CODE_FOR_spe_evsubifw
|| icode == CODE_FOR_spe_evsrwiu)
{
/* Only allow 5-bit unsigned literals. */